designing trustworthy fpga-based embedded systems

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Designing Trustworthy FPGA-Based Embedded Systems Ted Huffmire Naval Postgraduate School May 7, 2009

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Designing Trustworthy FPGA-Based Embedded Systems. Ted Huffmire Naval Postgraduate School May 7, 2009. Overview. Problem Areas. Foundry Trust. Physical Attacks. Design Tools. Design Theft. System Assurance. Attacks. Trojan horse Backdoor Kill switch. Probing Sand and Scan - PowerPoint PPT Presentation

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Page 1: Designing  Trustworthy  FPGA-Based Embedded Systems

Designing Trustworthy FPGA-Based Embedded Systems

Ted HuffmireNaval Postgraduate School

May 7, 2009

Page 2: Designing  Trustworthy  FPGA-Based Embedded Systems

Overview

FoundryTrust

PhysicalAttacks

DesignTools

DesignTheft

Problem Areas

AttacksTrojan horse

BackdoorKill switch

ProbingSand and ScanSide Channels

Data Remanence

Covert channelsSide channels

Bypass

CloningReverse engineerReadback attack

SolutionsTrusted foundries

FPGAsX-Ray InspectionSand and Scan

Tamper sensingAdding noiseDegaussing

Logical isolationTracing wiresSanitization

Continuous powerEncrypt bitstream

WatermarkingAuthentication

Future ResearchAll of supply chainLessons from S/W Red teams

Side channels

Trusted toolsVerificationLanguages

CM

High-assurancePartial reconfig

PUFs

High-assuranceCMPs

TaggingDynamic security

Reference monitorDefense in depth

User trainingSecurity usability

DoSAuthentication

Complex designs

SystemAssurance

Page 3: Designing  Trustworthy  FPGA-Based Embedded Systems

Reconfigurable Hardware

FPGA Chip

SDRAM (off-chip)

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

ReferenceM

onitor

Crypto Core

CPU Core

CPU Core

AES

μP

μP

Page 4: Designing  Trustworthy  FPGA-Based Embedded Systems

Protection Alternatives

Separation Kernels

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

app1 app3app2

kernel

Separate Processors DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

gatekeeper

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

gatekeeper

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

gatekeeper

app1app3 app2

Reconfigurable Protection

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM app1

app2

app3ReferenceMonitor

Physical Software

Spatial Temporal

Page 5: Designing  Trustworthy  FPGA-Based Embedded Systems

Design Flows

Page 6: Designing  Trustworthy  FPGA-Based Embedded Systems

Intertwined Cores

Page 7: Designing  Trustworthy  FPGA-Based Embedded Systems

Moats

FPGA Chip

SDRAM (off-chip)

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

ReferenceM

onitor

Crypto Core

CPU Core

CPU Core

AESAES

Page 8: Designing  Trustworthy  FPGA-Based Embedded Systems

Moats 1.0

Page 9: Designing  Trustworthy  FPGA-Based Embedded Systems

Moats 2.0

Page 10: Designing  Trustworthy  FPGA-Based Embedded Systems

Moats and Drawbridges

Page 11: Designing  Trustworthy  FPGA-Based Embedded Systems

Interconnect Tracing

FPGA Chip

SDRAM (off-chip)

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

ReferenceM

onitor

Crypto Core

CPU Core

CPU Core

AES

μP

μP

XX

Page 12: Designing  Trustworthy  FPGA-Based Embedded Systems

Communication Architecture

FPGA Chip

SDRAM (off-chip)

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM Arbiter/R

eference Monitor

Crypto Core

CPU Core

CPU Core

AES

μP

μP

Page 13: Designing  Trustworthy  FPGA-Based Embedded Systems

Memory Protection

FPGA Chip

SDRAM (off-chip)

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

DRAM

Crypto Core

CPU Core

CPU Core

AESAES

Reference M

onitor

X

XR

eference Monitor

Page 14: Designing  Trustworthy  FPGA-Based Embedded Systems

Policy Compiler

Page 15: Designing  Trustworthy  FPGA-Based Embedded Systems

SoC Application

On-Chip Peripheral Bus (OPB)

To Network

µBlaze0

AuthenticationModule

AESRS232

µBlaze1

DDRSDRAM

Page 16: Designing  Trustworthy  FPGA-Based Embedded Systems

Questions?

• http://faculty.nps.edu/tdhuffmi