design lab esd

Upload: senthil-kumar

Post on 03-Jun-2018

224 views

Category:

Documents


0 download

TRANSCRIPT

  • 8/11/2019 Design Lab esd

    1/80

    EINSTEINCOLLEGE OF ENGINEERINGSir.C.V.Raman Nagar, Tirunelveli-12

    Department of Electronics and Communication

    Engineering

    Subject Code: EC-76

    ELECTRONIC SYSTEM DESIGN LAB

    Name :

    Reg No :

    Branch :

    Year & Semester :

  • 8/11/2019 Design Lab esd

    2/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 2 of 80

    LIST OF EXPERIMENTS

    Exp.No Name of the experiment Page No

    1 DESIGN OF AN INSTRUMENTATION AMPLIFIER

    2 DESIGN OF AC/DC VOLTAGE REGULATOR USING SCR

    3 DESIGN OF PROCESS CONTROL TIMER

    4 i) DESIGN OF AM MODULATOR AND DEMODULATOR

    ii) DESIGN OF FM MODULATOR AND DEMODULATOR

    5 DESIGN OF WIRELESS DATA MODEM

    6 PCB LAYOUT DESIGN USING CAD TOOL

    7 MICROCONTROLLER BASED SYSTEMS DESIGN

    8 DSP BASED SYSTEM DESIGN

    9 PSUEDO RANDOM SEQUENCE GENERATOR

    10 ARITHMETIC LOGIC UNIT DESIGN

  • 8/11/2019 Design Lab esd

    3/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 3 of 80

    INDEX

    EX.No DATE NAME OF EXPERIMENT PAGE No MARKS INITIAL

  • 8/11/2019 Design Lab esd

    4/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 4 of 80

  • 8/11/2019 Design Lab esd

    5/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 5 of 80

  • 8/11/2019 Design Lab esd

    6/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 6 of 80

    Ex. No.1 DESIGN OF AN INSTRUMENTATION AMPLIFIER

    AIM:To design, construct and test an instrumentation amplifier using IC 741 and vary its gain

    from 1 to 100.

    APPARATUS REQUIRED:

    S.No Name of the Apparatus Range Quantity

    1 Operational Amplifier IC 741 4

    2 Resistor 10k1k150

    1041

    3 DRB 1

    4 Bread Board&Connecting wires

    As required

    5 Dual Power Supply 1

    6 Rheostat (0-100) 1

    7 Ammeter (0-250)A 1

    8 Multimeter 1

    THEORY:

    INSTUMENTATION AMPLIFIER:Instrumentation amplifier is generally required in any measurement system

    using electrical transducers to enhance signal levels often in low voltage less than mV. Alsoit is required to provide impedance matching and isolation. When the desired input rides overa common mode signal special amplifier are needed so that difference signals get amplifiedto an acceptable level while the common mode signals get attenuated.

    The physical quantities can be converted into electrical quantities by usingtransducer. The output of the transducer needs to be amplified to get the meter readings. Thisamplification is done by using instrumentation amplifier. The output of instrumentationamplifier drives of indicator or display system. The important features of an instrumentationamplifier are high gain accuracy, high CMRR, high gain stability with low temperatureco-efficient, low dc offset, low output impedance.

    Low input impedance may load the signal source heavily. Therefore high resistancebuffer is used preceding each input to avoid this loading effect. For V1=V2 under commonmode condition. If V2 =V2 and V

    1 =V1 both the operational amplifiers act as voltage

    follower. If V1V2 the circuit has differential gain by the formula VO/ (V2-V1)=1+(2R/R).

  • 8/11/2019 Design Lab esd

    7/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 7 of 80

    CIRCUIT DIAGRAM:

    BRIDGE CIRCUIT:

    INSTRUMENTATION AMPLIFIER:

  • 8/11/2019 Design Lab esd

    8/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 8 of 80

    DESIGN:Output voltage VO = (1 + ( 2R / R)) (V2 -V1)

    Differential gain Ad = VO / (V2 - V1)

    = 1 + (2R / R)Choose R = 10k

    For Admax = 100

    100 = 1 + (20k/R)

    R= 20K---------

    99

    Rmax = 200.

    For Ad min = 10

    10 = 1 + (20k/R)

    R min = 2.2K.

    IL = I1+I2

    I1 = (V-(V0/2)) / R

    I2 = (V0-(V0/2)) / R

    IL = (V-(V0/2) + (V0-(V0/2)) / R = (V-V0+V0) / R = V/R

    ILis independent of RL. If R is constant then ILV

    PROCEDURE:

    1. The connections are made as per the circuit diagram.

    2. The bridge circuit was balanced by varying 100Rheostat.3. The output voltage V1and V2of balanced circuit were given as input to the

    op-amp A1 and A2.4. Varying the resistance R1the bridge circuit the voltage V1 and V2 were

    varied.5. Varying the Rthe output voltage was measured then the differential gain

    was calculated using formula,=20 log (VO/(V2 -V1)).

  • 8/11/2019 Design Lab esd

    9/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 9 of 80

    V to I CONVERTER:

    PIN DIAGRAM:

  • 8/11/2019 Design Lab esd

    10/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 10 of 80

  • 8/11/2019 Design Lab esd

    11/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 11 of 80

    MODEL GRAPH:

    TABULAR COLUMN:

    Displacementfrom initial

    place (cm)

    OutputVoltage (volt)

    OutputCurrent (mA)

    Gain =(VO / (V2 -V1))

    Gain =20 log (VO / (V2 -V1)) in dB

  • 8/11/2019 Design Lab esd

    12/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 12 of 80

    RESULT:Thus the physical quantities are converted into electrical quantities and by

    using electrical quantities instrumentation amplifier was designed, constructed andoutputs were verified.

  • 8/11/2019 Design Lab esd

    13/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 13 of 80

    CIRCUIT DIAGRAM:

    AC VOLTAGE REGULATOR:

    DC VOLTAGE REGULATOR:

    PIN DETAILS:

    AC VOLTAGE REGULATOR:

  • 8/11/2019 Design Lab esd

    14/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 14 of 80

    Ex.No.2 AC/DC VOLTAGE REGULATOR USING SCR

    AIM:

    (i)To design, construct and test a AC voltage regulator using SCR.

    (ii)To design, construct and test a DC voltage regulator using SCR.

    APPARATUS REQUIRED:

    AC VOLTAGE REGULATOR:

    S.No Name of the Apparatus Range Quantity

    1 Transformer 230V/12V 1

    2 SCR 2P4M 2

    3 Diode BY 127 2

    4 Resistor 100 k12 k

    21

    5 Bread Board 1

    6 Connecting Wires As required

    7 CRO 1

    8 DRB 1

    DC VOLTAGE REGULATOR:

    S.No Name of the Apparatus Range Quantity

    1 Transformer 230V/24V 1

    2 SCR TYN 604 1

    3 Diode 1N4001 4

    4 Resistor 10 k 25 Bread Board 1

    6 Connecting Wires As required

    7 CRO 1

    8 DRB 2

    9 IC 7812 1

    10 Capacitors 1000f 1

    100f 1

  • 8/11/2019 Design Lab esd

    15/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 15 of 80

    DC VOLTAGE REGULATOR:

    MODEL GRAPH:

    AC VOLTAGE REGULATOR:

    DC VOLTAGE REGULATOR:

  • 8/11/2019 Design Lab esd

    16/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 16 of 80

    THEORY:

    The SCR is switched ON and OFF to regulate the output voltage in AC andDC voltage regulator.

    AC VOLTAGE REGULATOR:

    If the SCR is connected to AC supply and load, the power flow can becontrolled by varying the RMS value of AC voltage applied to the load and this typeof power circuit is caused as AC voltage regulator. Applications of AC voltageregulator are in heating on load transformers for changing light controls, speedcontrols and polyphase controls, induction motors and AC magnet controls for powertransfer. Two types of power control are normally used.

    (1) ON-OFF control(2) Polyphase Angle control

    AC regulators are those converter which converts fixed ac voltage directly tovariable ac voltage of the same frequency. The load voltage is regulated bycontrolling the firing angle of SCRs. AC voltage controllers are thyristor baseddevices.

    The most common circuit is the inverse parallel SCR pair in which twoisolated gate signals are applied. Each of the two SCRs are triggered at alternate halfcycles of the supply and the load voltage is part of input sine wave. The SCR is anunidirectional device like diode, it allows current flow in only one direction but unlikediode, it has built-in feature to switch ON and OFF. The switching of SCR iscontrolled by gate and biasing condition. This switching property of SCR allows tocontrol the ON periods thus controlling average power delivered to the load.

    In this circuit SCR1 is forward biased during positive half cycle and SCR2 isforward biased during negative half cycle. SCR1 is triggered at the firing angle t=

    and supply voltage is impressed on the load resistance(RL). It conducts from theremaining positive half cycle, turning OFF when the anode voltage becomes zero att=.

    SCR2 is triggered at the firing angle t=+ and conducts till t=2. Hencethe load is alternating in polarity and is part of sine wave. The firing angle of bothSCRs is controlled by gate circuit. The conduction period of SCR is controlled byvarying gate signals within specified values of maximum and minimum gate currents.

    For gate triggering, a signal is applied between the gate and cathode of the

    device. AC sources are normally used as gate signals. This provides proper isolationbetween power.

    DC VOLTAGE REGULATOR:If SCRs are used to convert an AC voltage into DC voltage then they are

    known as DC voltage regulators. Eg. Battery changes for high current capacitybatteries in DC voltage control only phase control is used.

    The transformer is used to step down the voltage from 230V to 24V. This isgiven as input to bridge rectifier. The bridge rectifier converts incoming ac signal tounidirectional wave. Therefore we get full wave rectifier output at the output of bridgerectifier. This is given as input to SCR. The gate of SCR is triggered with firing angle

    of . During positive half cycle, diode D1 and D2 conducts and during negative halfcycle, diode D3 and D4 conducts. The full wave rectified output is given to capacitive

  • 8/11/2019 Design Lab esd

    17/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 17 of 80

    filter. The output of capacitor is dc that it eliminates ripple contents of bridge rectifieroutput. The dc input is given to regulator IC. The unregulated output must be 2Vgreater than regulated output voltage. The load current may vary from 0 to ratedmaximum output current. The output voltage is regulated dc.

    TABULAR COLUMN:

    AC VOLTAGE REGULATOR:

    DRB 1 value(K) Amplitude (V) TON(ms)

    DRB 2 value(K) Amplitude (V) TOFF(ms)

    DC VOLTAGE REGULATOR:

    DRB value(K) Amplitude (V) TON(ms) Resistance RL(K) Output (V)

  • 8/11/2019 Design Lab esd

    18/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 18 of 80

    DESIGN:

    AC VOLTAGE REGULATOR USING SCR:

    Triggering circuit for SCR:

    12 V ac is rectified by diode BY 127. SCR 2P4M is used to trigger.

    Let the current be 1mA. R=V/I=12V/1mA=12K.

    DC VOLTAGE REGULATOR USING SCR:

    Triggering circuit for SCR:

    24 V ac is rectified by diode 1N4001. SCR TYN604 is used to trigger.

    Let the current be 1mA. R=V/I=12V/1mA=12K.

    PROCEDURE:

    AC VOLTAGE REGULATOR USING SCR:1. Connections are made as shown in the circuit diagram.

    2. The supply is given by means of step down transformer.

    3. Anode terminal of SCR1 is connected to the anode terminal of diode, is

    connected to cathode of SCR1 by means of resistor as the load.

    4. Hence the voltage regulation is verified at load terminal.

    DC VOLTAGE REGULATOR USING SCR:

    1. Connect the two terminals at the top of bridge rectifier.

    2. The positive terminal of the bridge rectifier is connected to one terminal atthe load and at the other terminal to anode terminal of SCR.

    3. The pin 15 connected from the power supply to the load.

    4. Then the DC voltage regulation is checked and verified.

    RESULT:

    Thus both AC and DC voltage regulators were designed, constructed and theoutput waveforms were drawn.

  • 8/11/2019 Design Lab esd

    19/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 19 of 80

    CIRCUIT DIAGRAM:

  • 8/11/2019 Design Lab esd

    20/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 20 of 80

    Ex.No.3 SEQUENTIAL TIMER

    AIM:

    To design sequential timer to switch ON and OFF at least three delays in a

    particular sequence using IC 555 timer.

    APPARATUS REQUIRED:

    S.No Name of the Apparatus Range Quantity

    1 IC 555 3

    2 Bread Board 1

    3 Resistors 33k 3100k 3220 3

    4 RPS 15 Connecting wires As required

    6 Capacitors 10f 30.01f 6

    7 LED 3

    THEORY:

    Sequential timer is the simplest form of the process control timer in which

    many timing operations carried out sequentially one by one. Each timing operation iskept in active condition for a predefined amount of time and then goes to off

    condition. Similarly the controller activates all the operations as per the defined

    timings.

    This type of sequential controller is required for injection moulding machine,

    back sealing experiments where it required to activate solenoids, relays other

    activating mechanism for a predefined time sequentially one by one.

    Sequential timer is used for control process. The timer IC 555 is operated in

    monostable mode. The mode monostable multivibrator circuit is useful for generating

    single output pulse of adjustable data form in response to a trigger signal. The widthof the output pulse depends only on external component connected to the op-amp. The

    output of first multivibrator is given to the trigger input of the second one. Similarly it

    is connected in sequential order. The time period of each timer determine the

    triggering period of LED.

  • 8/11/2019 Design Lab esd

    21/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 21 of 80

    PIN DIAGRAM:

    MODEL GRAPH:

    OBSERVATION:

    LED 1 ON Time =

    LED 2 ON Time =

    LED 3 ON Time =

  • 8/11/2019 Design Lab esd

    22/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 22 of 80

    DESIGN:

    This relay should be energised for 1 sec.

    ON Time TH=1.1*R*C

    Here we design for 1 sec.

    By choosing the value of R=100k

    The value of C approximated to C=10fSimilarly we have

    RA=RB=RC=R=100k

    CA=CB=CC=C=10f

    PROCEDURE:

    1. The circuit connections were given as shown in circuit diagram.

    2. The triggering is given to pin 2 of timer 1.

    3. When the trigger pulse is given the LED glows one by one sequentially.

    RESULT:

    Thus the circuits for sequential timer was designed, constructed and outputs

    were verified.

  • 8/11/2019 Design Lab esd

    23/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 23 of 80

    CIRCUIT DIAGRAM:

    FSK MODULATOR:

  • 8/11/2019 Design Lab esd

    24/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 24 of 80

    Ex.No.4 WIRELESS DATA MODEM

    AIM:

    To design, construct and test wireless data modem using FSK modulator(555)

    and FSK demodulator (565).

    APPARATUS REQUIRED:

    THEORY:

    FREQUENCY SHIFT KEYING:A digital-to-analog modulation technique. Data is transmitted by shifting

    between two close frequencies with ones represented by one frequency and zeroes bythe other.

    Frequency-shift keying (FSK) is a method of transmitting digital signals. Thetwo binary states, logic 0 (low) and 1 (high), are each represented by an analogwaveform. Logic 0 is represented by a wave at a specific frequency, and logic 1 isrepresented by a wave at a different frequency. A modem converts the binary datafrom a computer to FSK for transmission over telephone lines, cables, optical fiber, orwireless media. The modem also converts incoming FSK signals to digital low andhigh states, which the computer can understand.

    Whenever the message or information signal rides over the carrier it is calledmodulation. In electrical sense the operation of riding over the amplitude of carriermeans to alter the amplitude of carrier. This is called amplitude modulation of thecarrier. Thus the message signal becomes the modulating signal and it is transmitted

    by variations in the amplitude of the carrier.The transmission media suffers three major problemsA. AttenuationB. Distortion

    C. Noise

    S.No Name of the Apparatus Range Quantity

    1 Transistor BC557 1

    2 IC 555 , 565 , 741 Each one

    3 Resistors 58K47K

    1K10K600

    12

    152

    4 Capacitors 0.01f , 0.1f0.02f

    25

    5 AFO & CRO 1

    6 RPS & Dual RPS 1

    7 Bread board & Connecting wires As required

  • 8/11/2019 Design Lab esd

    25/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 25 of 80

    FSK DEMODULATOR:

  • 8/11/2019 Design Lab esd

    26/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 26 of 80

    Due to these inherent problems, it is very difficult to have wide range of

    frequency in the signals that are transmitted. Therefore to transmit data over wireless

    medium, it is necessary to use a modulator which restore the number of frequency in

    the transmitted signal by employing digital modulation techniques like ASK, FSK or

    PSK. Also Binary PSK with non-coherent detection can also be employed.A modem is a device that takes the digital electrical pulses from a terminal or

    computer and converts them into continuous analog signal that is used for

    transmission. The binary FSK technique is employed for modulating the digital

    signals. IC 555 timer and transistor acting as switch, when the device acts as

    transformer. PLL IC 565 can be used for demodulator. It consists of phase detection

    LPF amplifier.

    DESIGN:

    FSK MODULATOR:

    ON time TH=0.693RBC

    OFF time TL=0.693(RA+RB)C

    Total time T=TH+TL=0.693(RA+2RB)C

    1

    f1=-------------------------- (1)0.69(RA+2RB) C1

    1

    f2=------------------------------------ (2)0.69(RA+2RB) C 1C2

    -----------

    C1+C2

    Duty cycle D=ON time/Total time=(RB)/(RA+2RB)=0.3

    RB= 0.3RA+0.6RB

    RB=0.75RA

    Let f1= 1050 Hz, f2= 1250 Hz, C1=0.01f

    From (1)

    11050=---------------------------------

    0.69(RA+2*0.75RA) 0.01f

    1

    =---------------------------------

    0.69*2.5RA*0.01f

    RA=55.2KRB=0.75RA

    RB=41.4K

  • 8/11/2019 Design Lab esd

    27/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 27 of 80

    PIN DIAGRAM:

    MODEL GRAPH:

  • 8/11/2019 Design Lab esd

    28/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 28 of 80

    From (2)

    1

    1250=------------------------------------------------

    0.69(55.2K+2(41.4K)) 0.01f*C2----------------

    0.01f+C2

    0.01f+C2

    C2 =-----------------------------------

    0.69(138K)1250*0.01f

    0.01f+C2

    C2 =---------------

    1.19

    1.19C2- C2=0.01f

    0.19C2=0.01f

    C2=52.63 nf

    FSK DEMODULATOR:

    Upper cut off frequency of RC ladder circuit fH=1/(2RC)Assume R2=R3=R4=R

    C2=C3=C4=C

    fH=(key in frequency+2 maximum frequency)/2

    =(150+2(1250))/2=1325Hz

    Let C=0.02f then R=1/(2CfH)=1/(2*1325Hz*0.02f )=7Kf0=0.3/(R1C1)

    f0=(f1+f2)/2=(1050+1250)/2=1150Hz

    Let C1=0.01f

    R1=0.3/(1150*0.01f)=26K

    flock=8f0/10=(8*1150)/10=920Hz

    fcapture should be less than flock.

    Choose fcapture =400Hz

    fcapture =(1/2)(2*flock)/(R0C0)

    R0=internal resistance=3.6K

    C0=(2flock)/(42fcapture

    2R0)=920/(2(400)

    2*3.6K)=254nf

  • 8/11/2019 Design Lab esd

    29/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 29 of 80

    OBSERVATION:

    INPUT:

    Amplitude = V

    ON time TH = ms

    OFF time TL= ms

    Frequency f = Hz

    FSK MODULATOR:

    For positive half cycle

    Amplitude = V

    ON time TH = ms

    OFF time TL= ms

    Frequency f = Hz

    For negative half cycle

    Amplitude = V

    ON time TH = ms

    OFF time TL= ms

    Frequency f = Hz

    FSK DEMODULATOR:

    Amplitude = V

    ON time TH = ms

    OFF time TL= msFrequency f = Hz

  • 8/11/2019 Design Lab esd

    30/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 30 of 80

    PROCEDURE:

    FSK MODULATOR:

    1. Connections are given as per the circuit diagram.

    2.

    The digital input was applied at the input of FSK modulator.

    3.

    The square wave output was noted in astable mode by CRO.

    FSK DEMODULATOR:

    1.

    Connections are given as per the circuit diagram.

    2.

    The FSK modulated output is given as a input in the demodulation

    circuit.

    3.

    The output of the demodulator gives a modulating signal by using

    voltage comparator was noted.

    RESULT:Thus the circuit for wireless data modem using FSK modulator (555) and

    demodulator (NE 656) were designed, constructed and outputs were verified.

  • 8/11/2019 Design Lab esd

    31/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 31 of 80

    CIRCUIT DIAGRAM:

    PIN DIAGRAM:

  • 8/11/2019 Design Lab esd

    32/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 32 of 80

    Ex.No.5 PCB LAYOUT DESIGN USING CAD

    AIM:

    To design Component/Board layout, PCB layout of the given circuit

    using AutoCAD 2000.

    PROCEDURE:

    1. Double click on AutoCAD 2000 or ACAD.

    2. Ensure that you select metric (i.e. you are telling AutoCAD that you will be

    drawing in metres and millimetres NOT feet and inches) in the dialog box.

    3. AutoCAD will now create a new drawing file named drawing1.dwg.

    4. Select various electronic components from FileOpenAutoCAD

    folderSample folderDesign Center folderAnalog IntegratedCircuits& Basic Electronics& CMOS Integrated Circuits.

    5. Thus Component/Board layout is drawn by various AutoCAD commands.

    6. Then PCB layout is drawn by various AutoCAD commands.

    COMPONENT/BOARD LAYOUT:

    PCB LAYOUT:

    RESULT:

    Thus the Component/Board layout, PCB layout of the given circuit using

    AutoCAD 2000 was designed.

  • 8/11/2019 Design Lab esd

    33/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 33 of 80

    APPENDIX

    AUTOCAD COMMANDS

    CAD is a abbreviation of Computer Aided Design and the term Auto indicates the

    company Name AutoDesk Inc., U.S., developed the Package AutoCAD.Starting AutoCAD:

    First, your computer should have Windows XP or Win 2000 Operating System.When

    u switch ON your computer, the Operating System is automatically loaded. Youcan

    start AutoCad by double clicking on AutoCAD icon on desktop of a computer.

    DONUT:

    Draws filled circles and rings.

    Command: Donut or Do

    Specify inside diameter of donut:Enter your value

    Specify outside diameter of donut:Enter your valueSpecify center of donut or :Click any point as center point

    VIEWRES:

    Sets the resolutions for objects in current view port.

    Command:viewers

    Do u want fast zooms[yes/no]: Press enter(fast zooms is no longer a functioning

    option of this command and remains for script compatibility only)

    Enter circle zoom present(1 20000 ): Enter an integer from 1 20000 or

    press Enter The model is regenerated.

    VIEWRES controls the appearance of circles, arcs, ellipses and splines using short

    vectors. The greater the no of vectors the smoother the appearance of circle or arc.

    For eg if u create a very small circle and then zoom in it might to appear to be

    polygon. Using VIEWRES to increase the zoom percentage and regenerate the

    drawing updates and smoothes the circle appearance. Decreasing the zoom percentage

    has the opposite effect.

    Before VIEWRES After VIEWRES

    VIEWRES at 15 VIEWRES at 500

    AutoCAD is a popular program because it can be customized to suit an

    individual's needs. The toolbars are a good example of this. You can have the toolbars

    you use most often on the screen all the time. You can easily make them go away sothat you have more drawing space. You can also customize them so you have the

  • 8/11/2019 Design Lab esd

    34/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 34 of 80

    most common commands on one toolbar. For example, the dimensioning toolbar is

    one that you will not want taking up space on your screen while drawing, but is very

    handy when you're dimensioning your drawing.

    Opening AutoCAD

    Open up AutoCAD, you should be greeted with a screen asking if you want to open

    an existing drawing or start from scratch. (Dependant on your version of AutoCAD,

    the screen will be slightly different - The image shown below is for AutoCAD 2002).

    Select 'Create Drawings', then 'Start from Scratch'. Ensure that you select metric (i.eyou are telling AutoCAD that you will be drawing in metres and millimetres NOT

    feet and inches).

    AutoCAD will now create a new drawing file named drawing1.dwg.

    AutoCAD will default to 'model space'. For now it is sufficient to say that model

    space is the blank space where all the drawing is carried out. Paperspace (now called

    Layout space since AutoCAD 2000) isn't really required until we are ready to plot

    (print) the drawing.

    Toolbars

    There are many toolbars available in AutoCAD. Go to View > Toolbars from the drop

    down menu to see them all. For now make sure that the following toolbars are

    checked:

    Draw - Contains AutoCADs most common drawing tools

    Modify - Contains all of the common editing commands such as erase, copy etc.

    Object Properties - Contains 'layer' information as well as object colours and line style

    options. (Covered Later).

    Standard Toolbar - Contains open & save options as well as zoom & pan options.

  • 8/11/2019 Design Lab esd

    35/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 35 of 80

    Object Snap - AutoCAD's intelligent drawing aid - joins lines at specific points.

    (Covered later).

    Arrange the icons to where is comfortable for you (A typical layout is shown below):

    The Command LineThe command line appears at the bottom of the AutoCAD screen (as shown above)

    and displays the commands entered. Commands can be entered into the command line

    in text format, or by using the icons or drop down menus. 'Old School' Cad users tend

    to type each command into the command line, as was required with older versions of

    AutoCAD. It is much quicker to familiarise yourself with the tool bars and drop down

    menus. There are times however when commands need to be typed into the command

    line, these will be covered later.

    Drawing Technique - AutoCAD's Co-ordinate systemJust before we start drawing, one more important point. AutoCAD works on a

    co-ordinate system. When drawing, we can be very precise and specify an exact point

    in space where a line should begin or end. The 2D co-ordinates system is based on the

    horizontal and vertical axis named x and y. (This is shown in the bottom left of the

    AutoCAD drawing area, the X Y icon is called the UCS).

  • 8/11/2019 Design Lab esd

    36/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 36 of 80

    Title Bar - This will show you what program you are running and what the current

    filename is.

    Pull-down menus - These are the standard pull-down menus through which

    you can access almost all commands.

    Main toolbar - This has most of the standard Windows icons, as well as the

    most common AutoCAD commands.

    Property toolbar - This toolbar gives a way to quickly modify an object's

    properties, such as layer and linetype.

    Floating toolbar - This is a toolbar that can be moved around the screen, or

    'docked' as the main toolbar is.

    Drawing space - This is where you draw. You have an almost infinite area to

    draw and this is just a 'section' of the entire space.

    Scrollbars - These work like in other windows programs. You can also use the

    PAN command to move around your drawing. WCS Icon - This is here to show you which direction positive X and positive

    Y go. The W means you're in the World Co-ordinate System. (It can be

    changed to a User Co-ordinate System.)

    Status Bar Tray Icons - These icons give you updates on items like reference

    files program updates and print status.

    Command line - When you type a command, you will see it here. AutoCAD

    uses this space to 'prompt' you for information. It will give you a lot of

    information and tell you where you are in the command. Watch this line while

    learning. Status bar - This allows to see and change different modes of drawing such as

    Ortho, Osnaps, Grid, Otrack, etc.

    Tool Palette - Collection of tools in one area that can be organized into

    common catagories.

    Command Keystroke Icon Menu Result

    Properties PROPERTIESModify >

    Properties

    Displays the

    properties of

    the object in theProperties

    Palette

  • 8/11/2019 Design Lab esd

    37/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 37 of 80

    Command Description Options

    COPY

    or

    CP

    Draws a copy of selected objects using two methods -

    - "base point" method, or "displacement" method.

    M Allows multiple copies

    to be made of an object

    BASE Specifies origin of current drawing for subsequent

    insertion into another drawing -- is normally set to

    point 0,0,0

    can be transparent

    DONUT

    or

    DOUGHNUT

    Draws filled rings with specified inside and outside

    diameters

    ERASE or E Erases selected entities from the drawing

    EXPLODE Separates a block, dimension or hatch pattern into its constituent entities or makes a

    polyline into a series of straight lines. In the case of a block that is exploded, if it

    was originally drawn on the 0 layer, it returns to that layer, regardless of the layer it

    was inserted on, and it loses its referential connection to the original block. In the

    case of a dimension or hatch pattern that has been exploded, their parts go back to

    the 0 layer, and are assigned the logical color (BYBLOCK) regardless of the layer

    they were drawn on. In the case of an exploded polyline, it loses any width it mayhave had.

    LINE or L Draws straight lines In reply to From Point: prompt, line begins at

    end of previous line or arc

    C In reply to To point: prompt, closes the polygon

    back to first "From Point"

    U In reply to To point: prompt, undoes last line

    segment

    MOVE or M Moves designated entities to another location

    NEW Creates a new drawing. When selected from a menu or typed in at the

    Command: prompt, this command brings up a dialogue box which allows setting

    a name for the new drawing by typing the name in the box, selection of a

    "prototype" drawing or typing a name of the new drawing and then an = sign

    and then the name of a drawing to be used as a prototype.

    OFFSET Creates a new line, polyline arc or circle parallel to the specifies

  • 8/11/2019 Design Lab esd

    38/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 38 of 80

    entity and at a specified distance from it. offset distance

    T "Through" allows

    specification of a point

    through which theoffset line, polyline,

    arc or circle is to pass

    OPEN Opens an existing drawing

    ORTHO Constrains drawing so that only lines aligned with the

    grid can be drawn -- usually means only horizontal or

    vertical lines, however, if the crosshairs are rotated

    through the "Snap" "Rotate" command sequence, the

    lines drawn are constrained to being parallel with the

    crosshair rotation. Constraint can be overridden by

    snapping to a point or by entering exact coordinates for

    endpoints.

    can be transparent

    OSNAP Enables points to be precisely located on reference

    points of existing objects. This is the so-called

    "Running Mode" of OSNAP, which sets selection

    method to run continuously until set to NON (none) or

    until overridden by selecting another "Interrupt Mode"OSNAP method from the cursor menu. Combinations

    of OSNAP methods can be used by selecting a series of

    options separated by commas. For instance, if you want

    ot always pick either endpoints or intersection points

    when locating endpoints of lines, you would issue the

    command as follows:

    OSNAP END,INT

    can be transparent

    CEN CENter of arc or

    circle

    END closest

    ENDpoint of arc orline

    INS INSertion point of

    Text or Block

    INT INTersection of

    line, arc, or circle

    MID MIDpoint of

    line, arc, rectangle

    side, or polygon side

    NEA NEArest pointselected by aperture on

    line, polyline, arc, or

    circle

    NOD NODe (another

    name for a Point)

    NON NONe -- used

    when a "Running

    OSNAP" is on to

    temporarily turn off

  • 8/11/2019 Design Lab esd

    39/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 39 of 80

    OSNAP selection

    PER PERpendicular

    point to line, arc or

    circle -- when used

    with an arc or circle itwill draw a line to the

    surface of the arc or

    circle heading toward

    the center point

    QUA QUAdrant point

    of arc or circle (top,

    bottom, right or left

    side)

    QUI QUIck mode --this is a modifier to

    one of the other

    OSNAP options -- it

    will find the first point

    that meets the

    requirements, not

    necessarily the closest

    point to the aperture.

    TAN TANgent point

    to arc or circle

    QSAVE Saves the current drawing "Quickly" without requesting a filename (as long as file

    has already been given a name)

    QUIT Exits AutoCAD -- if the current drawing has not been Saveds in its current state, a

    dialogue box will appear asking if you want to Save the drawing, Discard the

    changes, or Cancel the Exit command

    SNAP Specified a round-off interval for point entry sothat entities can be placed at precise locations

    can be transparent sets snap alignment

    resolution

    ON aligns designated points

    OFF does not align designatged

    points

    A sets aspect ratio (differing X

    and Y spacing)

  • 8/11/2019 Design Lab esd

    40/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 40 of 80

    R Rotates the snap grid and

    crosshairs, and turns on SNAP

    after, if not already turned on

    S Selects either Standard

    (rectangular) or Isometric Snap

    grid

    TEXT Draws text characters of any size with selected

    styles

    J Prompts for justification

    options

    S Lists or selects text style

    A Aligns text between two

    points, with style-specified

    width factor, AutoCAD

    computes approximate height

    proportional to length of text

    line

    C Centers text horizontally

    about a defined point

    F Fits text between two points,

    with specified height,

    AutoCAD computes

    approximate width factor to fillthe distance between the two

    points

    M Centers text horizontally and

    vertically about a defined point

    R Right-justifies text

    BL Bottom Left justification

    BC Bottom Center justification

    BR Bottom Right justification

    ML Middle Left justificationMC Middle Center justification

    MR Middle Right justification

    TL Top Left justification

    TC Top Center justification

    TR Top Right justification

    VIEWRES Allows you to control the precision and speed of circle and arc drawing on the

    monitor by specifying the number of sides in a circle. Acts like an AutoCAD

    variable. Recommend that it be set to 2000.

  • 8/11/2019 Design Lab esd

    41/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 41 of 80

    ZOOM Enlarges or reduces the display

    magnification of the drawing, without

    changing the actual size of the entities

    can be transparent

    multiplier from original

    magnification

    multiplier fromcurrent magnification

    multiplier of

    magnification relative to paper

    space -- used for plotting to get

    right plot scale in each viewport

    A ("All") fills limits of drawing to

    screen

    C ("Center") makes picked point

    the center of the screen

    D ("Dynamic") makes an adjustible

    rectangular lens appear on the

    screen which is capable of being

    made smaller or larger and moved

    to different positions over the

    drawing and once set by the user,the drawing will quickly zoom to

    the location and magnification set

    for the lens. This sub-command is

    no longer useful because all

    computers have very fast zooms

    naturally now.

    E ("Extents") makes the farthest

    edges of the actual visible drawing

    fill up the graphics screen

    L ("Lower-Left") makes the point

    picked become shoved to the lower-

    left corner of the graphics screen

    P ("Previous") zooms back to

    whatever the last zoom, previous to

    the current zoom was -- AutoCAD

    stores about 10 of these, so you can

  • 8/11/2019 Design Lab esd

    42/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 42 of 80

    walk backward in zoom

    magnification 10 times

    V ("Virtual Screen") makes the

    largest area available to thegraphics card fill the graphics

    screen -- this varies with the

    quantity of graphics RAM that your

    graphics card has

    W ("Window") asks you to pick the

    lower left corner and the upper right

    corner of a zoom window and then

    fits that window to the graphics

    screen

  • 8/11/2019 Design Lab esd

    43/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 43 of 80

  • 8/11/2019 Design Lab esd

    44/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 44 of 80

    Ex.No.6 MICROCONTROLLER BASED SYSTEMS DESIGN

    AIM:

    To design microcontroller based system for simple applications like security

    systems combination lock etc. using 89c series flash micro controller.

    APPARATUS REQUIRED:

    1. PC with windows operating system, RIDE IDE software, WINISP

    software

    2. 8051 microcontroller

    3. RS 232C Serial Cable

    4. Home Security System

    PROCEDURE:

    1. Use RS 232C Serial Cable to connect 8051 microcontroller through serial

    port.

    2. Set the DIP switch as follows

    DIP switch1: RS 232

    DIP switch2: PGM for Programming Flash mode, EXE for execution

    Mode DIP switch3: INT

    3.

    Write the ALP program (text document) in notepad, save as ASM

    language (ASM format) in Micro 51.4.

    Set the DIP switch2 in PGM for Programming Flash.

    5.

    Run WINISP.

    6.

    Set the parameter for the following fields in WINISP window

    A CHIP: P89C51RD2

    B PORT: Select Serial port connected to RS 232C Serial Cable

    C OSC: 12MHz

    7. If flash is not blanked, perform erase operation.

    8. Load hexa file containing the object code to be programmed into flash

    from Micro 51 by clicking load file.9. Program the flash by clicking program part.

    10.Set the DIP switch2 in EXE for execution mode.

    11.Enter the password in Home Security System.

    12.If a valid password is given, door will open.

    RESULT:

    Thus microcontroller based system for simple applications like security

    systems combination lock etc. using 89c series flash micro controller was

    designed and executed.

  • 8/11/2019 Design Lab esd

    45/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 45 of 80

  • 8/11/2019 Design Lab esd

    46/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 46 of 80

    PROGRAM:

    $include(reg51xa.inc)org 0000h;

    IOCONT equ 0ffc0h ;DCONT equ 0ffc4h ;address assign for lcd data lineCONTR1 equ 0ff0fh ;Control register of the 8255_1.Port1A equ 0ff0ch ;Port APort1B equ 0ff0dh ;Port BPort1C equ 0ff0eh ;Port CContr equ 0ff13h ;Control register of the 8255_2.PortA equ 0ff10h ;Port A.PortB equ 0ff11h ;Port B.PortC equ 0ff12h ;Port C.

    call Bussy_check ;call lcd_IOCONT ;mov A,#38h ;mov dptr,#DCONT ;movx @dptr,A ; 5*7 matrix lcd init.

    call Bussy_check ;call lcd_IOCONT ;mov A,#80h ;mov dptr,#DCONT ;movx @dptr,A ; starting location .

    call Bussy_check ;call lcd_IOCONT ;mov A,#04h ;mov dptr,#DCONT ;movx @dptr,A ; Set cursor move direction.

    call Bussy_check ;call lcd_IOCONT ;

    mov A,#0Eh ;mov dptr,#DCONT ;movx @dptr,A ; enable display,cursor ,cursor blining

    call Bussy_check ;call lcd_IOCONT ;mov A,#01 ;mov dptr,#DCONT ;movx @dptr,A ; clear display.

  • 8/11/2019 Design Lab esd

    47/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 47 of 80

  • 8/11/2019 Design Lab esd

    48/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 48 of 80

    mov dptr,#MYDATA ;mov r7,#80h ;1st line data displaymov r3,#16 ; r3 load display characters lengthlcall display ;call display routine

    mov dptr,#MYDATA1 ;mov r7,#0c0h ;2nd line data displaymov r3,#16 ; r3 load display characters lengthlcall display ; call display routinecall delay ;call delay ; call delay routinemov r4,#3 ;this value initialise for no time wrong password access

    jump_start:call Bussy_check ;call lcd_IOCONT ;mov A,#01 ;

    mov dptr,#DCONT ;movx @dptr,A ; clear display.mov dptr,#MYDATA2 ;mov r7,#80h ;1st line data displaymov r3,#9 ; r3 load display characters lengthlcall display ;

    ;~~~~~~;4*4 matrix key read;8255_1 Assign Port A and Port C are output port and port B is input portkey_start:mov dptr,#CONTR1 ;Dptr load Control register address.mov A,#83h ;Acc load 83hex.movx @dptr,A ;Dptr point to Acc .mov r2,#06 ;no of character use in password.mov dptr,#4000h ;dptr contain address of 4000h.;this address locationcontiniously contain password character.

    back_keystart:mov r0,dpl ;dpl contain lower byte of dptr.mov r1,dph ;dph contain higher byte of dptr.dec r2 ;decrement r2 value.mov a,r2 ;Acc load r2.

    jnz getdata ;Acc!=0 load another char.ljmp end1 ;If Acc==0 goto password compare.getdata:mov A,#00 ;Acc load 0.mov dptr,#Port1A ;PortA init.movx @dptr,A ;Port1A load 0.continue:mov dptr,#Port1B ;key Read continiously checkingmovx A,@dptr ;Acc load dptr point to the value.anl A,#0fh ;logical operation of Acc and 0f.cjne A,#0fh,key_Next ;if Acc!=0x0f read charsjmp continue ;if Acc==0x0f key continiously checking

    ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;ROW 1 ;;;;;;;;;;;;;;;;;;;;;;;;;

  • 8/11/2019 Design Lab esd

    49/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 49 of 80

  • 8/11/2019 Design Lab esd

    50/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 50 of 80

    key_Next:mov a,#0eh ;Acc load 0x0e.0x0e is 4th row of key pad.mov dptr,#Port1A ;dptr load port1A address.movx @dptr,A ;dptr point to Acc.Port1A load Acc value.mov dptr,#Port1B ;dptr contain Port1B address.movx A,@dptr ;Acc load dptr point to the value.

    anl A,#0fh ;AND operation for Acc and 0x0f.cjne A,#0fh,ctrow1 ;compare Acc and 0x0fhsjmp row1 ;Acc==0x0f go to row1.if Acc!=0x0f go to ctrow1.ctrow1:cjne A,#0eh,Next30 ;compare to colomn wise key.mov A,#30h ;Acc load

    0x30.0x30 ASCII char is '0';ljmp key_end ;

    Next30:cjne A,#0dh,Next31 ;mov A,#31h ;Acc load 0x31.0x31 ASCII char is '1';ljmp key_end ;

    Next31:cjne A,#0bh,Next32 ;

    mov A,#32h ;Acc load 0x32.0x32 ASCII char is '2';ljmp key_end ;

    Next32:cjne A,#07h,row1 ;mov A,#33h ;Acc load 0x33.0x33 ASCII char is '3';

    ljmp key_end ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ROW 2 ;;;;;;;;;;;;;;;;;;;;;;;;;

    row1 :mov a,#0dh ;Acc load 0x0d.0x0d is 3rd row of key pad.mov dptr,#Port1A ;movx @dptr,A ;mov dptr,#Port1B ;movx A,@dptr ;anl A,#0fh ;cjne A,#0fh,ctrow2 ;sjmp row2 ;ctrow2:cjne A,#0eh,Next34 ;mov A,#34h ;Acc load

    0x34.0x34 ASCII char is '4';sjmp key_end ;

    Next34:cjne A,#0dh,Next35 ;mov A,#35h ;Acc load 0x35.0x35 ASCII char is '5';sjmp key_end ;

    Next35:cjne A,#0bh,Next36 ;mov A,#36h ;Acc load 0x36.0x36 ASCII char is '6';sjmp key_end ;

    Next36:cjne A,#07h,row2 ;mov A,#37h ;Acc load 0x37.0x37 ASCII char is '7';sjmp key_end ;

  • 8/11/2019 Design Lab esd

    51/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 51 of 80

  • 8/11/2019 Design Lab esd

    52/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 52 of 80

    ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ROW 3 ;;;;;;;;;;;;;;;;;;;;;;;;;

    row2:mov a,#0bh ;Acc load 0x0b.0x0b is 2nd row of key pad.mov dptr,#Port1A ;

    movx @dptr,A ;mov dptr,#Port1B ;movx A,@dptr ;anl A,#0fh ;cjne A,#0fh,ctrow3 ;sjmp row3 ;ctrow3:cjne A,#0eh,Next38 ;mov A,#38h ;Acc load

    0x38.0x38 ASCII char is '8';sjmp key_end ;

    Next38:cjne A,#0dh,Next39 ;

    mov A,#39h ;Acc load 0x39.0x39 ASCII char is '9';sjmp key_end ;

    Next39:cjne A,#0bh,Next41 ;mov A,#41h ;Acc load 0x41.0x41 ASCII char is 'A';sjmp key_end ;

    Next41:cjne A,#07h,row3 ;mov A,#42h ;Acc load 0x42.0x42 ASCII char is 'B';sjmp key_end ;

    ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ROW 4 ;;;;;;;;;;;;;;;;;;;;;;;;;

    row3:mov a,#07h ;Acc load 0x07.0x07 is 1st row of key pad.mov dptr,#Port1A ;movx @dptr,A ;mov dptr,#Port1B ;movx A,@dptr ;anl A,#0fh ;cjne A,#0fh,ctrow4 ;sjmp key_end ;ctrow4:cjne A,#0eh,Next43 ;

    mov A,#43h ;Acc load0x43.0x43 ASCII char is 'C';sjmp key_end ;

    Next43:cjne A,#0dh,Next44 ;mov A,#44h ;Acc load 0x44.0x44 ASCII char is 'D';sjmp key_end ;

    Next44:cjne A,#0bh,Next45 ;mov A,#45h ;Acc load 0x45.0x45 ASCII char is 'E';sjmp key_end ;

    Next45:cjne A,#07h,key_end ;mov A,#46h ;Acc load 0x46.0x46 ASCII char is 'F';

    sjmp key_end ;key_end : mov r7,A ;

  • 8/11/2019 Design Lab esd

    53/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 53 of 80

  • 8/11/2019 Design Lab esd

    54/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 54 of 80

    call display2 ;display key read char.mov dpl,r0 ;mov dph,r1 ;mov A,r7 ;movx @dptr,A ;get char Store to Dptr .Dptr Base address 4000h.

    inc dptr ;Vary dptr.each char contion cotinious memory 4000hto4004h.lcall delay ;delay routine.

    jump:ljmp back_keystart ;if get another char goto back_key start.END1:lcall compare ;two string compare routine.; compare Enter passwordroutine compare :mov r2,#5 ;r2 load count of char .mov dptr,#Password ;dptr contain base address of the Password.mov r3,#00 ;r3 load 0x00.equal:mov r0,dpl ;r0 contain lower byte of dptr.mov r1,dph ;r1 load higher byte of dptr.mov a,#00 ; Acc load 0x00;

    movc a,@a+dptr ;Acc contain code segment data.mov B,A ;B reg. load Acc.mov dptr,#4000h ;dptr contain address 4000h.inc r3 ;mov a,r3 ;sjmp jump2 ;incr: inc dptr ;

    jump2:djnz r3,incr ;mov r3,A ;mov A,#00 ;movx a,@dptr ;cjne A,B,NOT_equal ;compare Acc value And B reg.value.mov dpl,r0 ;mov dph,r1 ;inc dptr ;djnz r2,equal ;lcall step_motor ;Call step_motor routine .mov r4,#3 ;ljmp jump_start ;

    NOT_equal:djnz r4,busser_0ff ;mov A,#82h ;

    mov dptr,#CONTR1 ;movx @dptr,A ;mov A,#01 ;mov dptr,#Port1C ;minimum 3 times Put wrong password.after buffer is ON.movx @dptr,A ;lcall access_stop ;display Access denied.and system not access it when afterreset.sjmp Re_start ;

    busser_0ff:call Bussy_check ;call lcd_IOCONT ;mov A,#01 ;

    mov dptr,#DCONT ;movx @dptr,A ; clear display.

  • 8/11/2019 Design Lab esd

    55/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 55 of 80

  • 8/11/2019 Design Lab esd

    56/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 56 of 80

    mov dptr,#MYDATA4 ;mov r7,#80h ;1st line data displaymov r3,#16 ; r3 load display characters lengthlcall display ;mov dptr,#MYDATA5 ;

    mov r7,#0c0h ;2nd line data displaymov r3,#16 ; r3 load display characters lengthlcall display ;lcall delay ;lcall delay ;ljmp jump_start ;Re_start:sjmp Re_start ;

    ;Access denied subroutineaccess_stop : call Bussy_check ;call lcd_IOCONT ;

    mov A,#01 ;mov dptr,#DCONT ;movx @dptr,A ; clear display.mov dptr,#MYDATA6 ;mov r7,#80h ;1st line data displaymov r3,#16 ; r3 load display characters lengthlcall display ;ret ;

    ;Stepper motor routine;stepper motor rotate clockwise and anticlockwise direction;control register set 0x80 all Ports are output port.step_motor :mov A,#80h ;mov dptr,#Contr ;Control register address assign Dptr.movx @dptr,A ;all ports are output port.;Stepper motor rotate forward directionmov r3,#0 ;

    back5:mov dptr,#Port1C ;movx A,@dptr ;

    jz forward_end ;mov dptr,#stepper ;mov r1,dpl ;mov r2,dph ;mov r0,#04h ;call rotate ;call rotate subroutine.inc r3 ;mov a,r3 ;cjne a,#13,back5 ;forward_end:call delay ;;Stepper motor rotate reverse direction

    back_6:mov dptr,#reverse ;mov r1,dpl ;

  • 8/11/2019 Design Lab esd

    57/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 57 of 80

  • 8/11/2019 Design Lab esd

    58/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 58 of 80

    mov r0,#04h ;call rotate ;call rotate subroutine.djnz r3,back_6 ;ret ;

    ;door delay routinedelay1 : mov r7,#01h ;back3:mov r6,#0A1h ;back1:mov r5,#0ffh ;next:djnz r5,next ;djnz r6,back1 ;djnz r7,back3 ;ret ;

    ;Steper motor rotate clockwise and anti clockwise direction.

    rotate : back_:mov a,#0h ;movc A,@A+dptr ;mov dptr,#PortA ;movx @dptr,A ;call delay1 ;inc r1 ;mov dpl,r1 ;mov dph,r2 ;djnz r0,back_ ;ret ;

    ;Bussy_check subroutineBussy_check :mov A,#02 ;mov dptr,#IOCONT ;movx @dptr,A ;mov dptr,#DCONT ;

    back:movx A,@dptr ;anl A,#80h ;cjne A,#00,back ;

    mov A,#00 ;mov dptr,#IOCONT ;movx @dptr,A ;

    ret ;

    ;lcd enable rotinelcd_IOCONT :mov A,#00 ;mov dptr,#IOCONT ;movx @dptr,A ;ret;

  • 8/11/2019 Design Lab esd

    59/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 59 of 80

  • 8/11/2019 Design Lab esd

    60/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 60 of 80

    ;lcd display subroutinedisplay :

    back4:mov A,r7 ;mov r0,dpl ;mov r1,dph ;

    call bussy_check ;call lcd_IOCONT ;mov dptr,#DCONT ;mov A,r7 ;movx @dptr,A ;mov dpl,r0 ;mov dph,r1 ;mov a,#0h ;movc A,@A+dptr ;mov r6,A ;call bussy_check ;

    mov A,#01 ;mov dptr,#IOCONT ;movx @dptr,A ;mov A,r6 ;mov dptr,#DCONT ;movx @dptr,A ;mov dpl,r0 ;mov dph,r1 ;inc r7 ;inc dptr ;djnz r3,back4 ;ret ;

    display2 :call bussy_check ;mov A,#01 ;mov dptr,#IOCONT ;movx @dptr,A ;mov A,#2ah ;mov dptr,#DCONT ;movx @dptr,A ;ret ;

    ;delay routinedelay: mov r7,#003h ;

    back_3:mov r6,#0ffh ;back_1:mov r5,#0ffh ;next_:djnz r5,next_ ;djnz r6,back_1 ;djnz r7,back_3 ;ret ;

  • 8/11/2019 Design Lab esd

    61/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 61 of 80

  • 8/11/2019 Design Lab esd

    62/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 62 of 80

    MYDATA :db " Vi Security " ;MYDATA1 :db " System ";MYDATA2 :db "Password: ";MYDATA3 :db 0eh,0dh,0bh,07h ;

    Password :db "00000";reverse :db 0ah,06h,05h,09h ; ANTI CLOCKWISE DIRECTIONstepper :db 09h,05h,06h,0ah ; CLOCKWISE DIRECTIONMYDATA4 :db " checkyour ";MYDATA5 :db " Pass word ";MYDATA6 :db " Access Denied " ;end;

  • 8/11/2019 Design Lab esd

    63/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 63 of 80

    CIRCUIT DIAGRAM:

    AMPLITUDE MODULATION:

  • 8/11/2019 Design Lab esd

    64/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 64 of 80

    Ex. No.7 DESIGN OF AM MODULATION AND DEMODULATIONDate:

    AIM:To design AM signal using multiplier IC for the given carrier frequency and

    modulation index and demodulate

    APPARATUS REQUIRED:

    S.No Name of the Apparatus Range Quantity

    1 IC MC1496 1

    2 Bread Board 1

    3 Resistors 51k

    kk

    3,5,1,1

    4kkk

    2,2,1,1,1

    4 RPS 1

    5 Connecting wires As required

    6 Capacitors 10f 10.001f,0.1f,0.01f

    1,2,1

    7 FG 2

    8 Diode IN 4001 1

    PROCEDURE:

    Connections are made as per the circuit diagram Give the modulating signal to pin no 10 through the FG. Give the carrier signal to pin no 10 through the capacitor of 0.1f using

    another FG.

    Note down the AM signal at pin no 6.

    Choose the amplitude level of converter keeping frequency at constant depthof modulation was calculated.

    Give AM signal to pin no 1 of demodulator circuit. Note down the demodulator signal at pin no 2 of IC 1496.

  • 8/11/2019 Design Lab esd

    65/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 65 of 80

    CIRCUIT DIAGRAM:AMPLITUDE DEMODULATOR:

    MODEL GRAPH:

    TABULATION:

    THEORY:

  • 8/11/2019 Design Lab esd

    66/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 66 of 80

    Modulation: It is the process in which the characteristics of high

    frequency carrier wave is varied in accordance with instantaneous value of

    other wave.

    Amplitude Modulation: The amplitude of carrier wave is varied in accordancewith the instantaneous values of message signal is called amplitude

    modulation.The bandwidth of the AM is twice the bandwidth of the base band

    signal. The amplitude modulation wave also produces two sidebands(Upper

    and Lower).

    The extent of amplitude variation in AM about unmodulated carrier amplitude

    is measured in terms of a factor called modulation index defined as the ratio

    of modulating signal amplitude to carrier amplitude. This factor also known

    as depth of modulation, degree of modulation and modulation factor(ma).

    If ma1 then the

    modulation is called over modulation, ma=1 then the modulation is called

    critical modulation.

    AM Demodulation: It is the process of extracting the message signal by using

    a same carrier that was used for modulation from the modulated signal.

    The most commonly used AM detector is simple diode detector. The

    signal at the secondary is half wave rectified by diode D. This diode is thedetector diode the resistance R is the load resistance to rectifier and C is the

    filter capacitor. In the positive half cycle of the AM signal diode conducts and

    current flows through R, where as in negative half cycle, the diode is

    reverse biased and no current flows. Therefore only positive half of the AM

    signal appears across R. Capacitor reconstructs the original modulating signal

    and high frequency carrier is removed.

    Result:Thus the AM modulation and demodulation circuits were constructedand modulation index was calculated.

    CIRCUIT DIAGARM:

  • 8/11/2019 Design Lab esd

    67/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 67 of 80

    FREQUENCY MODULATION:

  • 8/11/2019 Design Lab esd

    68/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 68 of 80

    Ex. No.7 DESIGN OF FM MODULATION AND DEMODULATIONDate:

    AIM:To design FM signal using IC 566 for the given carrier frequency and

    demodulat the FM using PLLNE 565.

    APPARATUS REQUIRED:

    S.No

    Name of the Apparatus Range Quantity

    1 IC 566 1

    2 Bread Board 1

    3 Resistors 39 kkk

    1,1,1

    4 RPS 1

    5 Connecting wires As required6 Capacitors 0.01f, 0.001f 1,27 FG 1

    THEORY:

    Modulation:

    It is the process in which the characteristics of high frequency carrier

    wave are varied in accordance with instantaneous value of other wave.

    Frequency Modulation:

    Frequency modulation is the process of varying the frequency of a

    carrier wave in proportion to the instantaneous amplitude of the modulating signal

    without any variation in the amplitude of the carrier wave. Because the amplitude of

    the wave remains unchanged, the power associated with an FM wave is constant.

    When the modulating signal is zero, the output frequency equals fc

    (centre frequency).When the modulating signal reaches its positive peak, the

    frequency of the modulated signal is maximum and equals(fc+ fm). At negative peaks

    of the modulating signal, the frequency of the FM wave becomes minimum and equal

    to (fc- fm).Thus, the process of frequency modulation makes the frequency of

    the FM wave to deviate from its centre frequency(fc).By an amount ( + or - f) where

    f is termed as the frequency deviation of the system. During this process, the total

    power in the wave does not change but a part of the carrier power is transferred to the

    side bands. There are two types of FM they are

    1.Narrow band FM

    2.Wide band FM

    Frequency demodulation

    It is a process which is used to receive the origin of signals.

  • 8/11/2019 Design Lab esd

    69/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 69 of 80

    MODEL GRAPH:

    TABULATION:

  • 8/11/2019 Design Lab esd

    70/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 70 of 80

    PROCEDURE:

    Connections are made as per the circuit diagram Give the modulating signal to pin no 5 through the FG.

    Note down the corresponding amplitude and time period of the FM modulatedsignal.

    Apply the modulated signal as input to the PLL.

    RESULT:

    Thus the frequency modulation and its demodulation circuits were designedand waveforms are plotted.

  • 8/11/2019 Design Lab esd

    71/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 71 of 80

    CIRCUIT DIAGRAM:

    TRUTH TABLE:

  • 8/11/2019 Design Lab esd

    72/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 72 of 80

    Ex. No.8 PSUEDO RANDOM SEQUENCE GENERATORDate:

    AIM:

    To generate the pseudo random sequence using linear feedback shiftregister and verify the output using truth table.

    APPARATUS REQUIRED:1.DFF(IC 7484)2.XOR (IC 7486)3.Digital Trainer kit4.connecting wires

    PROCEDURE:

    Connections are made as per the circuit diagram. Logic inputs are given as per the circuit diagram. Observe the output and verify the the truth table.

    RESULT:

    Thus the pseudo random sequence was generated using linear feedback shift

    register and the output was verified using truth table.

  • 8/11/2019 Design Lab esd

    73/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 73 of 80

    ALU PROGRAM:

  • 8/11/2019 Design Lab esd

    74/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 74 of 80

    Ex. No.9 DESIGN OF ARITEMETIC LOGIC UNITDate:

    AIM:

    To write HDL program for designing arithmetic logic unit andsimulate it using xilinx ISE9.2i.

    SOFTWARE USED:

    XILINX ISE 9.2i

    PROCEDURE:

    i) Open project navigator.

    ii)

    Go to the file and click the new projectiii) Type the project name as synthesisiv)

    The property wizard is open to check all properties such asproduct, categories, family, device etc. then click next

    v)

    Create new source wizard appears then click nextvi) Project summary is displayed then click nextvii) Go to the project and click new sourceviii)

    Then type the full name half adder as well as select verilogmodule then click next

    ix) Define module window here we assign the input and output ofhalf adder, clicks next and click finish

    x)

    Type the program and save itxi)

    Make sure that the source is in BEHAVIOURxii) Then click the ISE simulator and view the signal windowxiii)

    Force the input data corresponding circuitxiv)

    Simulate the program using ISE simulator

    RESULT:

    Thus the HDL program was written for arithmetic logic unit and

    simulated using xilinx.

  • 8/11/2019 Design Lab esd

    75/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 75 of 80

  • 8/11/2019 Design Lab esd

    76/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 76 of 80

    Ex. No.10 DESIGN A DSP BASED SYSTEM FOR ECHO CANCELLATIONDate:

    AIM:

    To write A Matlab program for echo cancellation.

    SOFTWARE USED:

    Matlab

    PROGRAM:clc; clear all; close all;format shortT=input('enter the symbol interval T');

    br=input('enter the bit rate value br');rf=input('enter the roll off factor rf');n=[-10 10];y=5000*rcosfir(rf,n,br,T);ds=[5 2 5 2 5 2 5 2 5 5 5 5 2 2 2 5 5 5 5];m=length(ds);n1=length(y);i=1;z=conv(ds(i),y);while (i)

    z1=[z,zeros(1,1.75*br)];z=conv(ds(i+1),y);z2=[zeros(1,i*1.7*br),z];z=z1+z2;i=i+1;

    end%plot(z);

    h=randn(1,length(ds));rs1=filter(h,1,z);for i=1;length(ds),

    rs(i)=rs1(i)/15;

    endfor i=1:round(x3/3),rs(i)=randn(1);

    endfs=[5 5 2 2 2 2 2 5 2 2 2 5 5 5 2 5 2 5 2];m=length(ds);n1=length(y);i=1;z=conv(fs(i),y);while(i)

    z1=[z,zeros(1,1.75*br)];

    z=conv(fs(i+1),y);z2=[zeros(1,i*1.75*br),z];

  • 8/11/2019 Design Lab esd

    77/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 77 of 80

  • 8/11/2019 Design Lab esd

    78/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 78 of 80

    z=z1+z2;i=i+1;

    endfs1=rs+fs;ar=xcorr(ds,ds);

    crd=xcorr(rs,ds);l1=length(ar);

    j=1;for i=round(11/2):11,

    ar1(j)=ar(i);j=j+1;

    endr=toeplitz(ar1);l2=length(crd);

    j=1;for i=round(12/2):12,

    crd1(j)=crd(i);j=j+1;

    endp=crd1;lam=max(eig(r));la=min(eig(r));l=lam/la;w=inv(r)*p;e=rs-filter(w,1,ds);s=1;mu=1.5/lam;ni=1;while(sle -10)

    w1=w-2*mu*(e.*ds);rsy4=filter(w1,1,ds);e=y4-rs;s=0;e1=xcorr(e);for i=1:length(e1),

    s=s/length(e1);if(y4==rs)

    breakendni=ni+1;w=w1;

    endfigure(1);subplot(2,2,1);

    plot(z);title('near end signal');subplot(2,2,2);

    plot(rs);

    title('echo produced in the hybrid');subplot(2,2,3);

  • 8/11/2019 Design Lab esd

    79/80

    EC-76 ESD LAB MANUAL

    Einstein College of EngineeringPage 79 of 80

  • 8/11/2019 Design Lab esd

    80/80

    EC-76 ESD LAB MANUAL

    plot(fs);title('desired signal');subplot(2,2,4);

    plot(fs1);

    title(' echo added with desired signal');figure(2);subplot(2,1,1);

    plot(y4);title('estimated echo signal using LMS algorithm');subplot(2,1,2);

    plot(fs1-y4);title('echo cancelled signal');