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Page 1: Current-voltage characteristics of Pd2Si based Schottky diodes on p-type (111) silicon and evaluation of their barrier heights

Solid-Sfofe Ekcrronicr Vol. 38. No. 5, pp. 1103-l 104. 1995

0038-1101(94)00250-9 Copyright fe 1995 Elsevier Science Ltd

Printed in Great Britain. All rights reserved 0038-I 101195 m$9.50 + 0.00

NOTE

CURRENT-VOLTAGE CHARACTERISTICS OF Pd,Si BASED SCHOTTKY DIODES ON p-TYPE (111) SILICON AND EVALUATION OF THEIR

BARRIER HEIGHTS

(Received 18 October 1994)

INTRODUCTION

Metal silicide based Schottky barrier diodes with low barrier heights have found applications as infrared detectors and sensors in thermal imaging devices operated at cryogenic temperatures[ll3]. As a consequence, the studies on them have been pursued with vigour in the recent past from both fundamental and application viewpoints. Emphasis has been on the understanding of their current transport be- haviour. Of particular interest are Pd,Si and PtSi based devices. Although several reports exist on various aspects of PtSi based Schottky diodes[47], few investigations have been undertaken on Pd,Si systems over a wide temperature range[8,9]. An attempt has therefore been made in this direction and Pd,Si/p-Si Schottky barrier diodes are studied for the first time at temperatures between 60 and 201 K. A brief account of the findings is given in this note.

EXPERIMENTAL

The Pdz Si Schottky diodes have been prepared on p-type boron doped silicon wafers of (1 II) orientation. The p/p’ silicon wafer used had a 12-l 8 pm thick epitaxial p-layer of resistivity 2-3 Qcm over the underlying heavily doped p+ region of resistivity 0.01 tim. Ohmic contacts were estab- lished on the back (i.e. p+) side of the silicon wafer by depositing aluminium (after usual cleaning and etching in dilute HF) and subsequent annealing in nitrogen at 450°C for 30 min. Subsequently, palladium film (thickness - 800 A) was deposited by employing an electron beam evaporation source onto the epitaxial p-layer (i.e. front side) of the precleaned silicon wafer and annealed at 450°C in vacuum - 10e5 mbar for 2 h to form a Schottky junction. The diodes have been studied by measuring their I-V characteristics in the temperature range 60-201 K using a CTI-cryotronics close-cycle helium refrigerator model 22C equipped with a Lake Shore temperature controller model 805 and a computer controlled measurement set-up. The data are evaluated in terms of thermionic emission-diffusion current equation. Moreover, zero bias barrier and flat band (zero field) barrier heights have been determined. X-ray diffraction revealed the formation of Pd,Si during the heat treatment at 450’ C for 2 h in vacuum - 10m5mbar.

RESULTS AND DISCUSSION

I-V plots of these PdzSi Schottky barrier diodes obtained under forward bias condition in the temperature range 60-201 K are shown in Fig. I. The I-V characteristics are indeed linear over several order of current at lower tempera- tures. Figure I clearly depicts that the In(l) vs V plot becomes progressively straight over a wide bias range as the temperature is lowered. Such an observation suggests the dominance of the thermionic emissiondiffusion mechanism

for current transport. This feature is quite consistent with the fact that thermionic emission condition (ptE>>r/4; p = mobility of the charge carriers, E = electric field in the depletion region and o = average velocity of the carriers) is valid only at low temperatures and high electric field E (i.e. correspondingly large forward bias) for Schottky barrier on p-type silicon[lO]. At temperatures above 201 K, the junc- tion tends to become nearly ohmic. The reason perhaps lies in Schottky junctions exhibiting low barrier heights on p-type silicon.

The saturation current at each temperature is found from the intercept of the linear portion of the In(r) vs V plot at

T(K) 231 191 132 172 164 155 147 138

,O_~~l,,,,,,,,,,,,,~,,,,,,,,,,,.,,,,,,,.,,,., 00 0.1 02 03 c

FORWARD BIAS (Volts)

,o-“l,f9 ,, , ,,,, ,,,,, ,, , ~ 00 01 0.2 03 c

1 1

FORWARD BIAS (Volts)

Fig. I, Current-voltage characteristics of the Pd, Si/p-Si Schottky barrier diodes at different temperatures.

1103

Page 2: Current-voltage characteristics of Pd2Si based Schottky diodes on p-type (111) silicon and evaluation of their barrier heights

Note

02 ~,,,,,,,~‘,,,,‘,,‘,‘,‘~,‘,,,,,,,,~’I 50 100 150 200

TEMPERATURE (K)

Fig. 2. Variation of the zero bias barrier height (&,O) and Rat band barrier height (4:) with temperature. There is a signifi~nt decrease in tpw below 107 K while a substantial increase in &, beiow 76K. Also, &, essentially remains

constant over a wide temperature range 76-201 K.

zero bias (V = 0) and then used to obtain zero bias barrier height (4w), taking the effective Richardson constant as 32 A/cm? K? for p-type silicon(I I]. Another parameter known as ideahty factor (9) is determined from the slope of the linear portion of the In(i) - I; characteristics. Using values of Cpw, and q, fiat band (zero field) barrier height (4i ) is evaluated from the expression[l2]:

$~=r&,o-(~ - l)(kTlq)ln(NviN,)q (1)

where N, is the effective valence-band density of states. N, is the doping density of p-type silicon, X- is the Bohzmann constant. 7’ is the absolute temperature and y the electronic charge.

The zero bias barrier height (&,) and the ideality factor (p) found at various temperatures are shown in Figs 2 and 3. respectively. The corresponding flat band barrier height (4;) values evaluated from expression (I) are depicted in Fig. 2. Also, the results are summarized in Table I. The & initially decreases slowIy with decrease in temperature up to about 107 K and then decreases sharply. The variation in temperature range 201-107 K is such that the value of &,,

2 0 -,--

50 loo 150

TEMPERATURE (K)

200

Fig. 3. Temperature dependence of the ideality factor (7). There is sharp increase in u as the temperature falls below

107 K.

Table I. The zero bias barrier height (q&f, idealiry factor (7) and flat band (zero field) barrier height (4:) of Pd,Si/p-Si Schottky barrier diodes at various tempera-

1U~~S

Temperature d, hil 411, (K) (eV) q (eV)

201 0.360 I.18 0.404 191 0.358 I.19 0.404 282 0.355 I.21 13.406 172 0.352 1.21 0.404 164 0.351 I.22 0.408 155 0.351 I.21 0.406 147 0.3.52 1.20 0.405 I38 0.348 I.21 0.405 131 0.349 I.20 0.405 I22 0.348 I.20 0.402 115 0.346 I.21 0.404 107 0.344 1.20 0.403 98 0.33s 1.24 0.402 92 0.334 I .24 0.401 84 0.320 1.29 0.401 76 0.308 I .36 0.406 70 0.307 I .40 0.418 65 0.306 I.45 0.430 60 0.300 1.52 0.442

lies between 0.360 and 0.344eV. The ideality factor is around 1.20 in the temperature range 201-107 K but in- creases significantly below 107 K and assumes a value of I .52 at 60 K. The flat band barrier height (#i) is invariably higher than &. In 201-76 K temperature range #k is nearly constant with a mean value of 0.404eV but increases thereafter to a value of 0.442 eV at 60 K. The values of & and 4: are in good agreement with the reported results of Chin et a1.[8]; their values for &.O and 4: at 84 K being 0.356 and 0.406 eV. respectively. A detailed analysis concerning various aspects of Pd,Silp-Si Schottky barriers is being given in the forthcoming article.

~~Jferials Science Pragrffm~le Subhash Chand Indian Institute of Technology Jitendra Kumari Kanpur 208016 U.P. India

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REFERENCES

H. Elabd, T. S. Villani and W. F. Kosonocky, ZEEE Trans. Electron Devices L.et~. EDL3, 89 (1982). W. F. Kosonocky and H. Elabd, SPIE443, 167 (1983). W. F. Kosonocky, F. V. Shallcross, T. S. Villani and J. V. Groppe, IEEE Trans. Electron De&es ED-32, 1564 564 (1985). D. Donoval, M. Barus and M. Zdimal, Solid-St. Elec- fron. 34, 1365 (1991). V. W. L. Chin, M. A. Green and J. W. V. Storey, Solid-St. Electron. 33, 299 (1990) and 36, 1107 (1993). L. P. Wang, J. R. Yang and J. Hwang, J. appl. Phvs. 74, 6251 (1971). M. Wittmer, Phvs. Reo. B 43. 4385 (1991). V. W. L. Chin, J. W. V. Storey and M. A. Green, Solid-St. Electron. 34, 215 (1991). J. H. Werner and H. H. Guttler, f. ap& P!ryf. 73, 1315 (1993). E. H. Rhoderick and R. H. Williams, Metal- Semiconductor Contacts. 2nd edn. Clarendon Press, Oxford (1988). S. M. Sze, Physics of Semiconductor Detrices, 2nd edn. Wiley, New York (1981). L. F. Wagner, R. W. Young and A. Sugerman, IEEE Trans. Electron Det+ce.s Lett. EDL-4, 320 (1983).

tTo whom all correspondence should be addressed.