csc 2405: computer systems i - villanova...

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CSC 2405: Computer Systems II

Spring 2013 (TR 8:30-9:45 in G86)

Mirela Damian http://www.csc.villanova.edu/~mdamian/csc2405/

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Introductions • Mirela Damian – Room 167A in the Mendel Science Building – [email protected]

• Teaching Assistant – Mohan Kumar Puttasiddaiah ([email protected])

• Programming assistants – Mendel G85, in the left corner of the room

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Course Goals: “Look under the hood”

• “Help you learn what happens “under the hood” of computer systems

• Two downward tours:

2400: Language levels tour � High-level language (C) → assembly language →

machine language (IA-32)

2405: Service levels tour � High-level language (C) → standard libraries →

operating system (Unix)

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Structure of Course (Part I) • Computer Systems Overview

• Processes – Creating and executing processes

• Then study process cooperation – Communication through pipes, sockets – Signaling processes

•  Implement a smart Unix shell

• Midterm

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Structure of Course (Part II) •  Implement a process simulator

• Threads – Sharing global data – Synchronization with semaphores

• Then study multi-threaded servers

• Memory Management

• Security

• Final Exam

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Course Schedule • Very generally…

Weeks Lectures 1-2 Computer Systems Overview 2-7 Processes Midterm

Spring Break 8-11 Online lectures

Project work Easter Break

12-15 Threads, Memory Management, Security

• See course web site for details

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Course Resources • NO Required textbooks

• Lots of online resources

• Class website

http://www.csc.villanova.edu/~mdamian/CSC2405.html

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Class Work • Programming projects – Writing your own Unix shell – Implementing your own process scheduler – Etc.

• Several smaller assignments

• One midterm, one final exam

• Group work – Only if specified in the assignment – Individual learning assessed through quizzes

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Facilities for Programming • Unix cluster – Machines: csgate, tanner, degas, cezanne,

picasso,rodin, cassatt, gauguin, matisse – List displayed when logging into csgate

• Linux machines – felix, helix

• Logging in to the machines remotely – SSH available for download from the CSC

website

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Grading and Schedule • Assignments & Quizzes (50%) – On time (no late submission) – First assignment is available now

• Exams (45%)

• Class participation (5%)

• No makeup assignments or exams

• Lecture attendance is mandatory

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Key to Success • Start early to allow time for debugging.

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A modern computer consists of:

•  One or more processors •  Main memory •  Disks •  Printers •  Various input/output devices

Managing all these components requires a layer of software – the operating system

Computer System Overview

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Computer System Architecture

This model provides a good study framework.


Main Memory (Review)   The only large storage area that CPU can access directly   Hence, any program executing must be in memory   Main memory is an array of bytes or words:

0 1 2

10100111 11010010 11000010 00101001

Memory Addresses

Memory

. . .

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Memory Hierarchy (Review) A typical memory hierarchy.

The numbers are very rough approximations.

Cache Principle The more frequently data is accessed, the faster the

access should be.


Central Processing Unit (CPU)

  Runs the loop Fetch-Decode-Execute

Fetch Next Instruction START

Execute Instruction

Execute Instruction

Execute Instruction

HALT

Fetch Cycle Execute Cycle

Decode Instruction START

Decode Cycle

q  Fetch the next instruction from memory q  Decode the instruction to figure out what to do q  Execute the instruction and store the result

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Fetch-Decode-Execute   Where is the “next instruction” held in the machine?

-  CPU register called the Program Counter (PC) holds the address of the instruction to be fetched next

  Fetch cycle -  Copy instruction from memory into Instruction Register

  Decode cycle -  Decode instruction and fetch operands, if necessary

  Execute cycle -  Execute the instruction -  Increment PC by the instruction length after execution

(assuming that all instructions are the same length)


Device Controller (Review)   Special-purpose processor   In charge of a particular

device type   Has registers

(data, control, status)   Has local buffer storage

  I/O is from the device to local buffer of controller   CPU moves data from/to memory to/from local buffer   I/O devices and CPU can execute concurrently

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I/O Operation Example

CPU

Keyboard Controller

Keyboard c = getchar();

What happens?


Input / Output (I/O)   To start an I/O operation, the CPU tells the controller:

-  The chunk size be transferred (eg, one character) -  Goes off to do something else

  The device controller: -  Checks registers to determine what to do (read, write) -  Transfers data to/from device from/to local buffer

-  Informs the CPU when transfer is complete – HOW?

We will answer this briefly.

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Where Does the OS Fit?

Operating System

System Calls (Traps)

Users and

User Programs

Web Browser

Music Player

Interrupts Device Control

Communicating with the OS: Exceptions (Traps and Interrupts)

Villanova University

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Here is an analogy. . .

Teacher OS is

each student I/O device is

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Inefficient solution: Polling

OS

device 1 ready?

device 2 ready?

device n ready? . . .

ask

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Turn the situation upside down

OS

device 1 device 2 device n . . .

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The analogy continues. . .

Teacher (tries to) answer question

OS handles interrupt

is

Student with a question raises hand

device ready sends interrupt request

is

Types of Exceptions

1.  Interrupts 2.  Traps

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Exceptions

l  An exception is a transfer of control to the OS in response to some event (i.e., change in processor state)

User Process OS

exception exception processing by exception handler

exception return (optional)

event current!next!

Asynchronous Exceptions (Interrupts) l Caused by external events l Examples:

–  I/O interrupts l  Hitting CTRL-C at the keyboard l  Arrival of a packet from a network l  Arrival of a data sector from a disk

– Hard reset interrupt l  Hitting the reset button

– Soft reset interrupt l  Hitting Ctl-Alt-Delete on a PC

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Synchronous Exceptions l  Caused by events that occur as a result of executing an

instruction: –  Traps

l  Intentional l  Examples: system calls, breakpoint traps l  Returns control to “next” instruction

–  Faults l  Unintentional but possibly recoverable l  Examples: page faults (recoverable), protection faults (unrecoverable). l  Either re-executes faulting (“current”) instruction or aborts.

–  Aborts l  Unintentional and unrecoverable l  Examples: parity error, machine check. l  Aborts current program

Example Synchronous Exceptions

l  Divide by zero – n / 0 l  Segmentation fault – program tries to access memory it

doesn’t “own” l  Abnormal termination – abort l  Overflow – usually mult or add l  Bad or illegal instruction – no such function l  Termination request – program requests to exit

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Interrupt Vectors

–  Each type of event has a unique exception number k

–  Index into jump table (a.k.a., interrupt vector)

–  Jump table entry k points to a function (exception handler).

–  Handler k is called each time exception k occurs.

interrupt vector

0 1 2 ...

n-1

code for exception handler 0



code for exception handler n-1

...

Exception !numbers!


Interrupt Handling l  The interrupt architecture

–  Must save the Program Counter (PC) prior to transferring control to the interrupt service routine (interrupt handler)

–  Restore PC upon returning from interrupt

l  Interrupt handler –  Save registers that are to be modified onto the stack –  Service request (eg, copy data from local buffer in memory) –  Mark the process blocked on I/O as ready to run –  Restore registers from the stack

l  Interrupted computation resumes as the point it left off.

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  Hardware may trigger interrupts at any time by sending a signal to the CPU by way of system bus (sets CPU interrupt PIN)

  When the CPU is interrupted -  Stops what it is doing -  Transfers control to the Interrupt Vector

Hardware Interrupts


CPU Check for Interrupts Every …

Fetch Next Instruction START

Execute Instruction

Execute Instruction

Execute Instruction

HALT

Fetch Cycle Execute Cycle

Decode Instruction START

Decode Cycle

???

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  Interrupts must be handled quickly

  Interrupts are a critical part of a computer system -  They allow a program to be interrupted, so the computer

may deal with an urgent event   All modern computer systems are interrupt-driven

CPU Cycle with Interrupts

START START Execute Execute Instruction

Check for Interrupt:

Process Interrupt Check for Interrupt:

Process Interrupt

Fetch Cycle Decode Cycle Execute Cycle Interrupt Check

Interrupts disabled

Interrupts Enabled

Fetch Instruction

Decode Instruction

START HALT


Direct Memory Access I/O   To start an I/O operation, the CPU tells the DMA

controller: -  The chunk size to be transferred (eg, 4096 bytes of data) -  The memory address where the chunk ought to be stored

  The DMA controller -  Accesses the device via its controller -  Transfers the chunk from/to device to/from system

MEMORY -  Interrupts CPU when transfer is complete

  Benefits -  The CPU is only involved at the start and end of transfer -  Interrupts are now less frequent -  Hence, CPU can do a lot of work between interrupts

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count = read(fd,buffer,nbytes);

DMA Example

CPU Disk Controller

Disk drive Memory


  Software may trigger interrupts by system calls or illegal operations (such as invalid memory access, divide by zero)

Software Interrupts

Hardware

Operating System

Users and User Programs System Calls (Traps)

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Trap Walkthrough   What happens when a user executes a system call such

as read? In Unix, for instance: count = read(fd,buffer,nbytes) which reads up to nbytes from the file described by fd into buffer. The actual number of bytes read is returned

  Steps:

1.  Push third parameter on to the stack. 2.  Push second parameter on to the stack. 3.  Push first parameter on to the stack. 4.  Call the library routine, which involves pushing the return

address on to the stack and jumping to the routine.


Trap Walkthrough

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Trap Walkthrough 5.  Machine/OS dependent actions. One is to put the

system call number for read in a well defined place, e.g., a specific register. This requires assembly language.

6.  Trap to the kernel (assembly language). This enters the operating system properly and shifts the computer to privileged mode.

7.  Use the system call number to access the interrupt vector pointing to the handler for this trap.

8.  The read system call handler processes the request (see below).


Trap Walkthrough 9.  Return to user mode (ret) and jumps to the location right

after the trap. 10. The library routine returns (count is also returned). 11. The stack is popped (ending the function call read).

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l  Opening a File –  User calls open(filename, options)

l  Function open executes system call instruction int –  OS must find or create file, get it ready for reading or writing –  Returns integer file descriptor

User Process OS

exception Open file

return

int pop

0804d070 <__libc_open>: . . . 804d082: cd 80 int $0x80 804d084: 5b pop %ebx . . .

Trap Example

User Process OS

page fault Create page and load into memory return

event movl

l  Memory Reference –  User writes to memory location –  That portion (page) of user’s memory is

currently on disk

–  Page handler must load page into physical memory

–  Returns to faulting instruction –  Successful on second try

int a[1000]; main () { a[500] = 13; }

80483b7: c7 05 10 9d 04 08 0d movl $0xd,0x8049d10

Fault Example #1

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User Process OS

page fault

Detect invalid address event movl

l  Memory Reference –  User writes to memory location –  Address is not valid

–  Page handler detects invalid address –  Sends SIGSEG signal to user process –  User process exits with “segmentation fault”

int a[1000]; main () { a[5000] = 13; }

80483b7: c7 05 60 e3 04 08 0d movl $0xd,0x804e360

Signal process

Fault Example #2


The Operating System

Resource Principle An Operating Systems is a set of algorithms that allocates

resources to processes.

Beautification Principle An Operating Systems is a set of algorithms that hide the

details of the hardware and provide a more pleasant environment

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Summary   Main computer system components:

-  CPU, Memory, I/O Devices   Fetch-Decode-Execute-InterruptCheck cycle   I/O device controllers

-  Special processors -  Use local buffers for I/O transfer

  Software interrupts (system calls, traps) vs. hardware interrupts

  Interrupt handling steps   Interrupt-Driven I/O with DMA

csc 2405: computer systems i - villanova...

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