1

Abstract – The Unified Power Flow Controller (UPFC) is

nowadays the most versatile FACTS controller, offering a unique combination of shunt and series compensations to enable flexible control of power systems. In this paper, the modeling, control design and detailed digital simulation of an UPFC, in the MATLAB/SIMULINK environment is presented. The model of the UPFC, connected to a power network through a transmission line, is shown and used to design suitable controllers. The two back-to-back connected multilevel converters of the UPFC are simulated, considering the power semiconductors switching, using standard SIMULINK blocks to obtain faster simulations. The transmission line and the power system are simulated using the Power System Blockset to provide flexibility. The simulation interface of the two multilevel converters with the Power System Blockset is explained and simulation results shown and discussed.

Index Terms – FACTS, Unified Power Flow Controller (UPFC), Multilevel Converter, Modeling, Control, Simulation.

I. INTRODUCTION ecent economic, social and legislative developments have demanded the review of traditional power transmission systems and the creation of new concepts

and practices, allowing full use of existing power generation and transmission facilities without compromising system availability and security.

The need for new power flow controllers capable of increasing transmission capacity and controlling power flows through predefined transmission corridors will certainly increase.

Due to the rapid development in the field of power electronics, an increasing number of high power semiconductor converters are used for transmission system control and power flow optimization, under the heading of Flexible AC Transmission Systems (FACTS) devices [1,2].

One particular concept, called the Unified Power Flow Controller (UPFC), has been proposed by Gyugi in 1992 [2], that combines the functions of some FACTS devices and is capable to control a wide range of typical transmission parameters, such as voltage, line impedance and phase angle.

The UPFC is perhaps the most versatile of the FACTS controllers, offering a unique combination of shunt and series compensations and guaranteeing flexible power

1) Natália M.R. Santos and Vítor M.F. Pires are with the Department of

Electrical Engineering, Escola Superior de Tecnologia, Polytechnics Institute of Setúbal, Setúbal, Portugal (e-mail: nrosa@est.ips.pt, vpires@est.ips.pt)

2) J. Fernando Silva and Rui M.G. Castro are with Instituto Superior Técnico, Technical University of Lisbon, at Centro de Automática da Universidade Técnica de Lisboa and Electrical Energy Center, Lisboa, Portugal, respectively (e-mail: fernandos@ist.utl.pt, rcastro@ist.utl.pt)

system control [3,4]. The flexible power flow control and high dynamics can be achieved by applying electronic power converters [5]. It is particularly beneficial to use power converters based on full controlled switches, such as Gate Turn Off thyristors (GTO) and the more recently available high power Insulated Gate Bipolar Transistor (IGBT), suitable to handle higher switching frequencies.

One solution to high power application is the use of multilevel converters [6], which can operate at higher DC voltages than two level converters, allowing higher power handling capability with reduced harmonic distortion and lower switching power losses.

Considering the increasing capabilities of MATLAB/ SIMULINK software package for simulation of dynamical systems, the semiconductor level non-linear state-space models, programmed in MATLAB/SIMULINK [7], can be efficiently used to simulate power converters and to design and study their controllers.

The last versions of MATLAB/SIMULINK include a power systems toolbox (Power System Blockset – PSB), a design tool [8] for modeling and simulating electric power systems within the SIMULINK environment. This toolbox features the most commonly used power devices (generators, transformers, transmission lines, voltage sources) and electrical models of power semiconductors, and allows the simulation of power systems and power electronics.

The objective of this paper is to present the model of a UPFC connected to a transmission line of a power network (section II), active and reactive power control design (section III) and detailed digital simulation (section IV) of the UPFC in the MATLAB/SIMULINK environment. The two back-to-back connected multilevel converters of the UPFC are computer simulated, considering the switching behavior of the power semiconductors, using standard SIMULINK blocks to obtain faster simulations. The multilevel converters use sliding mode internal loops to control the input currents, output voltages and to equalize the DC voltages of the DC link capacitors. The transmission line and the power system are simulated using PSB to provide flexibility in modifying the network topology. The simulation interface of the two multilevel converters with PSB is explained and simulation results are shown and discussed.

II. SYSTEM CONFIGURATION AND MODELING The basic operation principle of a UPFC can be found in

open literature [2]-[5]. The schematic diagram of the UPFC basic structure consists of two switching power multilevel converters connected back-to-back through a common DC link (Fig. 1).

Modeling, Controller Design and Semiconductor Level Simulation of a Multilevel UPFC

Natália M.R. Santos1, J. Fernando Silva2, Vítor M.F. Pires1 and Rui M.G. Castro2

R

2

IvR Ts

XL

Tsh

+ VcR -I

Bus 1 Bus 2 IB2IB1

VcR

+ VvR -

θvR θcR

Shunt converter

Seriesconverter

VvR

Udc

Transmission line

Fig. 1. UPFC schematic diagram

The series multilevel converter provides the main function of the UPFC by injecting a voltage, with variable magnitude (VcR) and phase angle (θcR), through a series connected transformer (Ts). Because the transmission line current flows through this voltage source, the series converter exchanges active and reactive power with the transmission line through the transformer (Ts).

The shunt multilevel converter (Fig. 1) is required to supply or absorb the active power demanded by the series converter at the common DC link, i.e., to keep constant the DC link voltage. Furthermore, it can also generate or absorb a reactive power, Q1, from bus 1 independently.

The equivalent circuit of a UPFC, used to derive the steady-state model, is shown in Fig. 2, where the output of the series converter is modeled as a voltage source connected in series (VcR) and the input of the shunt converter is a current source connected in parallel (IvR) with the line.

G2 G1

VcRXcR

IvR

XL

V1 V2

I I1

V0

Fig. 2. UPFC model equivalent circuit

The main advantages of this topology are the separate operation of both sources, as two independent reactive power controllers, and the simultaneously compensation of the active power.

Considering Fig. 2, the currents are given by (1) where XL is the line reactance and XcR is the series reactance:

L

cR

cR

vR

jX

jX

201

01

1

VVVI

VVI

III

−+=

−=

−=

(1)

The complex voltage at nodes 1 and 2, V1 and V2, the complex voltage source VcR and the complex current source IvR, are given by (2), where δ is the phase angle between voltages V1 and V2, θcR is the phase angle of VcR and θvR is the phase angle of IvR.

vRcR jvR

jcR

-j eIeVeVV θθδ ==== vRcR21 IVVV ;;; 21 (2)

The complex power equation can be written as follows:

( )

( )

⎪⎪⎪⎪⎪⎪⎪⎪

⎩

⎪⎪⎪⎪⎪⎪⎪⎪

⎨

⎧

+−=

+=

+=

+=

+−⎟⎟

⎠

⎞⎜⎜⎝

⎛+

−=

+=

+++++=

vRcRL

vRLvR

vRcRL

vRLvR

cRcRL

cRcR

cRcRL

cRcR

cRLcRLcR

L

cR

cRL

vRcRvRcR

senθXXIVXQ

cosθXXIVXP

cosθXX

VVQ

senθXX

VVP

cosδXX

VVVXXX

XX

Q

senδXX

VVP

QQQjPPPS

1

1

1

1

21210

210

00

1

(3)

As can be seen from (3), in a transmission system without UPFC (VcR=0, IvR=0), the active and reactive powers should be P0 and Q0 defined in (3). The power transfer on the transmission line can be fine tuned by adjusting the magnitude of voltage (VcR) and the phase angle (θcR), assuming θcR∈[-π/2, +π/2].

III. ACTIVE AND REACTIVE POWER FLOW CONTROL IN THE TRANSMISSION LINE

The series converter is controlled to generate the desired magnitude of the voltage VcR (VcRref) and the desired phase angle θcR (θcRref≈π/2), to maintain both active and reactive power flows respectively, at the transmission line, close to some pre-specified values.

The shunt converter supplies the active power demanded by the series converter at the common DC link, maintaining constant the common DC link voltage Udc. The shunt converter can also regulate the reactive power injected at bus 1. Therefore, the UPFC operation tries to enforce the reference variables: active and reactive power (Pcref, Qcref) for the series converter and Iqref, Udcref, for the shunt converter (Fig. 3).

+ VcR - I 1

IvR

2

VcR

+VvR -

Udcref

θcR

Shunt ConverterAC/DC

Series Converter DC/AC

Iqref

Udc

Series Converter Control

Shunt Converter Control

Reactive Power Loop Control

Active Power Loop Control

-

-

-

+

+

+ Pcref Qcref

P Q

XL

Fig. 3. UPFC control structure

A. Active Power Controller To design the control system for active and reactive

power (series converter), the equivalent circuit of Fig. 2 was considered [9]. For most practical systems, the power converters can be assumed ideal, θcR≈π/2, and XcR, IvR can be

3

neglected when compared to XL and I1 respectively. Therefore, from (3), the transfer function (∆PcR/∆VcR) of the system, at a given operating point, can be written as in (4).

cRL

cR VXVP ∆=∆ 1 (4)

Assuming low pass filter devices with time constant Tl to measure P and Q, and considering (4), the block diagram of the P control is represented in Fig. 4.

Pref C(s)

P+ ∆PcR ∆VcR

LXV1

- lsT+1

1

Fig. 4. Block diagram of active power control

A PI (proportional-integral) controller C(s) is used to provide zero steady state error, while ensuring stability. The PI gains KpP and KiP, are calculated in (5) to obtain a first order behavior with time constant τeq.

11

andV

XKVTXK

eq

LiP

eq

lLpP ττ

== (5)

The KpP and KiP values depend on the line reactance XL, on the voltage V1 and on the time constants Tl and τeq.

B. Reactive Power Controller The analysis of the reactive power controller assumes the

same conditions of the analysis of the active power controller. Therefore, from (3) the transfer function (∆QcR/∆θcR) is:

cRL

cRcR X

VVQ θ∆−=∆ 1 (6)

The block diagram of the reactive power control system is presented in Fig. 5.

Qref C(s)

Q+ ∆QcR ∆θcR

L

cR

XVV1− -

lsT+11

Fig. 5. Block diagram of reactive power control

Similarly, the gains of the PI controller C(s) (Fig. 5), KpQ

and KiQ, are:

cReq

LiQ

cReq

lLpQ VV

XKVVTXK

11

andττ

−=−= (7)

The PI controller for Q has gains dependent on XL, V1, Tl, τeq and also on the series voltage source VcR.

IV. MULTILEVEL CONVERTER MODEL The presented active and reactive control loops have been

used in one UPFC with two back-to-back connected multilevel converters and the whole system simulated using standard SIMULINK blocks. The used approach considers the switching behavior of ideal power semiconductors, to obtain accurate and fast simulations. The series converter uses sliding mode to control the output voltages needed to

enforce P and Q. The shunt converter also uses sliding mode control [10] in an internal loop to enforce the input currents needed to supply the series converter needed power, to inject reactive power into bus 1 and to equalize the DC voltages of the DC link capacitors (Fig. 6).

To apply sliding mode control concepts and space vectors, the three phase neutral point clamped three level converter [11], shown in Fig. 6, is first modeled in the α,β frame.

um2

UC1

UC2

S11 S21 S31

S21 S22 S32

S13 S23 S33

S14 S24 S34

ii0

i’i’0

Udc

I1 I2 I3

C1

C2

D11

D12

D21

D22

D31

D32

I’1 I’2 I’3

i1

i2

i3

um1

um3

ic1

ic2

Us1

Us2

Us3

AC Load

Fig. 6. Three phase, neutral point clamped, three level converter topology

The state variables of the multilevel converter (assuming ideal components) are the AC currents i1,2,3 and DC voltages Uc1 and Uc2. Depending on the sign of the current i0, the converter operates in inverter mode (i0 >0, DC/AC converter) or in rectifier mode (i0 <0, AC/DC converter) [11].

The valid switch states of one leg can be ideally represented by a switching variable γk(t) (8). Assuming Uc1=Uc2=Udc/2, the possible leg output voltages (Udc/2; 0 ; -Udc/2), Umk will be Umk=γk(t) Udc/2.

⎪⎩

⎪⎨

⎧

∧∧∧−

∧∧∧

∧∧∧

=

OFFare21ONare43if1

OFFare41ONare32if0

OFFare43ONare21if1

kSkSkSkSkSkSkSkSkSkSkSkS

kγ (8)

Then, the converter output Us voltages can be given by:

2

32

31

31

31

32

31

31

31

32

3

2

1dc

sUU⎥⎥⎥

⎦

⎤

⎢⎢⎢

⎣

⎡

⎥⎥⎥⎥⎥⎥

⎦

⎤

⎢⎢⎢⎢⎢⎢

⎣

⎡

−−

−−

−−

=γγγ

(9)

Using the Concordia transformation between fixed frames 1,2,3 and α,β, the state-space model in the α,β frame, is obtained by [11]:

223

230

21

211

32

3

2

1dc

s

s UUU

⎥⎥⎥

⎦

⎤

⎢⎢⎢

⎣

⎡

ΓΓΓ

⎥⎥⎥⎥

⎦

⎤

⎢⎢⎢⎢

⎣

⎡

−

−−=⎥

⎦

⎤⎢⎣

⎡

β

α (10)

where:

4

( )

( )

( )3213

3212

3211

231

231

231

γ+γ−γ−=Γ

γ−γ+γ−=Γ

γ−γ−γ=Γ

(11)

A. Output Voltage Control of Multilevel Series Converter Sliding mode [11] is used to control the output voltage of

converter. The control objective imposes, in a certain switching period T, that the output voltages (10) USα USβ (denoted USα,β) average values must equal their reference

average values refsU

α and

refsUβ

(virtual flux control):

011,0 ,0 , ==− ∫∫ βαβαβα Us

T

S

T

refS edtUT

dtUT

(12)

Therefore, the sliding surface S(eα,β,t), able to enforce the control goal USα,β=USα,βref is (12), where kα,β is used to impose the switching frequency:

( ) ( ) 0,0

,,,

, ∫ =−=T

SrefS dtUUT

kteS βαβα

βαβα

(13)

Using sliding mode stability, the switching law must select the proper values of USα,β [12] to verify the reaching condition [10]:

( ) ( ) ( )teSteSteS ,,, ,,, βαβαβα ε−<& (14)

where ε is a sufficiently small error. The control action must guarantee:

( ) ( )( )teSteS ,sign, ,, βαβα ε−=& (15)

which is ensured by choosing the appropriate vector from all the available 27 possible output voltage vectors [11], represented in the α,β frame. This can be done increasing the USα,β voltage levels, if:

( ) ( )teSteS ,, ,, βαβα ε> and ( ) 0,, >teS βα& (16)

or decreasing the USα,β voltage levels if:

( ) ( )teSteS ,, ,, βαβα ε−< and ( ) 0,, <teS βα& (17)

This strategy is able to select one of the 19 distinct output voltage vectors. The extra ones are load redundant but can be used to equalize the capacitor voltages (so that Uc1=Uc2=Udc/2) [6,11]. As Uc1 and Uc2 depend on the γk (t) control variables, a suitable sliding surface is:

( ) 0)()(, 21 =−== ccUUcUUc UUktekteS (18)

Since its derivative is:

( ) ( )C

iiCi

Cie CC

Uc2

22

231

21

2321 γγγγ −+−=−=& (19)

choose a vector guarantying:

( ) ( ) 0222

231

21

23 <−+− ii γγγγ if ( ) 0, >teS Uc (20)

or ensuring

( ) ( ) 0222

231

21

23 >−+− ii γγγγ if ( ) 0, <teS Uc (21)

These extra conditions enable the choice of most redundant vectors.

B. Input Current Control of Multilevel Shunt Converter In accordance with Fig. 3, the shunt converter operates

mostly in rectifier mode, supplying the active power for the series converter, maintaining the common DC link voltage constant Udc=Udcref, and regulating the reactive power Q1 injected at bus 1. As the input currents must exhibit a fast dynamics compared to the slow dynamics of Udc, the two tasks can be accomplished determining, respectively: 1) The Idref current suitable to maintain constant the DC bus voltage level (thus supplying the series converter needed active power), using a PI controller with gains kpv and kiv determined to obtain low sensitivity to current i0, being:

∫ −+−=t

dcrefdcivdcrefdcpvdref dtUUkUUkI0

)()( (22)

and 2) Iqref is Iqref = Q1/vd. The sliding surfaces to control the iα,β currents, derived

from the Idref and Iqref using the Park transformation, are [6,11]:

( ) ( )βαβαβαβα ,,,, , iikteS refii −= (23)

Efficient choice of space vectors [6,11] for the shunt converter is similar to the series converter. The shunt converter voltage level USα,β is increased if:

( ) ( )teSteS ii ,, ,, βαβα ε> and ( ) 0,, >teS i βα& (24)

or decreased if:

( ) ( )teSteS ii ,, ,, βαβα ε−< and ( ) 0,, <teS i βα& (25)

The herein presented multilevel converters control loops, together with the switching models (9) and (10) have been modeled using standard SIMULINK [7] blocks to obtain faster simulations.

V. CASE STUDY In order to validate the proposed model of the UPFC, a

simplified test network (Fig. 7) was chosen, which consists of two generators (315kV, 50Hz), one transmission line and a load.

The inclusion of the UPFC in a network will not only improve steady state load flow but also enhance network transient stability and accuracy.

UPFC

G2 Ts G1

Tsh

ZL=3+j31.4Ω

Udc

Transmission line: 315kV

SG1=100MVA SG2=200MVA

PL=300MW QL=120MVAr

STsh=10MVA 315kV/1.5kV

STs=3x4MVA 31.5kV/3.15kV

Fig. 7. Test network model

5

The herein proposed simulation layout tries to minimize the high simulation times needed by the two multilevel converter power semiconductors of the UPFC, if represented by MATLAB/SIMULINK [7] power system models using the “Power System Blockset” PSB [8], a MATLAB/ SIMULINK toolbox that includes electrical models of power devices. Instead, much faster SIMULINK blocks are used to implement switching models (9), (10). Furthermore, to enhance flexibility, the electrical network elements are added as PSB models to easily enable the simulation of real networks with UPFC, for transient studies. The test network model as well as the interface between the UPFC (using SIMULINK signals incompatible with the voltages and currents of the AC network), are herein described.

The developed UPFC network interface is implemented using PSB blocks and data found in Fig.7. Fig. 8 shows the block diagram used in the MATLAB/SIMULINK program to simulate the network presented in Fig. 7. Most blocks are straightforward to implement except the series and shunt branch blocks.

The Fig. 8 block diagram includes the Interface 1 that corresponds to the series multilevel converter connection with the transmission line, and the interface 2 corresponding to the connection of the shunt multilevel converter with the line transmission by transformer Ts.

The Interface 1 contains the subsystem “Series Branch”, detailed in Fig. 9 (a). It includes three single-phase transformers (31.5kV/3.15kV each) and three controllable voltage sources to allow the connection of SIMULINK outputs to electrical quantities. To inject the desired voltage VcR to control the active and reactive power flow in the transmission line, the voltage applied to the primary of the series transformer should be the multilevel inverter output voltage VcR1,2,3, which is imposed by a controllable voltage source, dependent of voltage signals generated by UPFC.

Using this procedure, the interface between the UPFC model developed in SIMULINK and the PSB “Series Branch” features high flexibility and makes it possible to adapt the model to most power systems.

The Interface 2 is represented by the shunt transformer, the output filter (load) and the subsystem “Shunt Branch”, as shown in Fig. 8. The shunt transformer is a three phase linear transformer with YY connection (315kV/1.5kV, 10MVA), which is connected to the shunt converter input filter, mainly inductive. Adequate parameters must be

(a)

(b)

Fig. 9. (a) Series branch block diagram; (b) Shunt branch block diagram chosen for this input filter in order to limit the input currents ripple for the allowed switching frequency [12].

The subsystem “Shunt Branch” was implemented using the block diagram of Fig. 9 (b), with three controllable voltage sources depending on values of the shunt converter output voltages.

VI. SIMULATION RESULTS The digital simulation results of active and reactive power

flow control by the UPFC system are shown in Fig.10. Initial values are Pref=30MW and Qref=12Mvar (per phase). Steps are applied at t=0.25s to Pref=100MW and at t=0.6s to Qref=40Mvar (per phase).

The Pref step disturbs the Q controller and the Qref step disturbs the P controller (Fig.10), but active and reactive power flows are quickly restored to their reference values, with a response time near two time constants.

Fig. 8. SIMULINK block diagram for network model

6

0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1

1

2

3

4

5

6

7

8

9

10

11

12

t [s]

P [MW

], Q

[MVAr]

PrefQrefPQ

Fig. 10. Simulated results of active and reactive power (phase 1)

Fig. 11 (a) presents the simulated results of rms series voltage VcR in phase 1, while Fig. 11 (b) shows the rms shunt converter current (phase 1). In both cases, after the cross influence imposed by the Pref and Qref steps, the controller response is satisfactory, stable and well balanced.

Fig. 12 (a) presents the simulated results of three-phase series voltage VcR, with the active and reactive power at their reference values, i.e., at the end of the simulation period of 1s, showing near sinusoidal balanced voltages. Furthermore, as illustrated in Fig. 12 (b), the three phase current of the shunt converter after the transient operation imposed by the power references, is also near sinusoidal and well balanced.

0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 10

500

1000

1500

t [s]

Vcr

1 [V

]

0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 10

500

1000

1500

2000

2500

t [s]

ivr1

[A

]

(a) (b)

Fig. 11. (a) Simulated results of the UPFC in phase 1: (a) rms series voltage; (b) rms shunt current

0.8 0.9 1 -2000

-1500

-1000

-500

0

500

1000

1500

2000

t [s]

Vcr

[V

]

0.8 0.9 1

-4000

-3000

-2000

-1000

0

1000

2000

3000

4000

t [s]

i123

[A

]

(a) (b)

Fig. 12. Simulated results of the UPFC in the primary side: (a) series voltage; (b) shunt current

Fig. 13 shows the simulation results of the DC link capacitor voltage Udc. It can be observed that the Udc voltage response is satisfactory for the applied steps of active and reactive power reference. After a small initial trouble the DC link capacitor voltage follows its reference (UdcRef=4000V), which implies that the shunt converter current responds adequately to maintain a near constant DC link voltage.

0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 11000

1500

2000

2500

3000

3500

4000

4500

5000

t [s]

Uc1

,Uc2

, Udc

[V]

Uc1Uc2Udc

Fig. 13. Simulated results of the UPFC DC link capacitor voltage

VII. CONCLUSIONS In this paper, the mathematical model of a UPFC has

been presented and control methods for both the series and shunt converters have been described.

The dynamic modeling of a UPFC based on multilevel converters topology using sliding mode control and space vector modulation application was formulated.

The SIMULINK simulated UPFC, the PSB simulated network and the interfaces between the two multilevel converters and the AC network were designed in order to provide accurate digital simulations, fast computational times and to provide flexibility, being easy to add new AC network devices.

The simulated results presented confirm that the performance of the proposed UPFC controllers is satisfactory for active and reactive power flow control.

VIII. REFERENCES [1] D. Povh, “Use of HVDC and FACTS,” Proc. of the IEEE, vol. 88,

pp. 235-245, Feb. 2000. [2] L. Gyugyi, “Unified power flow control concept for flexible ac

transmission systems,” IEE Proceedings - C, vol. 139, no 4, pp. 323-331, Jul. 1992.

[3] A. Nabavi-Niaki, M.R. Iravani, “Steady-state and dynamic models of unified power flow controller (UPFC) for power system studies,” IEEE Trans. on Power Systems, vol. 11, pp. 1937-1943, Nov. 1996.

[4] M. Noroozian, L. Ängquist, M. Ghandhari and G. Andersson, “Use of UPFC for optimal power flow control,” IEEE Trans. on Power Delivery, vol. 12, pp. 1629-1634, Oct. 1997.

[5] L. Gyugyi, C.D. Schauder, S.L. Williams, T.R. Rietman, D.R. Torgerson and A. Edris, “The unified power flow controller: a new approach to power transmission control,” IEEE Trans. on Power Delivery, vol. 10, pp. 1085-1093, Apr. 1995.

[6] J. Fernando Silva, V. F. Pires, S. Pinto, J. D. Barros, Advanced control methods for power electronic systems, special issue on Modelling and simulation of Electrical Machines, Converters and Systems of the Transactions on Mathematics and Computers in Simulation, IMACS, vol 63, 3-5, pp 281-295, Nov 2003.

[7] Ray D. Zimmerman, Deqiang (David) Gan, “Matpower – A Matlab Power Systems Simulation Package: User’s Manual,” Power Systems Engineering Research Center, School of Electrical Engineering, Cornell University, Dec. 1997.

[8] Mathworks, Power System Blockset 2.1 Release Notes, retrieved September 2000 from http://www.mathworks.com.

[9] Bruno Madeira, J. Silva, Conversores Multinível na Optimização da Capacidade de Transporte de Redes de Energia Eléctrica, Final Graduation Thesis, IST, Lisboa, 2002/2003 (in Portuguese)

[10] V. I. Utkin, Sliding Modes in Control Optimization, Springer Verlag, 1981;

[11] J. F. Silva, “Control Methods for Power Converters”, chapter 19 of the “Power Electronics Handbook”, Editor M. H. Rashid, Academic Press, USA, 2001.

[12] Natália Santos, “Modelação, Simulação e Controlo de Conversores Multinível para Aplicação em Controladores Unificados de Trânsito de Potência”, IST, Lisboa, July 2005 (in Portuguese).