Considera*onsCRUBW400GbEPMDs

AliGhiasi GhiasiQuantumLLC

802.3bsElectricalAdHoc

January11,2015

ListofContributors

q Listofcontributors–  AfshinMomtaz–BroadcomInc–  MageshValliappan–BroadcomInc–  GregLeCheminant–Keysight.

A.Ghiasi IEEE802.3BSTaskForce 2

Overviewq  PreviouslyconsideraEonsforCRUandCDRBWhavebeen

presentedindetails–  hTp://www.ieee802.org/3/bm/public/mar14/ghiasi_01_0314_optx.pdf–  hTp://www.ieee802.org/3/bs/public/15_07/ghiasi_3bs_01_0715.pdf–  hTp://www.ieee802.org/3/ba/public/jan10/ghiasi_01_0110.pdf

q  802.3bshasnospecificobjecEveforaportstobebackwardcompaEblewithlegacy10GbE,40GbE,or100GbE–  Since802.3aeinEthernetwehavebeenusingCRUBWofFbaud/2578–  CRUBWforstandardsat10.3125GBd/laneis4MHz–  CRUBWforstandardsat25.78GBd/laneis10MHz–  Themarkethoweverrequiresatleastthehostprovidealevelof

backwardcompa*bility–  CDAUI-16basedon4instanceofCAUI-4carriesforward10MHzCRU

q NextwillexploreOSC/VCOphasenoiseandopEonsfor802.3bsCRUBW.

A.Ghiasi IEEE802.3BSTaskForce 3

Considera*onforCRUandCDRBWq  ConsideraEonforthegoldenPLLCRUBW

–  Oscillatorphasenoise•  Withmostoscillatorhaveflatphasenoise>1MHznobenefit

–  Crosstalk•  Highfrequencyeffects>>CRUBW

–  VCOphasenoise•  NobenefitwhenCRUBW>4MHz

q  ConsideraEonforCDRBW–  PaTerndependenteffect

•  Doesnotapplyto64B/66B/scrambleddatawithspectruminthe~100KHz–  Power

•  HigherloopBWresultsinhigherCDRpower–  DSPreceiver

•  Timingrecoveryintroduceslatencymakingitchallengingtomeettradi*onalFbaud/2578CDRloopBW

–  Backwardcompa*bility•  DoesanHOMportonlyoperateatsinglespeedwithanotherHOMportorthe

portneedtointeroperateatlowerbitratewithCAUI-4,CR4,SFI,etc?•  Animplementa*onrequiringbackwardcompa*bilitythroughacommondata

pathwouldneed10MHzCDRBW.

A.Ghiasi IEEE802.3BSTaskForce 4

ComprehensiveJiTerMethodologyq  AcomprehensivemethodologytotesttransmiXersandreceiversforjiXerwas

developedduring1GFCstandardizaEonintheFC-MJSprojectandhasbecomethebasisfordatacommunicaEonssystemspecificaEon

q  ThismethodologywasbasedonsystemsusinglowcostoscillatorsandareducEoninpowersupplyfilteringtoenablelow-costhigh-volumeapplicaEons–  TransmiTertestassumeslowfrequencyjiTershouldbetrackedbyareceiver,thus

transmiTerspecsarerelaxedbyobservingthetransmiTerusingareferencePLLwithOJTFdefinedasahighpasssinglepolefilterwith-20dB/decrolloffand-3dBcornerfrequencyat1/1667Baudrate(changedto1/2578*baudratesince10GbE)

–  ReceivertestshouldcomplementtransmiTertestbyverifyinglowfrequencyjiTeristolerated,exampleshownbelowisforaCRU/CDRresponseperCL88.

5 UI

0.05 UI

100 KHz 10 MHz (1/2578 x Baudrate)

TXJiTerFiltering

RXJiTerTracking

-20dB/Dec

A.Ghiasi IEEE802.3BSTaskForce 5

TXJiXerFilterandRXJiXerToleranceforSeveralIEEEStandards

q  CL52,86A(40G-SR4,100G-SR4),83A/B(XLAUI,CAUI-10)–  TransmiTeroutputmeasuredwith4MHzCRU(highpassjiTerfilter)Fbaud/2578–  Receiveristestedwithworstcasestress+TXcreditedlowfrequencySJ

q  CL68(LRM),CL72(10G-KR),CL85(40G-CR4/100G-CR10)–  TransmiTeroutputmeasuredwith4MHzCRU(highpassjiTerfilter)Fbaud/2578–  CL68onlytestedunstressattwopoints(75KHz,5UI)and(375KHz,1UI)–  CL72interferencetestrequiretes*ngreceiverwith0.115UIatFbaud/250–  CL85interferencetestrequiretes*ngreceiverwith0.115UIatfrequency>15MHz

q  CL88(100G-LR4),CL95(100G-SR4),CL83D/E(CAUI-4)–  TransmiTeroutputmeasuredwith10MHzCRU(highpassjiTerfilter)Fbaud/2578–  Receiveristestedwithworstcasestress+TXcreditedlowfrequencySJ

q  CL92(100G-CR4),CL93(100G-KR4)–  TransmiTeroutputmeasuredwith10MHzCRU(highpassjiTerfilter)Fbaud/2578–  CL92interferencetestrequiretes*ngreceiverwith0.115UIatfrequency>100MHzandunstressSJ

tes*ngat(190KHz,5UI)and(940KHz,1UI)–  CL93testedwith35dBISIchannelat(190KHz,5UI)and(940KHz,1UI)

q  CL94(100G-KP4)–  TransmiTeroutputmeasuredwithaCRUhaving20dB/declowfrequencyresponse,1.6MHzBW,and

3dBpeakingat6MHz,responsehaspeakingtoaccommodate2ndorderloopsandpoten*alpeakingasresultofDSP*mingrecoverylatency

–  ReceiveristestedunstresswithfollowingSJcomponents(16KHz,5UI)and(160KHz,0.5UI),jiTertoleranceactuallydoesnotreflecttheinten*onof2ndorderCRU

q  10G-LRMand100G-KP4testsreceiversunstressmaynotguaranteeinteroperability–  10G-KRand40G-CR4/100G-CR10interferencetolerancedoeshaveanSJcomponentbutdoesnottest

againsttestfullrangeofSJallowedbythetransmiTer.A.Ghiasi IEEE802.3BSTaskForce 6

TransmiTerJiTerFiltervsReceiverJiTerTrackingforSeveralIEEEStandards

q  ThereceivermusttrackthelowfrequencyjiXergoldenPLLfiltersforobservaEononthescope,only100G-KP4defineshigherthan1storderresponseasdefinedby:

–  CRUwith3dBisnotanop*onforpass-throughlinksduetocascadedeffectofjiTerpeaking.

A.Ghiasi IEEE802.3BSTaskForce 7

!27$

!24$

!21$

!18$

!15$

!12$

!9$

!6$

!3$

0$

3$

6$

0.1$ 1$ 10$

Gain$(dB)$

Frequency$(MHz)$

100G$KP4(

10G$SR/LR(

100G$LR4(

GoldenPLL“TXJiXerFilter”Response

!!G( f )= f

f − j× fne( j2π fT ) , where fn =2.12MHz andT =0.0286µs

StressSensiEvity

0.01

0.10

1.00

10.00

0.01 0.1 1 10

SJ(U

I)

Frequency(MHz)

100G-KP4

10G-SR/LR

100G-LR4

LRM

100G-CR4/KR4

Typical Low Cost Oscillator Phase Noise Plot (from ghiasi_01_0110.pdf)

q  Consideringtwoverydifferentoscillator4MHzCDRloopBWisagoodcompromise!

A.Ghiasi IEEE802.3BSTaskForce 8

OSC-I OSC-II

AnalysisofOscillatorIq  ReadoutfromoscillatorgraphwereenteredintohXps://www.jiXerlabs.com/support/calculators/to

analysistheoscillatorintegratedphasenoiseforbandpassresponse–  Resultshownbelowarefor4MHzlowpassresponsewithhighpasspoleat1/100oflowpasspole–  IntegratedphasenoisecalculatedforbandpassresponsebyvaryingLPpoleform0.1-20MHz–  PhasenoiseanalyzerreportedRMSjiTerforbreakfilterof12KHz-20MHzandthedatapointis

shownonthegraphandcomparedtothecalculatedresultformatch.

A.Ghiasi IEEE802.3BSTaskForce 9

0.1

0.11

0.12

0.13

0.14

0.15

0.16

0.17

0.18

0.19

0.2

0 2 4 6 8 10 12 14 16 18 20

Ji/erRMS(ps)

Frequency(MHz)

Oscillator1

BPFilter

BreakFilterOrg

BreakFilterExt

AnalysisofOscillatorIIq  ReadoutfromoscillatorgraphwereenteredintohXps://www.jiXerlabs.com/support/calculators/to

analysistheoscillatorintegratedphasenoiseforbandpassresponse–  Resultshownbelowarefor4MHzlowpassresponsewithhighpasspoleat1/100oflowpasspole–  IntegratedphasenoisecalculatedforbandpassresponsebyvaryingLPpoleform0.1-20MHz–  PhasenoiseanalyzerreportedRMSjiTerforbreakfilterof12KHz-20MHzandthedatapointis

shownonthegraphandcomparedtothecalculatedresultformatch.

A.Ghiasi IEEE802.3BSTaskForce 10

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0 2 4 6 8 10 12 14 16 18 20

Ji-erRMS(ps)

Frequency(MHz)

Oscillator2

BPFilter

BreakFilterOrg

BreakFilterExt

BasicPLLStructuresq  PLLstructuresusedfornoiseanalysisincludechargepumpwith

beXercapturerangeandphaseerrorq  BasicPLLstructureandPLLstructurewithchargepumpasillustratedby

followinglectureBehzadRazavi(UCLA)–  SeehTp://www.seas.ucla.edu/brweb/teaching/215C_W2013/PLLs.pdf–  PLLfilteralsoactsasfilterforchargepumpandincreasingfilterBWincreasesCPnoise.

A.Ghiasi IEEE802.3BSTaskForce 11

PD

ChargePump(CP)

SerDes Transmitter Relative Jitter (from ghiasi_01_0110.pdf)

q  Thermal, charge pump, VCO, and total relative output jitter as function of BW –  VCO phase noise has limited benefit for BW> 4MHz –  Charge pump noise a dominant noise source increases with increase in BW –  Result below excludes OSC noise but 4 MHz is a good compromise considering OSC-I/OSC-II.

A.GhiasiIEEE802.3BSTaskForce

12

1 2 3 4 5 6 7 8 9 10 11 12 130

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

1.1

ThermalC PumpVCOTotal

BW(MHz)

Nor

mal

ize

(RM

S) O

utpu

t Jitt

er

TXPLL

Op*onI:Assume10MHzCRUBWq  Proposetouse10MHzCRUBWforCDAUI-8,400Gbase-DR4,400Gbase-FR8/LR8q  ItsimplifiestheoverallarchitectureatexpenseofrequiringfastertrackingBW

resulEnginhigherpoweronmorecomplexPAM4receivers–  Thisapproachisbackwardcompa*blewithpreviousIEEEstandardsandcompa*ble

withCDAUI-16whichisbasedonCAUI-4–  Allowimplementa*ontofollowcurrent100Gre*memodulesbasedonCAUI-4

basedonsimpleCDRwithoutFIFO(inser*on/dele*onorphase)whenPMAdevicenumberofin/outlanesareequal.

TP2 TP3

CDAUI-n

TP3 TP2

Host SerDes

Host SerDesP

MD

CDAUI-n P

MD

Loop Response and OJTF

0

0.2

0.4

0.6

0.8

1

1.2

1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6 100.0E+6

Frequency (Hz)

Jit

ter

Mu

ltip

lie

r

=HostSerDesmusttolerate

A.Ghiasi IEEE802.3BSTaskForce 13

PM

A

PM

A

PM

A

PM

A

Loop Response and OJTF

0

0.2

0.4

0.6

0.8

1

1.2

1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6 100.0E+6

Frequency (Hz)

Jit

ter

Mu

ltip

lie

r

Loop Response and OJTF

0

0.2

0.4

0.6

0.8

1

1.2

1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6 100.0E+6

Frequency (Hz)

Jit

ter

Mu

ltip

lie

r

Loop Response and OJTF

0

0.2

0.4

0.6

0.8

1

1.2

1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6 100.0E+6

Frequency (Hz)

Jit

ter

Mu

ltip

lie

r

*

*ForwardpropagaEonillustratedreversepropagaEonwouldbesimilar.

Loop Response and OJTF

0

0.2

0.4

0.6

0.8

1

1.2

1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6 100.0E+6

Frequency (Hz)

Jit

ter

Mu

ltip

lie

r

Loop Response and OJTF

0

0.2

0.4

0.6

0.8

1

1.2

1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6 100.0E+6

Frequency (Hz)

Jit

ter

Mu

ltip

lie

r

PLL1CDAUI-n=10MHz

PLL2Input/Output=10/10MHz

PLL4CDAUI-n=10MHz

PLL3Input/Output=10/10MHz

TP2 TP3

CDAUI-n

TP3 TP2

PM

A

Host SerDes

Host SerDesP

MD

CDAUI-n P

MD

A.Ghiasi IEEE802.3BSTaskForce 14

PM

A

FIFO

PM

A

PM

A

FIFO

Loop Response and OJTF

0

0.2

0.4

0.6

0.8

1

1.2

1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6 100.0E+6

Frequency (Hz)

Jit

ter

Mu

ltip

lie

r

=HostSerDesmusttolerate

PLL1CDAUI-16=10MHzCDAUI-16=10MHzCDAUI-8=4MHzCDAUI-8=4MHz

PLL2Input/Output# =10/10MHz

=10/4MHz=4/4MHz=4/4MHz

PLL4CDAUI-16=10MHzCDAUI-16=10MHzCDAUI-8=4MHzCDAUI-16=10MHz

Loop Response and OJTF

0

0.2

0.4

0.6

0.8

1

1.2

1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6 100.0E+6

Frequency (Hz)

Jit

ter M

ult

iplie

r

PLL3Input/Output#=10/10MHz=4/10MHz=4/4MHz=4/10MHz

Loop Response and OJTF

0

0.2

0.4

0.6

0.8

1

1.2

1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6 100.0E+6

Frequency (Hz)

Jit

ter

Mu

ltip

lie

r

*

Op*onII:Assume4MHzCRUBWq  Proposetouse4MHzCRUBWforCDAUI-8,400Gbase-DR4,400Gbase-FR8/LR8

–  Backwardcompa*blewith10.3125GBd/lanePMD’s–  4MHztrackingBWcouldbenefitmorecomplexPAM4Cu/MMFreceiversandreducepower

q  ThisapproachisnotfullybackwardcompaEblewithIEEEstandardsoperaEng25.78GBd/laneorCDAUI-16whichisbasedonCAUI-4having10MHzCRUBW,butcanbemanagedasfollowing:

–  ModulePMAdoesnotneedFIFOincaseofCDAUI-8hostinconjunc*onwith8lanesPMDs–  CDAUI-8hostopera*ngwithlegacyhostbasedon25.78GBd/lanerequireaPMA-PMAchipwith

FIFOand/ordualloopPLL•  Any*menumberofin/outputlanesarenotequaltomanagedifferen*alskewFIFOisrequiredanyway•  Forimprovecompa*bilitywanderonCAUI-4shouldbelimitedto5UIfrom40kHz-100kHz.

Loop Response and OJTF

0

0.2

0.4

0.6

0.8

1

1.2

1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6 100.0E+6

Frequency (Hz)

Jit

ter

Mu

ltip

lier

Loop Response and OJTF

0

0.2

0.4

0.6

0.8

1

1.2

1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6 100.0E+6

Frequency (Hz)

Jit

ter

Mu

ltip

lier

Loop Response and OJTF

0

0.2

0.4

0.6

0.8

1

1.2

1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6 100.0E+6

Frequency (Hz)

Jit

ter

Mu

ltip

lie

r

#Ifinput/outputPLLBWidenEcalthenFIFOnotneeded

*ForwardpropagaEonillustratedreversepropagaEonwouldbesimilar.

TP2 TP3

CDAUI-n

TP3 TP2

PM

A

Host SerDes

Host SerDesP

MD

CDAUI-n P

MD

A.Ghiasi IEEE802.3BSTaskForce 15

PM

A

FIFO

PM

A

PM

A

FIFO

Loop Response and OJTF

0

0.2

0.4

0.6

0.8

1

1.2

1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6 100.0E+6

Frequency (Hz)

Jit

ter

Mu

ltip

lie

r

=HostSerDesmusttolerate

PLL1CDAUI-16=4MHz

PLL2Input/Output# =4/4MHz

PLL4CDAUI-16=4MHz

Loop Response and OJTF

0

0.2

0.4

0.6

0.8

1

1.2

1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6 100.0E+6

Frequency (Hz)

Jit

ter M

ult

iplie

r

PLL3Input/Output#=4/4MHz

Loop Response and OJTF

0

0.2

0.4

0.6

0.8

1

1.2

1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6 100.0E+6

Frequency (Hz)

Jit

ter

Mu

ltip

lie

r

*

Op*onIIA:Assume4MHzCRUBWq  Proposetouse4MHzCRUBWforCDAUI-8,400Gbase-DR4,400Gbase-FR8/LR8

–  Backwardcompa*blewith10.3125GBd/lanePMD’s–  4MHztrackingBWcouldbenefitmorecomplexPAM4Cu/MMFreceiversandreducepower

q  ThisapproachisnotfullybackwardcompaEblewithIEEEstandardsoperaEng25.78GBd/lanebasedonCAUI-4having10MHzCRUBW:

–  Theassump*onisthatmostCAUI-4SerDescoretodayhaveenoughmargintomeetCDAUI-16TXjiTerwith4MHzCRU

–  A4MHzcommonCRUBWforbothCDAUI-16andCDAUI-8simplifiesthearictectrueandallowsimplePMAimplementa*onwithouttheneedfordeepparallelFIFO

Loop Response and OJTF

0

0.2

0.4

0.6

0.8

1

1.2

1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6 100.0E+6

Frequency (Hz)

Jit

ter

Mu

ltip

lier

Loop Response and OJTF

0

0.2

0.4

0.6

0.8

1

1.2

1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6 100.0E+6

Frequency (Hz)

Jit

ter

Mu

ltip

lier

Loop Response and OJTF

0

0.2

0.4

0.6

0.8

1

1.2

1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6 100.0E+6

Frequency (Hz)

Jit

ter

Mu

ltip

lie

r

*ForwardpropagaEonillustratedreversepropagaEonwouldbesimilar.

TP2 TP3

CDAUI-n

TP3 TP2

PM

A

Host SerDes

Host SerDesP

MD

CDAUI-n P

MD

A.Ghiasi IEEE802.3BSTaskForce 16

PM

A

FIFO

PM

A

PM

A

FIFO

Loop Response and OJTF

0

0.2

0.4

0.6

0.8

1

1.2

1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6 100.0E+6

Frequency (Hz)

Jit

ter

Mu

ltip

lie

r

=HostSerDesmusttolerate

PLL1CDAUI-16=10MHzCDAUI-16=10MHzCDAUI-8=2MHzCDAUI-8=2MHz

PLL2Input/Output# =10/10MHz

=10/2MHz=2/2MHz=2/2MHz

PLL4CDAUI-16=10MHzCDAUI-16=10MHzCDAUI-8=2MHzCDAUI-16=10MHz

Loop Response and OJTF

0

0.2

0.4

0.6

0.8

1

1.2

1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6 100.0E+6

Frequency (Hz)

Jit

ter M

ult

iplie

r

PLL3Input/Output#=10/10MHz=2/10MHz=2/2MHz=2/10MHz

Loop Response and OJTF

0

0.2

0.4

0.6

0.8

1

1.2

1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6 100.0E+6

Frequency (Hz)

Jit

ter

Mu

ltip

lie

r

*

Op*onIII:Assume2MHzCRUBWq  Proposetouse4MHzCRUBWforCDAUI-8,400Gbase-DR4,400Gbase-FR8/LR8

–  2MHztrackingBWbenefitsmorecomplexPAM4Cu/MMFreceiversandreducepowerq  Thisapproachisnotbackward10GbE(4MHzCRU)norto25.78GBd/lane(10MHzCRU)andneedto

mangejiXertransferasfollowing:–  ModulePMAdoesnotneedFIFOincaseofCDAUI-8hostinconjunc*onwith8lanes

PMDsassumingCDAUI-8hasthesameCRUBW–  CDAUI-8hostopera*ngwithlegacyhostbasedon25.78GBd/lanerequireaPMA-PMA

chipwithFIFOand/ordualloopPLL•  Any*menumberofin/outputlanesarenotequaltomanagedifferen*alskewFIFOisrequired

anyway•  Forimprovecompa*bilitywanderonCAUI-4shouldbelimitedto5UIfrom20kHz-50kHz.

Loop Response and OJTF

0

0.2

0.4

0.6

0.8

1

1.2

1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6 100.0E+6

Frequency (Hz)

Jit

ter

Mu

ltip

lier

Loop Response and OJTF

0

0.2

0.4

0.6

0.8

1

1.2

1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6 100.0E+6

Frequency (Hz)

Jit

ter

Mu

ltip

lier

Loop Response and OJTF

0

0.2

0.4

0.6

0.8

1

1.2

1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6 100.0E+6

Frequency (Hz)

Jit

ter

Mu

ltip

lie

r

#Ifinput/outputPLLBWidenEcalthenFIFOnotneeded

*ForwardpropagaEonillustratedreversepropagaEonwouldbesimilar.

0.01

0.10

1.00

10.00

0.01 0.1 1 10

SJ(U

I)

Frequency(MHz)

Op#on-I

Op#on-II

Op#on-III

Wanderfrom40kHz-100KHzshouldbeConstrained

q  CAUI-410MHzCRUdoesnotdefinewanderfrom20KHzor40kHzto100kHz–  SuggesttoconstrainCDAUI-16maxwandergenera*onto5UI–  Op*onIIAisiden*caltoop*onIIexceptitdoesnotrequireadding5UIconstrain.

A.Ghiasi IEEE802.3BSTaskForce 17

Added5UIconstrainComparetoCAUI-4

Summaryq  ReliablelinkoperaEonrequiresthatthereceivertestcomplementstransmiXertest

–  GoldenCRUhavinghighpassresponsemaskthetransmiTerlowfrequencyjiTercomponentspropaga*ngdownthelinkthatthereceivermusttolerate

q  HOMreceiversaremorecomplexwithEmingrecoverypotenEallyhavinghigherlatencycouldmakeitdifficulttosupportFbaud/2578CRU

–  CDAUI-16basedonCAUI-4forces10MHzCRUintothe802.3bs•  Adding5UIwandergenera*onfrom40-100KHzonCDAUI-16portswillsimplifyimplementa*onof

CDAUI-8-CDAUI-16withouttheneedforinser*on-dele*onFIFO–  Ifinput/outputlanesarenotequalorattermina*onSerDesFIFOisrequiredtoabsorbdynamic

skewandcouldalsobedesignedtoabsorb10MHzCRUjiTerq  ThreeviableopEonsexploredare:

–  Op*onI:10MHzCRUBWforall50/100Gb/sPAM4PMDsallowfullbackwardcompa*bilitywithCDAUI-16aswellaslegacyPMDsupportbutatexpenseofpowerandpossiblylimi*ngtheimplementa*on

–  Op*onII/III:4MHz/2MHzCRUBWforall50/100Gb/sPAM4PMDswithlowfrequencywanderconstraintheCDAUI-16portstoeliminatestheneedforinser*on/dele*onFIFOandprovidebackwardcompa*bility

•  PAM4PMAsinteropera*ngwithlegacyNRZPMDswithopeneyelikelywillhavefulltrackingBW–  Op*onIIAwhereCDAUI-16andCDAUI-8bothhavecommon4MHzCRUBWcansimplifythe

PMAimplementa*onq  10MHzCRUBWischallengingconsideringfuturemorecomplexHOMPMDsbutweknow

howtodealandmanageanyinteroperabilityissuechoosing4or2MHzCRUq  WhateverwechooseforCRUBWthereceivermustoperatewithidenEcalstressandbeable

totoleratejiXercomponentsmaskedbythetransmitCRUhighpassresponse.

A.Ghiasi IEEE802.3BSTaskForce 18