chapter 8 memory interface microprocessors prepared by dr. mohamed a. shohla
TRANSCRIPT
Chapter 8
Memory Interface
MicroprocessorsMicroprocessors
prepared by
Dr. Mohamed A. Shohla
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.Microprocessors Course 8 - 2
Chapter OverviewChapter Overview
• Memory Devices• Address Decoding• 8088 and 80188 (8-Bit) Memory Interface• 8086, 80186, 80286, and 80386SX (16-Bit) Memory
Interface• Cache Memory
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.Microprocessors Course 8 - 3
Memory DevicesMemory Devices
• Address Connections • Data Connections • Selection Connections
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.Microprocessors Course 8 - 4
Semiconductor Memory TypesSemiconductor Memory Types
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.Microprocessors Course 8 - 5
Semiconductor MemorySemiconductor Memory
• RAM • Misnamed as all semiconductor memory is random
access
• Read/Write
• Volatile
• Temporary storage
• Static or dynamic
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.Microprocessors Course 8 - 6
Memory Cell OperationMemory Cell Operation
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.Microprocessors Course 8 - 7
Dynamic RAMDynamic RAM
• Bits stored as charge in capacitors• Charges leak• Need refreshing even when powered• Simpler construction• Smaller per bit• Less expensive• Need refresh circuits• Slower• Main memory• Essentially analogue
• Level of charge determines value
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.Microprocessors Course 8 - 8
Static RAMStatic RAM
• Bits stored as on/off switches• No charges to leak• No refreshing needed when powered• More complex construction• Larger per bit• More expensive• Does not need refresh circuits• Faster• Cache• Digital
• Uses flip-flops
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.Microprocessors Course 8 - 9
SRAM v DRAMSRAM v DRAM
• Both volatile• Power needed to preserve data
• Dynamic cell • Simpler to build, smaller
• More dense
• Less expensive
• Needs refresh
• Larger memory units
• Static• Faster
• Cache
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.Microprocessors Course 8 - 10
Read Only Memory (ROM)Read Only Memory (ROM)
• Permanent storage• Nonvolatile
• Microprogramming (see later)• Library subroutines• Systems programs (BIOS)• Function tables
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.Microprocessors Course 8 - 11
Types of ROMTypes of ROM
• Written during manufacture• Very expensive for small runs
• Programmable (once)• PROM• Needs special equipment to program
• Read “mostly”• Erasable Programmable (EPROM)
• Erased by UV
• Electrically Erasable (EEPROM)• Takes much longer to write than read
• Flash memory• Erase whole memory electrically
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.Microprocessors Course 8 - 12
Address DecodingAddress Decoding
• Simple NAND Gate Decoder
2K-8 A decoder used to select a 2K x 8 EPROM for memory locations FF800H-FFFFFH.
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.Microprocessors Course 8 - 13
Sample Decoder CircuitSample Decoder Circuit
•The 74LS138, 3-to-8 line decoder
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.Microprocessors Course 8 - 14
Example: Example: Design a 64K-8 EPROM interface for the Design a 64K-8 EPROM interface for the 8088 microprocessor using EPROM chips (8K x 8). The 8088 microprocessor using EPROM chips (8K x 8). The ROM memory starts at address F0000H-FFFFFH.ROM memory starts at address F0000H-FFFFFH.
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.Microprocessors Course 8 - 15
Basic 8088 Memory InterfaceBasic 8088 Memory Interface• Interfacing EPROM to the 8088
A 32K-8 EPROM A 32K-8 EPROM interface for the interface for the 8088 using 8088 using EPROM chips EPROM chips (4K x 8). The (4K x 8). The ROM memory ROM memory starts at address starts at address F8000H-FFFFFH.F8000H-FFFFFH.
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.Microprocessors Course 8 - 16
• Interfacing RAM to the 8088
A 512K-8 RAM A 512K-8 RAM interface for the interface for the 8088 using RAM 8088 using RAM chips (32K x 8). chips (32K x 8). The ROM The ROM memory starts at memory starts at address 00000H.address 00000H.
32 K x 8SRAM
CS
32 K x 8SRAM
CS
32 K x 8SRAM
CS
32 K x 8SRAM
CS
32 K x 8SRAM
CS
32 K x 8SRAM
CS
32 K x 8SRAM
CS
32 K x 8SRAM
CS
741383 x 8
Decoder
A
B
C
G1
G2A
G2B
32 K x 8SRAM
CS
32 K x 8SRAM
CS
32 K x 8SRAM
CS
32 K x 8SRAM
CS
32 K x 8SRAM
CS
32 K x 8SRAM
CS
32 K x 8SRAM
CS
32 K x 8SRAM
CS
741383 x 8
Decoder
A
B
C
G1
G2A
G2B
741383 x 8
Decoder
A
B
C
G1
G2A
G2B
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
A15
A16
A17
A15
A16
A17
A18
A19
Vcc
IO/M
OE
WRWR
RD
OE
WR
Data D0 - D7
Address A0 - A14