challenges in testing mobile memories 073012 cecil ho in...challenges in testing mobile memories by...

29
Challenges in Testing Mobile Challenges in Testing Mobile Memories Memories By : Cecil Ho, CST, Inc. Mobile Forum – Taiwan/Korea By : Cecil Ho, CST, Inc. [email protected] 972-241-2662

Upload: doxuyen

Post on 06-May-2018

217 views

Category:

Documents


1 download

TRANSCRIPT

Challenges in Testing Mobile Challenges in Testing Mobile MemoriesMemories

By : Cecil Ho, CST, Inc.

Mobile Forum – Taiwan/Korea

By : Cecil Ho, CST, Inc.

[email protected] 972-241-2662

What is Memory MCP?What is Memory MCP?

Multi Chip Package with different kinds of memory integrated together as one chip. Normally consisted of:consisted of:

LPDDR RAMs with Non-volatile Flash chips, with eMMC or UFS chips

Who’s involved with MCP?Who’s involved with MCP?

• Memory chip integrators

• Original memory chip vendors

• Packaging house

• Equipment Manufacturers• Equipment Manufacturers

• Subcontract Assemblers

for: handsets, tablet computer, e-reader, camera, games……

MCP Are SemiMCP Are Semi--customcustom

• Although JEDEC publish MCP pinout diagrams, electrical feature and function varies.

• Combination option also varies.• Combination option also varies.

different LPDRAM generations

different internal density stacks

different number of channels

different proprietary features

Similar Similar PinoutPinout, yet Different , yet Different

LPDDR2/ Flash combo have

different pinout from each

vendor

MCP are Difficult to TestMCP are Difficult to Test

• Hi frequency and high performance testing fixture involves in signal integrity issues.

• Cross talk error between different • Cross talk error between different memories.

• Combination of different memory creates confusion in testing and requires multiple skill sets.

What Kind of Test Wanted?What Kind of Test Wanted?

• Flexible for all memory derivatives.

• Test DRAM, Raw Nand, Managed Nand simultaneously.

• Does firmware pre-load for operating system and special features.system and special features.

• Access vendor specific features.

• Verify assembly, pin-point error for repair and rework.

• Automatic handler compatible.

How Are They Testing Now?How Are They Testing Now?

ATE type memory tester

• Cost too much• Cost too much

Make shift motherboard testingMake shift motherboard testing

• Cheap? But not flexible

• Many drawbacks

New Way of Testing MCPNew Way of Testing MCP

• Chips are originally good.

• Only need to detect assembly faults.

• Functional test is sufficient.

FPGA base tester with smart software would satisfy the requirement.

New Tester ArchitectureNew Tester Architecture

Hardware Platform with 3 Hardware Platform with 3 BoardsBoards

• Base board - CPU system controller.

• FPGA board – high speed • FPGA board – high speed waveform generator.

• DUT board – DUT socket hosting.

System Block DiagramSystem Block Diagram

Packaged TesterPackaged Tester

Horizontal Option Vertical Option

Gang together for handler

DRAM TestingDRAM Testing

• Waveform generated by FPGA.

• Read back latched and compared at real access speed.

• Use different DRAM patterns for • Use different DRAM patterns for hard and soft failure detection.

• Add/Cont/Data bus for LPDDR1.

• Command bus for LPDDR2 and 3.

Non Volatile TestingNon Volatile Testing

• Waveform generated by FPGA.

• Command bus structure.

• Separated voltage supply.

• Configured for legacy flash, toggle • Configured for legacy flash, toggle flash, and synchronous DDR flash.

• Built-in ECC to test MLC Flash

• Stacked and Multi-channel testing.

eMMCeMMC TestingTesting

Built-in eMMC host that does :

1. Auto detect number of bits 1/4/8.

2. Auto detect and switch voltage.2. Auto detect and switch voltage.

3. Access to user area partitions for vendor specific programming.

4. FAT table or NTFS formatting.

UFS TestingUFS Testing

• Similar to eMMC.

• High speed Serde ready FPGA to accommodate serial interface for accommodate serial interface for future UFS applications.

Essential Building BlocksEssential Building Blocks

• LPDDR RAM Controller (LPDDR1, LPDDR2, LPDDR3, LPDDR3E)

• Flash Controller incl. Toggle, Synchronous , Legacy, and NOR. Synchronous , Legacy, and NOR. Local Hardware ECC.

• Smart Nand Controller incl. eMMC, and UFS host.

Comparison (MB Comparison (MB vsvs Flex Tester)Flex Tester)

ExpandableExpandable

• Horizontal option – multiple units can be ganged through Ethernet connection.

• Vertical version can be multiplied through stacking to fit available automatic handler.

Multiple Unit OperationsMultiple Unit Operations

Test Socket OptionsTest Socket Options

semi-custom to custom . High precision sockets required .

Open frame MCP socketClam shell MCP socket

Tester Common UsageTester Common Usage

• MCP assembly test.

• Component incoming QC.

• Manufacturing repair and RMA • Manufacturing repair and RMA repair.

• Firmware pre-load.

• Die stack memory test.

Manual Test SystemManual Test System(two sockets for engineering and repair (two sockets for engineering and repair

test)test)

Production Automated TestProduction Automated Test(128 sockets simultaneously) (128 sockets simultaneously)

Production BurnProduction Burn--in Testin Test

Any Question?Any Question?

Thanks You !Thanks You !