Slide 1

18 - 322 Fall 2003 Lecture 21

Bipolar Junction Transistor (BJT)

• NPN Cross-section and Masks• BJT Notation• Hand Analysis Models• NPN Modes of Operation• Ebers - Moll Model• BJT Inverter• TTL

Chapter 2.4

Slide 2

NPN Transistor Cross-section

Slide 3

NPN Transistor Layout

p

n

p

p

n

Slide 4

BipolarJunctionTransistor (BJT) Notation

Collector

Base

Emitter

nn

n

pB

C C

n-p-n transistor

C

B

ICn

IBB

p

IE

n

E EE

Slide 5

NPN Regions of Operation

V

V BE

BC

Forward Active

Reverse Active Saturation

Cut-off

Slide 6

NPN Forward Active PolarizationVBE Forward-biased &

VBC Reverse-biased

E C

Electron Flow(Current in opposite direction)B

Base current:IB = IC / βF βF = IC / IB

βF - current gain (~100!)

Slide 7

Common-Emitter Characteristics

B

VBE

VCE

C

E

C I [mA]

3

2

1

0

5

4

7

6

10

9

8

12

11

14

13I = 120µAB

VCE [V]5.04.03.02.01.0

I = 100µAB

I = 80µAB

I = 60µAB

I = 40µAB

I = 20µAB

Slide 8

Saturation Region C I [mA]

3

2

1

0

5

4

7

6

10

9

8

12

11

14

13I = 120µAB

VCE [V]5.04.03.02.01.0

I = 100µAB

I = 80µAB

I = 60µAB

I = 40µAB

I = 20µAB

• VBE Forward-biased• VBC Reverse-biased

• No Current Gain relationship.

Slide 9

Hand Analysis Model

IB IC

VCEVBE

IC (active) = βF IBIB = IS (eVbe/Vt -1)

VBE(on) = 0.7 V VCE(sat) = 0.1 V

Slide 10

Hand Analysis Example

IC

IE

RC

5V • RC = 300ΩIB =

IC =

VCE =

Operation Mode:

• RC = 1k ΩIB =

IC =

VCE =

Operation Mode:

βF=100

RB=20kΩ

IB+-

2.7V

Slide 11

BJT Parasitics

• Junction Capacitances:– Base-Emmitter– Base-Collector

• Excess Base Charge:– QR when– VBC forward-biased– Must be removed to

switch modes

CCSQR Cbc S

QF Cbe

Slide 12

NPN Transistor Doping Levels

Depletion layers

BE C

nn p

1020

1017cm

-3

2 103

N A10

15cm

-3

2

2 105

cm-3

N DN D

Slide 13

np Junctions Revisted

• Forward-biased:– Dominant current: diffusion of majority

carriers• Reverse-biased:

– Drift of minority carriers

Slide 14

NPN Forward Active PolarizationVBE > 0 & VBC < 0

VBE VBCB

nn p

+ -

Concentration of minority

carriers

forward-biased

reverse-biased

E C+-

Slide 15

NPN Forward Active PolarizationVBE > 0 & VBC < 0

VBE VBCB

nn p

+ -

Current determined by concentration

of minority carriers

Current determined by concentration

of majority carriers

forward-biased

reverse-biased

E C+-

Slide 16

NPN Forward Active PolarizationConcentration proportional to

VBE > 0 & VBC < 0

VBE VBCB

nn p

forward-biased

+ -

VBEe VT

E C+-

Slide 17

NPN Forward Active PolarizationVBE > 0 & VBC < 0

VBE VBCB

nn p

reverse-biased

+ -

Concentration proportional to

VBCVTe

E C+-

Slide 18

NPN Forward Active PolarizationVBE > 0 & VBC < 0

BE C

nn pCollector current

determined by the slope of the concentration

of minority carriers

(electrons) in the base.Collector current:

IC = IS [exp(VBE/VT) -1]

IS - saturation current

Slide 19

NPN Transistor Reverse ActiveVBE < 0 & VBC > 0

βF > βR

n p

reverse-biased

forward-biased n

BE C

Slide 20

NPN Transistor SaturationVBE > 0 & VBC > 0

forward-biased

forward-biased

n p n

BE C

Slide 21

NPN_Cut-off

BE C

nn p

VBE < 0 & VBC < 0

Slide 22

Ebers-Moll Modelnn

B

C

E

C

B

E

IDC

IDC

DEI

DEI

αF

αR

Slide 23

Ebers - Moll Model

Equations:IDE = IES [exp(VBE/VT) -1]IDC = ICS [exp(VBC/VT) -1]

Typical values:αF = .99 IES = 10-15 AαR = .66 ICS = 10-15 A

Slide 24

BJT Inverter & Fan-Out Analysis

• BJT Inverter

• Voltage Transfer Characteristics

• Logic Level Description

• Fan-Out Analysis

Slide 25

BJT InverterCCV

Base diffusion

= 5 VoutV CCV

out

R

V

C1 kΩ

inV = 0 V inV = 5 V

inV RB

10 k Ω100 Ω/ 10 = 1kΩ

Slide 26

NPN BJT Parameters

VBE(on) = 0.7 VVBE(sat) = 0.8 VVCE(sat) = 0.1 V

Forward active mode:• current gain βF = 70

Slide 27

VOH and VIL

V = +5 V

BE C

nn p

outV = 5 V

= 5 VCCV

RC1 k Ω

Q0

EBV = 0 V

CB

BI = 0CI = 0

inV = 0 V10 k Ω

I C

R Bcut-off

I B

EBV = 0 - 0.7 V Cut-off

Slide 28

VOH and VILCut-offVout [V]

5VOH BP1

4

3

2

1

Vin [V]0

0 1 2 3 4 5VIL0.7 V

Slide 29

VOL

BE C

nn p

outV = 0.1V

= 5 VCCV

RC1 k Ω

Q0

Saturation V = 0.1 V

EBV = 0.7 V

out

BI = (5-0.7)/10kΩ = 0.43 mACI = I βF = 30 mAB

outV = 5 - I R = -25 V ?C C

CI < I βF = 30 mAB βF < 70

NOT Forward Active !

βF = 70 in Forward Active

inV = 5 V10 k Ω

I C

RB

I B

Slide 30

VOL

Saturation

Cut-offVout [V]

5

0

VOH

VOL

VIL

BP1

0.7 V

0.1 V

4

3

2

1

Vin [V]

0 1 2 3 4 5

Slide 31

VIH

Edge of saturation:

EBsV = 0.8 V

βF = 70

outV = 0.1V

outV = 0.1V Q0

= 5 VCCV

RC1 k Ω

BI = ((5-0.1)/1kΩ)/70 = 70 µA

in

V = V + I R = 0.8 + 0.7B B EBs

V = 1.5 V

inV = ? 10 k Ω

I C

RB

I B

Slide 32

VIH

Saturation

Cut-offVout [V]

5

0

VOH

VOL

VIL VIH

BP1

BP2

0.7 V

0.1 V

1.5 V

4

3

2

1

Vin [V]

0 1 2 3 4 5

Slide 33

Transition Region

Q0

= 5 VCCV

RC1 k Ω

inV = 0.7 - 1.5VoutV = 5.0 - 0.1 V

10 k Ω

RB

Forward Active !

B

CI = I βFB

I = (V - 0.7)/R in B

outV = V - I R C C CC

Slide 34

Transition Region:Load Line Analysis

CI [mA]

I = 120µAB

VCE [V]5.01.0

I = 100µAB

I = 80µAB

I = 60µAB

I = 40µAB

I = 20µAB

14

B

CI = I βFB

I = (V - 0.7)/R in B

outV = V - I R C C CC

13

12

11

10

9

8

BI = (1.5 - 0.7)/ 10kΩ = 80 µΑ7

6

V = 0.7 - 1.5Vin5

4

3

2

1

02.0 3.0 4.0

Slide 35

Voltage Transfer Characteristic

Saturation

Forward Active

Cut-offVout [V]

5

0

VOH

VOL

VIL VIH

BP1

BP2

4

3

2

1

Vin [V]

0 1 2 3 4 5

Slide 36

Voltage Transfer Characteristic

Vout [V]

Vin [V]

5

4

3

2

1

0

0 1 2 3 4 5

VOH

VOL

VIL VIH

BP1

BP2

• Transition Width:TW= VIH - VIL = .8 V

• High Noise Margin:NMH = VOH - VIH = 3.5 V

• Low Noise Margin:NML = VIL -VOL = .6 V

• Logic Swing:LS = VOH - VOL = 4.9 V

Slide 37

Inverter Fan-Out

= 5 V

outV R B

10 k Ω

CCV

inV Q1

RC1 k Ω

Q010 k Ω

RC1 k Ω

R B

QN

RB

10 k Ω

RC1 k Ω

inV = 0 R B

n

Slide 38

Inverter Fan-Out

outV = 4.6 V

inV = 0.1 V

= 5 VCCV

R B

10 k Ω

RC1 k Ω

R B

10 k Ω

RC1 k Ω

Q0 Q1cut-offsaturation

• LOAD =1 VOH = 4.6 V

R B

BR

C +10

V = ( V CC - 0.8 ) out + 0.8 = R

( 5.0 - 0.8 ) + 0.8 = 4.61 V 10 +1

Slide 39

Equivalent Circuit

outV

= 5 VCCV

R /NB10 k Ω

RC1 k Ω

Q0

VOH = ?

R BinV V BE(sat)

R / N B

R /N B

RC +

V = ( V CC - 0.8 )

10 /10 10 /10 1 + + 0.8 = 2.9 V

out + 0.8 =

( 5.0 - 0.8 )

Slide 40

Maximum Number of Load Gates: VOH = VIH

R / N B

R /N B

RC +

V = ( V CC - 0.8 ) out

outV

inV

= 5 VCCV

R /NB

R B

10 k Ω

RC1 k Ω

Q0 V BE(sat)

VOH = ?

VIH = ?

N = ?

+ 0.8

10 /N 10 /N 1 +( 5.0 - 0.8 ) + 0.8 = 1.5 V

Slide 41

Transistor-Transistor Logic (TTL)

• Disadvantages of TTL gates:• Large # of components, area --> VLSI not

feasible• Large power consumption• Saturated transistors in either high or low state

• Large propagation times

• Advantage:• Can drive large capacitive loads since large

output currents available

Slide 42

TTL Inverter= 5 VCCV

Q 2

R4130 Ω

Q3

Q1

D1

R14 k Ω

R 31.6 k Ω

Q 4

A

R21 k Ω

INPUT STAGE PHASE-SPLITTERor

LEVEL-SHIFT

OUTPUT STAGE

Slide 43

TTL NAND Gate= 5 VCCV

Q 2

R14 k Ω

R 31.6 k Ω

R4130 Ω

Q3

D1

R21 k Ω

Q 4

INPUT STAGE OUTPUT STAGEPHASE-SPLITTERor

LEVEL-SHIFT

Q1AA

Q1B

B

Slide 44

Multi-Emitter TransistorB

pn

E1 E2 B C

E1

E2

C

E1

E2

B

C