asynchronous counter (1st update)

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Asynchronous Counter Nugroho Adi P, S.Si, M.Sc [email protected], [email protected] htt p://aravir-rose.blogspot.com

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counter, modulo-n counter, jk bistable

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Page 1: Asynchronous Counter (1st update)

Asynchronous Counter

Nugroho Adi P, S.Si, M.Sc [email protected], [email protected] http://aravir-rose.blogspot.com

Page 2: Asynchronous Counter (1st update)

Counter

Menghitung pulsa

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Pulsa

Transmisi radio

Sistem komputer

Jumlah koin yang masuk mesin game

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Build Counter

JK bistable

D-type bistable

IC (beli jadi)

Page 5: Asynchronous Counter (1st update)

Build Counter?

Tahu masalah yang akan ditemukan

Sesuai dengan keperluan (we may not be standart)

It’s fun

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Buy Counter?

Cheaper, easier, quicker to build

Consume less total power

Take up less space

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How it works?

JK Bistable

J=1, K=1

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How it works?

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How it works?

menghitung dari nol ke satu

atau

menghitung dari satu ke nol

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modulo

jumlah yang bisa dihitung

JK bistable memiliki modulo 2

modulo-2 counter

mod-2 counter

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mod-4 counter

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mod-4 counter

Q0=0, Q1=0, count=00

Clock, Q0=1, Q1=0, count=01

Clock, Q0=0, Q1=1, count=10

Clock, Q0=1, Q1=1, count=11

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mod-4 counter

00, 01, 10, 11, 00 ,01, …

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mod-4 counter

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mod-8 counter

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mod-8 counter

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semua menghitung dari nol

Q digunakan untuk output dan

untuk clock bistable berikutnya

NOT Q?

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Trailing Edge

Page 25: Asynchronous Counter (1st update)

The Golden RuleIn trailing edge bistables,

whenever the same pin supplies the next clock and the count output,

the result is an UP COUNTER.

In all other cases it's a down counter.

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The Golden Rule

if (Q=(clk AND output) OR (Q’=(clk AND output))

then {UP} else {DOWN}

Page 27: Asynchronous Counter (1st update)

Leading Edge Counter

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Leading Edge Counter

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The Golden RuleIn leading edge bistables,

whenever the same pin supplies the next clock and the count output,

the result is an DOWN COUNTER.

In all other cases it's a up counter.

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“Count up to anything”

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Three Bistables

0,1,2,3,4,5,6,7

0,1,2,3,4,5,0,1?

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Three Bistables

Gunakan CLR

beri sinyal 0 ke CLR

saat output bernilai 6 ganti dengan 0

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Output 6

Q0=0, Q1=1, Q2=1

saat ini terjadi maka reset semua flip-flopJK

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Q2 Q1 Q0

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0 ganti dengan nol

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Q2 Q1 Q0

0 0 0

0 0 1

0 1 0

0 1 1 ganti dengan nol

0,1,2,0,1,2,0

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Q2 Q1 Q0

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0 reset

dari 010 ke 100

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Q2 Q1 Q0

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0 reset

000,001,010,011

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Asynchronous

ripple counter

ripple-through counter

clock hanya di bistable pertama

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Asynchronous

perlu waktu untuk clock ke Q1 dan kemudin tersambung ke clock2

…dst, Qn

bistable tidak mendapatkan clock pada saat yang sama (Asyncrhonous)

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Asynchronous

race problem

glitch

clock skew

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Race Problem

saat reset, masalah terjadi jika Q3 terlambat

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Clock Skew

beda waktu perubahan Q

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Clock Skew

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Selesai

“Dan dia hidup bahagia selama-lamanya”