vtcmos characteristics and its optimum conditions...
Post on 01-Feb-2018
221 Views
Preview:
TRANSCRIPT
VTCMOS characteristics and its optimum conditionspredicted by a compact analytical model
Hyunsik Im, T. Inukai, H. Gomyo, T. Hiramoto, and T. Sakurai
Low Power GroupInstitute of Industrial Science, University of Tokyo
OBJECTIVE
√√√√ To develop a compact analytical model of VTCMOS
√√√√ To demonstrate the low power operation of VTCMOS
√√√√ To investigate the short channel effect on VTCMOS
√√√√ To find optimum device conditions
Contents
√√√√ Introductory part - Necessity of low power MOSFET technology- Variable Threshold-Voltage CMOS (VTCMOS)
√√√√ Previous work: Numerical simulations of VTCMOS
√√√√ Analytical model of VTCMOS
√ Short Channel Effect on VTCMOS
√ Optimum conditions of VTCMOS
√√√√ Conclusions
IntroductionCircuits’ speed and power dissipation
12
34
-0.400.40.8
00.2
0.4
0.6
0.8
1x 10- 4
Vth(V)
VDD(V)
Pow
er (W
)
A
B
12
34
-0.400.40.8
0
1
2
3
4
5x 10
-10
Del
ay (s
)
VDD(V)
AB
Vth(V)
,102dd
SVth
oddloadstaticactivetotal VIVf CPPP−−−−
++++= = = = ++++==== )( ααααthdd
dd
on
ddloadpd VV
VI
VCt−−−−
∝∝∝∝≈≈≈≈
IntroductionTradeoffs in Low Power Devices
ddleakddloadstaticactivetotalVIVf CPPP ++++====++++====
( ) 1.5thdd
dd
drive
ddloadpd VV
V
I
VCt
−−−−∝∝∝∝=
Strong demand for ultra-low power VLSI
Low Vdd for low ac power Low Vth for high speed
Vg
Log Ids
Vdd1Vth1
Ioff1
Vdd2Vth2
Ioff2
Ion
Explosion of stand-by power
Introduction Explosion of Stand-by Power
Necessity of low power VLSI technology VTCMOS
1999 2002 2005 2008 2011100f1p
10p100p
1n10n
100n1µ
10µ
(1mW )
(Tech. Node)
(50nm)(70nm)(100nm)(130nm)(180nm)
0.1V
0.2V
0.3V
0.4V
Vth = 0.4V
I IIIoff(A/ µm)
Year
Requirement
SubthresholdLeakage
Log Ids
VgVdd1Vth1 Vdd2Vth2
Variable Threshold-Voltage CMOS (VTCMOS)
What determines ∆∆∆∆Vth?
Log Ids
Vth,standby VddVth,active
Ioff, active
Ion, active
Ioff,standby
∆∆∆∆Vth
Vg
Vbs1
Vbs2Vbs1 > Vbs2
Vds
Vg
Vbs
Body effect factor γγγγ
Vbs
∆Vth
0
Vth0
Vth
∆∆∆∆Vbs
Slope
Then ∆∆∆∆Vth = γγγγ ×××× |∆|∆|∆|∆Vbs||||
γ ∝∝∝∝ CD ⁄⁄⁄⁄ COXCD: Depletion layer cap. COX: Gate oxide cap.
(irrespective of device structure)- Directly related to ∆∆∆∆Vth- Applicable to any devices(including SOI devices)
- Also related to SCE
γγγγ ranges from 0.1 to 0.2 in advanced MOSFET’s
bs
th
VV
∆∆∆∆∆∆∆∆
≡≡≡≡γγγγ
Contents
√√√√ Introductory part - Necessity of low power MOSFET technology- Variable Threshold-Voltage CMOS (VTCMOS)
√√√√ Previous work: Numerical simulations of VTCMOS
√√√√ Analytical model of VTCMOS
√ Short Channel Effect on VTCMOS
√ Optimum conditions of VTCMOS
√√√√ Conclusions
Numerical simulations of VTCMOS Koura et al, JJAP pp.2312 (2000)
0.2 0.4 0.6 0.810 -13
10 -12
10 -11
10 -10
10 -9
10 -8
10 -7
10 -6
10 -5
10 -4
Vbs=−0.3V
0V
-5V
γ =0
0.17
0.240.30.36
0.45
γ = 0.6
-0.7V
-0.8V
-1V -1.2V-1.5V -2V -3V
Ioff (
a)(A
/µm
)
Ion(a)(mA/µm)
0.0 0.2 0.4 0.60.0
0.5
1.0
1.5
2.0
2.5
4X10 -44.5X10 -45X10 -4
5.5X10 -4
6X10 -4
6.5X10-4
7X10 -4
Ion(a) =7.5X10 -4 (A/µm)
| ∆V
bs|(V
)
γ
Vo
Vg
Log Ids
10 −−−−13 A/µµµµm
Vdd =1.5V
Ion(a)
Ioff(a)
t
Na, p++
Ns, n or p-
Simulation procedure
Contents
√√√√ Introductory part - Necessity of low power MOSFET technology- Variable Threshold-Voltage CMOS (VTCMOS)
√√√√ Previous work: Numerical simulations of VTCMOS
√√√√ Analytical model of VTCMOS
√ Short Channel Effect on VTCMOS
√ Optimum conditions of VTCMOS
√√√√ Conclusions
Purpose of Analytical VTCMOS Model
√√√√ Compact and practicalonly includes γγγγ, S, and Vbs
√√√√ Applicable to any devicesincluding short channel VTCMOSs
In terms of γγγγ, S and Vbs,
Find the following relations:Log Ids Ion,active
Ioff,standby
Vth,standbyVddVth,active
Ioff,active
Vg
γγγγ Vbs
IOFF(s)
ION(a) IOFF(a)
Analytical VTCMOS Model (Ioff, active)IOFF (a) ⇔⇔⇔⇔ IOFF (s)
Using the definitions of sub-threshold slope (S) and threshold voltage (Vth):
Log Ids
Vth,standbyVddVth,active
Ioff,active
Ion,active
Ioff,standbyVg
(A)10when 7IVV Lg
Wg
dsgth−−−−
========
110 )log
( −−−−
∆∆∆∆
∆∆∆∆≅≅≅≅
g
ds
V
IS
SV
SV
SV
off
offbsthth
sIaI γ γ γ γ −−−−
====≅≅≅≅r ≡≡≡≡ 1010)()(
/
Analytical VTCMOS Model (Ion, active)ION (a) ⇔⇔⇔⇔ IOFF (s)
Using the αααα-power law model:
Ioff,standby
Log Ids
Vth,standbyVddVth,active
Ioff,active
Ion,active
Vg
Ion(a) = B (Vdd −−−−VTH)αααα
VTH = Vth,active + ΘΘΘΘ (Θ≤Θ≤Θ≤Θ≤ 5kT/e)
⇒⇒⇒⇒ [S(log10(Ioff(s)) −−−− ΩΩΩΩ/ ) −−−− γγγγ ||||Vbs||||]
γγγγ++++∝∝∝∝
++++∝∝∝∝
11
1
1
ox
dmCCB
Relation between S factor and γγγγ
If the SCE occurs
Vg
Log Ids
Ioff
Ioff
Large γγγγLarge S
Small γγγγSmall Sn+ n+
Gate
ldtox
Depletion layer
S ≅ ≅ ≅ ≅ dS/d γγγγ (1+ γγγγ)[mV/decade]
dS/d γ≥γ≥γ≥γ≥60
Long channel
New γγγγ - S relation
)3(
160
D
OX
OX
D
ox
D
lt
CC
VbsVth
CCS
≅≅≅≅∝∝∝∝∆∆∆∆∆∆∆∆
≡≡≡≡γγγγ
÷÷÷÷÷÷÷÷
++++====
Comparison of measured and modeled Ioff (s)
Ids -Vg curves as a function of Vbs
0.0 0.5 1.0 1.510-14
10-13
10-12
10-11
10-10
10-9
10-8
10-7
10-6
Vbs
+0.1V
-0.7V
Lg = 2µm Lg = 0.1µm
I ds (A
/ µm
)
0.0 0.5 1.0 1.510-13
10-12
10-11
10-10
10-9
10-8
10-7
10-6
10-5
Vg (V) Vg (V)
01
23
4
-13
-12
-11
-10
-9
-0.75-0.50
-0.250.00
0.25
Measurement Modeling
Log 10
(I off ) (
A/µ
m)
Vbs (V)Channel length (µm)
Ssar
Vbs
off
off 10)(I)(I
γγγγ
≅≅≅≅====
Verify
Relation between power and speed in VTCMOS
0.00 0.25 0.50 0.75 1.00 1.25 1.50
0.751.00
1.251.50 0.0
0.2
0.4
0.6
0.8
1.0
PT tpd
Vdd (V)
Nor
mal
ised
t pd a
nd P
T
Vbs (V)
0.10
0.20
0.300.40
0.50
0.600.70
0.80
0.500.30
0.20
0.10
0.075
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.40.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5tpd
PT=P
ac+P
off
V dd (V
)
Vbs
(V)
POWER SPEED
)( ααααthdd
dd
on
ddloadpd VV
V
I
VCt
−−−−∝∝∝∝≈≈≈≈
Trade-off in a normal MOSFET
BUT, VTCMOS Low power and high speed
102dd
SVth
oddloadstaticactivetotal VIVf CPPP−−−−
++++====++++====
Modeling of Ion(a) characteristics( Ioff (s) = 10 −−−−13 A/µµµµm and Vdd = 1.5V)
0.0 0.3 0.6 0.9 1.2 1.5
0.50
0.75
1.00
1.25
0.2
0.3
0.4
0.5
V0
Nor
mal
ised
(I on(a
))
γ value
Vbs
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.40.2
0.2
0.3
0.3
0.3
0.4
0.4
0.5
Enhanced Ion
(a)
V0
Vbs
(V)
γ val
ue
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
√√√√ Characteristic Vbs (=Vo) exists.√√√√ Ion(a) increases with increasing Vbs.√√√√ If Vbs <<<< Vo, smaller γγγγ should be exploited.
Interpretation of V0
- rarely dependent on γγγγ- Scalability with Vdd- Related with the SCE
-9-10
-11-12
-13
7065605550
0.9
1.0
1.1
1.2
Suppressed SCE
Worse SCE
log10
(Ioff (s)) (A/µm)
V 0 val
ue (V
)
dS/dγ value(mV/decade)
(a) = 0 = 0 = 0 = 0 d γγγγ
d Ion
Definition of Vo: Vbs where Ion(a) is given by a constant
γγγγ
Ion(a)
|∆∆∆∆Vbs| = Vo
|∆∆∆∆Vbs| <Vo
|∆∆∆∆|Vbs| > Vo
(Vdd=1.5V)
γγγγ−−−−αααα××××γγγγ++++−−−−γγγγααααγγγγ++++ΩΩΩΩ−−−−+ + + + ====
−−−−
)1(]/)1)[())((( log /1
10 SddSsIV Vo offdd
Contents
√√√√ Introductory part - Necessity of low power MOSFET technology- Variable Threshold-Voltage CMOS (VTCMOS)
√√√√ Previous work: Numerical simulations of VTCMOS
√√√√ Analytical model of VTCMOS
√ Short Channel Effect on VTCMOS
√ Optimum conditions of VTCMOS
√√√√ Conclusions
Short Channel Effect on the performance of VTCMOS
0.1 170
80
90
100
110
120
130
γ value S value γ
valu
e
S va
lue
(mV
/dec
ade)
Channel length (µm)
0.00
0.05
0.10
0.15
0.20
Short Channel Effect, γγγγ decreases and S increases.
γ
New γγγγ - S relation
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.760
70
80
90
100
110
NO SCE line
S v
alue
(mV
/dec
ade)
γ value ( at Vbs = 1V )
Long channel 0.2um 0.15um 0.12um 0.1um
(mV/decade)
115)8.0( ++++−−−−γγγγγγγγ====
ddSS
Short Channel Effect - Standby off current, Ioff(s)
-0.75 -0.50 -0.25 0.00
0.01
0.1
1
10
Mea
sure
d 1/
r
Vbs
(V)
0.1 µm 0.125 µm 0.15 µm 0.5 µm 1.0 µm
-0.75 -0.50 -0.25 0.00
0.01
0.1
1
10
0.1 µm 0.125 µm 0.15 µm 0.5 µm 1.0 µm
Vbs (V)
Mod
eled
1/
r
SCE Degradation of γγγγ ↓↓↓↓ and S ↑↑↑↑
0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75
1E-13
1E-12
1E-11
1E-10
1E-9
1E-8
1E-7
1E-6
1E-5
∆Iofflong > ∆Ioff
short
∆Ioffshort
∆Iofflong
I ds (A
/ µ m
)
Vg(V)
L = 2 µm L = 0.1 µm
Larger 1/r (or Smaller Ioff(s))
Ssar
Vbs
off
off 10)(I)(I
γ γ γ γ
≅≅≅≅====
Short Channel Effect – Active on current, Ion(a)
Ion(a) = B (Vdd −−−−VTH)αααα
VTH = [S(log10(Ioff(s)) −−−− ΩΩΩΩ/ ) −−−− γγγγ ||||Vbs||||]
SCE dS/dγγγγ decreases
Decreasing Ion(a)Vth2
Log Ids
VgVdd
Ion(a)
Ioff(s)
Smaller S, larger γγγγ
Ion(a)
Larger S, smaller γγγγ
Vth1 Vth3
Vbs ×××× γ γ γ γ
Increasing VTH
Larger SCESmaller SCE
(mV/decade)
115)8.0( ++++−−−−γγγγγ γ γ γ = = = = d dSS
( γγγγ ↓↓↓↓, S ↑↑↑↑ )
Short Channel Effect – Ion(a) ModelingAt Ioff(s)=10−−−−13 A/µµµµm
0.0 0.3 0.6 0.9 1.2 1.5
0.4
0.6
0.8
1.0
1.2
0.20.3
0.40.5
dS/dγ = 45
dS/dγ = 70
Nor
mal
ised
I on(a
)
γ valueVbs (V)
0.800.88 0.960.72
1.00.64
1.1
0.560.72 0.80 0.880.64
0.960.56
1.00.48
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.40.15
0.20
0.25
0.30
0.35
0.40
0.45
0.50
V0
V bs (V
)
γ value
SCE 1. To make Ion(a) Smaller.
2. To shift Vo to a lower value.( γγγγ ↓↓↓↓, S ↑↑↑↑ )
Optimum condition
(1) |∆∆∆∆Vbs| should be set as large as the junction leakage permits.
(2) Appropriate selection of Vdd and Vbs must be made to satisfy both low Ioff(s) and high Ion(a).
(3) When the values of γ γ γ γ and Vth can bedesigned at a fixed |∆∆∆∆Vbs|, the optimum γγγγ depends on Vo.
−−−− γγγγ should be large (|∆∆∆∆Vbs| > Vo)−−−− γγγγ should be small (|∆∆∆∆Vbs| < Vo)
(4) To design a VTCMOS of high performance,The following parameters must be larger. (suppressed SCE).
Eoff ≡≡≡≡ ∆γ∆γ∆γ∆γ / γγγγ −−−− ∆∆∆∆S / S and Eon ≡≡≡≡ ∆γ∆γ∆γ∆γ ⋅⋅⋅⋅Vbs −−−− ∆∆∆∆S ⋅⋅⋅⋅ ( Ioff(s) −−−− ΩΩΩΩ/ )
γγγγ
Ion(a)
|∆∆∆∆Vbs| = Vo
|∆∆∆∆Vbs| < Vo
|∆∆∆∆Vbs| > Vo
Conclusions
√√√√ A very compact analytical VTCMOS model has been developed.
√√√√ VTCMOS can attain lower power than a normal CMOSat the same speed.
√√√√ Short Channel Effect degrades the VTCMOS’ performance. SCE should be suppressed.
√√√√ Optimum device conditions for VTCMOS are discussed.
top related