ece 667 student presentation gayatri prabhu [1]. *phdd: an efficient graph representation for...

ECE 667 Student PresentationGayatri Prabhu

[1]. *PHDD: An Efficient Graph Representation for Floating Point Circuit Verification – Y. Chen, R. Bryant, ICCAD 1997

*PHDD: Multiplicative Power Hybrid Decision Diagrams[1]

Agenda

Motivation Floating point representation *PHDD construction Floating point function through *PHDDs Benefits Conclusion

Motivation

BMDs [1], *BMDs [1] ,K*BMDs [2] and HDDs [3]

inefficient to map Boolean vectors to floating point values.• Output in the form of a word.

• Need some way of incorporating the radix point• Need rational number (n/d) representation

• Computationally expensive

Extend *BMDs to *PHDDs

[1] Bryant,R.E and Chen Y-A. “Verification of arithmetic circuits with binary moment diagrams”, DAC 1995[2] Drechsler R. , Becker,B. and Ruppertz,S. “K*BMDs: a new data structure for verification”, DATE 1995[3] Clarke, E.M, Fujita M, Zhao X. “Hybrid decision diagrams overcoming the limitations of MTBDDs and BMDs “, ICCAD 1995

Floating point representation

Floating point : Radix point at an arbitrary position

IEEE 754 notation to store in memory• Derived from scientific notation

• Eg : 123.45 = 1.2345 x 102

Number = (-1)sign x (Base)exponent x Mantissa

Sign: 0 means positive and 1 means negative Base = 2

Sign E M

http://steve.hollasch.net/cgindex/coding/ieeefloat.html

Mantissa - m bits• Radix point after first non-zero digit;

• Base 2 => Non zero-digit =1• Mantissa always in form 1.M ; Stored mantissa = M

Exponent – n bits • Stored exponent = Actual exponent + Bias• Bias to remove negative numbers in the stored format• For n-bit exponent bias = 2n-1 -1

So for n =3 , m = 3; Bias = 2(3-1) - 1 ; 0.75 = 0.11• Sign=0; Stored exponent = -1+3 =2 ; Stored mantissa = 0b100

5 = 5.00 x 100

5 = 5000.0 x 10-3

Number = (-1)s x 2(E-bias) x 1.M• Normal form

Overflow : Exponent requires more bits • Not considered in *PHDDs

Underflow : Number too small to represent with precision. Eg:0.000000000000075• Need to approximate to zero• Denormal form : (-1)s x 2(1-bias) x 0.M

Failure of BMDs and *BMDs to represent floats

x0x0 x0

1 2 4 8

1/4 1/2 1 2

“ *PHDD: An Efficient Graph Representation for Floating Point Circuit Verification “ Y. Chen, R. Bryant, ICCAD 1997

*PHDDs : Construction and manipulation

*PHDD- Introduction

Multiplicative Power Hybrid Decision Diagrams

• Multiplicative • Edge weights multiplied with variables

• Power• Edge weights restricted to powers of a constant

• Hybrid since different decompositions allowed• Shannon -

• Positive Davio -

• Negative Davio

xfxf )1(

xxxxxffffxff ;.

xxxxx ffffxff

Edge Weight rules

Edge Weights = w which represents cw ; • c a constant ; positive• w can be positive or negative• Only c=2 considered since the effort is directed towards

floating point arithmetic.

All edges have weight; • No weights near edge=> w=0

Represented function = {20 x0+21 x1+22 x2}

*PHDDs Reduction rules (1)

Normalize edge weights• Atmost one branch has non-zero weight• Edge weights ≥ 0 except for the top one• Leaf nodes can have only odd integers or 0.

*PHDDs Reduction rules (2)

Introduce negation edges• Increases sharing • Helpful whenever a sign bit is involved

Decomposition

• One variable always associated with one type of decomposition

f= 1+y+3x+3xy

Making *PHDDs canonical

Follow ordering Associate decomposition type with variable Remove redundancy Merge duplicates Normalize edge weights Negation edges whenever necessary

Zero edge of every node is a regular edge Negation of leaf 0 is still leaf 0 Leaves must be non-negative

*BMD vs *PHDD

*BMDs Decomposition

- Positive Davio

Edge weight – any number

Weight manipulation - requires GCD computations

*PHDDs

Decomposition – Shannon, Positive Davio & Negative Davio

Edge weight – Powers of 2 (exponents)

Weight manipulation – just addition and subtraction

Representing a function in *PHDD

x1 x0 f

1 2 4 8

HDD representation with Shannon decomposition

x1, x0 bits of a number => X= x0+2x1 and f = 2X

Conversion from HDD to *PHDD

1 2 4 8

Extract powers of 2 Normalize Reduce

Manipulating *PHDDs

Represent cX where X is a number and c=2

1 More bit in X

*PHDDs and ARITHMETIC

Floating point operations

Break down into sign, exponent and mantissa part

PHDDs for each part • Shannon for sign• Shannon for exponent• Positive Davio for mantissa

Combine all the individual parts• Bias at the top followed by sign, exponent and mantissa

Floating Point Encoding

• Functions:(-1)Sx * 2(EX-Bias) * 1.X– Exponent: 2bits, Mantissa: 3bits, Bias:1

PHDDs and floating point encoding

Normal ->(-1)S * 2(EX-Bias) * 1.MDenormal ->(-1)S * 2(1-Bias) * 0.M

EX – 3 bits ; X – 4 bits ; B =3

Applying *PHDDs to arithmetic operations

1. Represent numbers in a binary encoded form2. Use composition (~ APPLY in BDDs) to combine

the numbers in operations1. Eg: Floating point multiplication

0EY and 0EX if .1.122

0EY and 0EX if .0.10122

0EY and 0EX if .1.02012

0EY and 0EX if .0.0012012

)(2.)1(;)(2.)1(

YXEYEX

BEYYyvy

yFBEXX

Floating point multiplication

Advantages and disadvantages

Advantages• Six times faster than *BMDs• Uses less memory• Linear complexity for FP multiplication

Disadvantages• Edge weights restricted to powers of 2• Floating point addition complexity exponential with

exponent size

Applications• Floating point circuit verification

Conclusion

*PHDDs mainly for floating point verification Edge weights power of 2 Reduction rules Boolean to Floating point :

• Shannon decomposition for sign and exponent; Positive Davio for Mantissa

Boolean to Integers : • Positive Davio decomposition

Boolean to Boolean : • Shannon decomposition

Questions?

Backup

Sign bit --- Actually a form of decision making

Integer representation of a 3-bit number

Unsigned Sign Magnitude Twos complement

Sign : ShannonMag. : Davio

Integer operations

Addition : Summing weighted bitsxi+yi

Multiplication: Summing weighted partial products …X = 1 1 0 Y=1 1 1

Y*X = (xiY) 2i = (xi2i ) Y

1 1 1 *

1 1 0 -----------

1 1 1 0

1 1 1 0 0

Complexity of FP Addition

• Operands:– Fx=(-1)Sx * 1.X * 2EX

– Fy=(-1)Sy * 1.Y * 2EY

– Assume EX >=EY– k=EX-EY

(-1)Sx *1.X

R= (-1) Sx *1.X + (-1) Sy *(1.Y >>k))

(-1)Sy * 1.Y+

• Exact Result– Fx+Fy= 2EX * ((-1) Sx * 1.X + (-1) Sy * (1.Y >>k))

• Complexity: – 2n-2 possible values for k.

– O(2n)

Negation edges

Decomposition

Shannon

Positive Davio

Negative Davio

xfxf )1(

xxxxxffffxff ;.

xxxxx ffffxff

ece 667 student presentation gayatri prabhu [1]. *phdd: an efficient graph representation for...

floating point arithmetic

point function

ebias x

point values

bits radix point

exponent bias

manipulation slide

stored exponent

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