binary-to-bcd converter

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Binary-to-BCD Converter. Discussion DS-4.1. Shift and Add-3 Algorithm. S1. Shift the binary number left one bit. 22. If 8 shifts have taken place, the BCD number is in the Hundreds , Tens , and Units column. 33. If the binary value in any of the BCD columns is 5 or greater, - PowerPoint PPT Presentation

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Binary-to-BCD Converter

Discussion DS-4.1

Shift and Add-3 Algorithm S1. Shift the binary number left one bit.22. If 8 shifts have taken place, the BCD number is in the

Hundreds, Tens, and Units column.33. If the binary value in any of the BCD columns is 5 or greater,

add 3 to that value in that BCD column.44. Go to 1. 

Operation Hundreds Tens Units Binary HEX F F Start 1 1 1 1 1 1 1 1

Operation Hundreds Tens Units Binary HEX F F Start 1 1 1 1 1 1 1 1

Shift 1 1 1 1 1 1 1 1 1 Shift 2 1 1 1 1 1 1 1 1 Shift 3 1 1 1 1 1 1 1 1 Add 3 1 0 1 0 1 1 1 1 1 Shift 4 1 0 1 0 1 1 1 1 1 Add 3 1 1 0 0 0 1 1 1 1 Shift 5 1 1 0 0 0 1 1 1 1 Shift 6 1 1 0 0 0 1 1 1 1 Add 3 1 0 0 1 0 0 1 1 1 1 Shift 7 1 0 0 1 0 0 1 1 1 1 Add 3 1 0 0 1 0 1 0 1 0 1 Shift 8 1 0 0 1 0 1 0 1 0 1 BCD 2 5 5

Steps to convert an 8-bit binary number to BCD

Truth table for Add-3 Module

A3 A2 A1 A0 S3 S2 S1 S0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 1 0 0 0 1 0 0 0 1 1 0 0 1 1 0 1 0 0 0 1 0 0 0 1 0 1 1 0 0 0 0 1 1 0 1 0 0 1 0 1 1 1 1 0 1 0 1 0 0 0 1 0 1 1 1 0 0 1 1 1 0 0 1 0 1 0 X X X X 1 0 1 1 X X X X 1 1 0 0 X X X X 1 1 0 1 X X X X 1 1 1 0 X X X X 1 1 1 1 X X X X

C

A3 A2 A1 A0

S3 S2 S1 S0

A3 A2 A1 A0 S3 S2 S1 S0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 1 0 0 0 1 0 0 0 1 1 0 0 1 1 0 1 0 0 0 1 0 0 0 1 0 1 1 0 0 0 0 1 1 0 1 0 0 1 0 1 1 1 1 0 1 0 1 0 0 0 1 0 1 1 1 0 0 1 1 1 0 0 1 0 1 0 X X X X 1 0 1 1 X X X X 1 1 0 0 X X X X 1 1 0 1 X X X X 1 1 1 0 X X X X 1 1 1 1 X X X X

K-Map for S3

A3 A2

A1 A0

00 01 11 10

00

01

11

10

1 1

11

1

X

S3 = A3+ A2 * A0+ A2 * A1

X X X

X

X

C1

C2

C3

C4C6

C5C7

B7

0

0 B6 B5 B4 B3 B2 B1 B0

P7 P6 P5 P4 P3 P2 P1 P0P9 P8

8-bit binary input

BCD output

hunds tens units

Binary-to-BCDConverter

S3

C1

C2

C3

C4C6

C5C7

B7

0

0 B6 B5 B4 B3 B2 B1 B0

P7 P6 P5 P4 P3 P2 P1 P0P9 P8

8-bit binary input

BCD output

hunds tens units

1 1 1 1 1 1 1 1

1 0 1 0

1 0 0 0

1 1 0 0 0 1

1 0 0 1 0 0 1 1

1 0 0 1 0 1 0 1 0 1

1 1

2 5 5

Hex FF

Binary-to-BCDConverter

Structural Solution

Operation Tens Units Binary

B 5 4 3 2 1 0

HEX 3 F

Start 1 1 1 1 1 1

Shift 1 1 1 1 1 1 1

Shift 2 1 1 1 1 1 1

Shift 3 1 1 1 1 1 1

Add 3 1 0 1 0 1 1 1

Shift 4 1 0 1 0 1 1 1

Add 3 1 1 0 0 0 1 1

Shift 5 1 1 0 0 0 1 1

Shift 6 1 1 0 0 0 1 1

BCD 6 3 P 7 4 3 0

z 13 10 9 6 5 0

Steps to convert a 6-bit binary number to BCD

1. Clear all bits of z to zero2. Shift B left 3 bits

z[8:3] = B[5:0];3. Do 3 times if Units >4 then add 3 to Units (note: Units = z[9:6]) Shift z left 1 bit4. Tens = P[6:4] = z[12:10] Units = P[3:0] = z[9:6]

C1

C2

C30

0 B5 B4 B3 B2 B1 B0

P7 P6 P5 P4 P3 P2 P1 P0

6-bit binary input

BCD output

tens units

1 1 1 1 1 1

1 0 1 0

1 0 0 0

1 1 0 0 0 1 1

6 3

Hex 3F

Operation Tens Units Binary

B 5 4 3 2 1 0

HEX 3 F

Start 1 1 1 1 1 1

Shift 1 1 1 1 1 1 1

Shift 2 1 1 1 1 1 1

Shift 3 1 1 1 1 1 1

Add 3 1 0 1 0 1 1 1

Shift 4 1 0 1 0 1 1 1

Add 3 1 1 0 0 0 1 1

Shift 5 1 1 0 0 0 1 1

Shift 6 1 1 0 0 0 1 1

BCD 6 3 P 7 4 3 0

z 13 10 9 6 5 0

binbcd6.vhd

-- Title: Binary-to-BCD Converterlibrary IEEE;use IEEE.std_logic_1164.all;use IEEE.std_logic_unsigned.all; entity binbcd6 is port ( B: in STD_LOGIC_VECTOR (5 downto 0); P: out STD_LOGIC_VECTOR (6 downto 0) );end binbcd6;

architecture binbcd6_arch of binbcd6 isbegin bcd1: process(B) variable z: STD_LOGIC_VECTOR (12 downto 0);

begin for i in 0 to 12 loop

z(i) := '0'; end loop; z(8 downto 3) := B;  for i in 0 to 2 loop

if z(9 downto 6) > 4 then z(9 downto 6) := z(9 downto 6) + 3; end if; z(12 downto 1) := z(11 downto 0);

end loop;

P <= z(12 downto 6); end process bcd1; end binbcd6_arch;

Operation Tens Units Binary

B 5 4 3 2 1 0

HEX 3 F

Start 1 1 1 1 1 1

Shift 1 1 1 1 1 1 1

Shift 2 1 1 1 1 1 1

Shift 3 1 1 1 1 1 1

Add 3 1 0 1 0 1 1 1

Shift 4 1 0 1 0 1 1 1

Add 3 1 1 0 0 0 1 1

Shift 5 1 1 0 0 0 1 1

Shift 6 1 1 0 0 0 1 1

BCD 6 3 P 7 4 3 0

z 13 10 9 6 5 0

C1

C2

C30

0 B5 B4 B3 B2 B1 B0

P7 P6 P5 P4 P3 P2 P1 P0

6-bit binary input

BCD output

tens units

1 1 1 1 1 1

1 0 1 0

1 0 0 0

1 1 0 0 0 1 1

6 3

Hex 3F

binbcd6.vhd (cont.)

Operation Tens Units Binary

B 5 4 3 2 1 0

HEX 3 F

Start 1 1 1 1 1 1

Shift 1 1 1 1 1 1 1

Shift 2 1 1 1 1 1 1

Shift 3 1 1 1 1 1 1

Add 3 1 0 1 0 1 1 1

Shift 4 1 0 1 0 1 1 1

Add 3 1 1 0 0 0 1 1

Shift 5 1 1 0 0 0 1 1

Shift 6 1 1 0 0 0 1 1

BCD 6 3 P 7 4 3 0

z 13 10 9 6 5 0

C1

C2

C30

0 B5 B4 B3 B2 B1 B0

P7 P6 P5 P4 P3 P2 P1 P0

6-bit binary input

BCD output

tens units

1 1 1 1 1 1

1 0 1 0

1 0 0 0

1 1 0 0 0 1 1

6 3

Hex 3Fbinbcd6.vhd

-- Title: Binary-to-BCD Converter

library IEEE;

use IEEE.std_logic_1164.all;

use IEEE.std_logic_unsigned.all;

 

entity binbcd is

port (

B: in STD_LOGIC_VECTOR (7 downto 0);

P: out STD_LOGIC_VECTOR (9 downto 0)

);

end binbcd;

8-Bit Binary-to-BCD Converter binbcd8.vhd

architecture binbcd_arch of binbcd isbegin bcd1: process(B)

variable z: STD_LOGIC_VECTOR (17 downto 0);

begin for i in 0 to 17 loop

z(i) := '0'; end loop; z(10 downto 3) := B;  for i in 0 to 4 loop

if z(11 downto 8) > 4 then z(11 downto 8) := z(11 downto 8) + 3;end if;if z(15 downto 12) > 4 then z(15 downto 12) := z(15 downto 12) + 3;end if;z(17 downto 1) := z(16 downto 0);

end loop;P <= z(17 downto 8);

end process bcd1; end binbcd_arch;

Operation Hundreds Tens Units Binary B 7 4 3 0

HEX F F Start 1 1 1 1 1 1 1 1

Shift 1 1 1 1 1 1 1 1 1 Shift 2 1 1 1 1 1 1 1 1 Shift 3 1 1 1 1 1 1 1 1 Add 3 1 0 1 0 1 1 1 1 1 Shift 4 1 0 1 0 1 1 1 1 1 Add 3 1 1 0 0 0 1 1 1 1 Shift 5 1 1 0 0 0 1 1 1 1 Shift 6 1 1 0 0 0 1 1 1 1 Add 3 1 0 0 1 0 0 1 1 1 1 Shift 7 1 0 0 1 0 0 1 1 1 1 Add 3 1 0 0 1 0 1 0 1 0 1 Shift 8 1 0 0 1 0 1 0 1 0 1 BCD 2 5 5

P 9 8 7 4 3 0 z 17 16 15 12 11 8 7 4 3 0

binbcd8.vhd (cont.)

Operation Hundreds Tens Units Binary B 7 4 3 0

HEX F F Start 1 1 1 1 1 1 1 1

Shift 1 1 1 1 1 1 1 1 1 Shift 2 1 1 1 1 1 1 1 1 Shift 3 1 1 1 1 1 1 1 1 Add 3 1 0 1 0 1 1 1 1 1 Shift 4 1 0 1 0 1 1 1 1 1 Add 3 1 1 0 0 0 1 1 1 1 Shift 5 1 1 0 0 0 1 1 1 1 Shift 6 1 1 0 0 0 1 1 1 1 Add 3 1 0 0 1 0 0 1 1 1 1 Shift 7 1 0 0 1 0 0 1 1 1 1 Add 3 1 0 0 1 0 1 0 1 0 1 Shift 8 1 0 0 1 0 1 0 1 0 1 BCD 2 5 5

P 9 8 7 4 3 0 z 17 16 15 12 11 8 7 4 3 0

binbcd8.vhd

C1

C2

C3

C4C6

C5C7

B7

0

0 B6 B5 B4 B3 B2 B1 B0

P7 P6 P5 P4 P3 P2 P1 P0P9 P8

8-bit binary input

BCD output

hunds tens units

1 1 1 1 1 1 1 1

1 0 1 0

1 0 0 0

1 1 0 0 0 1

1 0 0 1 0 0 1 1

1 0 0 1 0 1 0 1 0 1

1 1

2 5 5

Hex FF

C1

C2

C3

C4C14

C5C15

B150 B14 B13 B12 B11B10 B9 B8

16-bit binary input

B7 B6 B5 B4 B3 B2 B1 B0

BCD output

hundreds tens units

C6C16

C7C17C24

C8C18C25

C9C19C26

C11C21C28C32

C12C22C29C33

C13C23C30C34

0

0

C10C20C27C31

0

thousandsten thousands

P15 P14 P13 P12 P11 P10 P9 P8 P7 P6 P5 P4 P3 P2 P1 P0P19 P17P18 P16

16-bitBinary-to-BCDConverter

binbcd16.vhd

-- Title: Binary-to-BCD Converterlibrary IEEE;use IEEE.std_logic_1164.all;use IEEE.std_logic_unsigned.all; entity binbcd16 is port ( B: in STD_LOGIC_VECTOR (15 downto 0); P: out STD_LOGIC_VECTOR (18 downto 0) );end binbcd16;

architecture binbcd16_arch of binbcd16 isbegin bcd1: process(B)

variable z: STD_LOGIC_VECTOR (34 downto 0);

C1

C2

C3

C4C14

C5C15

B150 B14 B13 B12 B11B10 B9 B8

16-bit binary input

B7 B6 B5 B4 B3 B2 B1 B0

BCD output

hundreds tens units

C6C16

C7C17C24

C8C18C25

C9C19C26

C11C21C28C32

C12C22C29C33

C13C23C30C34

0

0

C10C20C27C31

0

thousandsten thousands

P15 P14 P13 P12 P11 P10 P9 P8 P7 P6 P5 P4 P3 P2 P1 P0P19 P17P18 P16

begin for i in 0 to 34 loop

z(i) := '0'; end loop; z(18 downto 3) := B;  for i in 0 to 12 loop

if z(19 downto 16) > 4 then z(19 downto 16) := z(19 downto 16) + 3;end if;if z(23 downto 20) > 4 then z(23 downto 20) := z(23 downto 20) + 3;end if;if z(27 downto 24) > 4 then z(27 downto 24) := z(27 downto 24) + 3;end if;if z(31 downto 28) > 4 then z(31 downto 28) := z(31 downto 28) + 3;end if;z(34 downto 1) := z(33 downto 0);

end loop; P <= z(34 downto 16); end process bcd1;end binbcd16_arch;

C1

C2

C3

C4C14

C5C15

B150 B14 B13 B12 B11B10 B9 B8

16-bit binary input

B7 B6 B5 B4 B3 B2 B1 B0

BCD output

hundreds tens units

C6C16

C7C17C24

C8C18C25

C9C19C26

C11C21C28C32

C12C22C29C33

C13C23C30C34

0

0

C10C20C27C31

0

thousandsten thousands

P15 P14 P13 P12 P11 P10 P9 P8 P7 P6 P5 P4 P3 P2 P1 P0P19 P17P18 P16

binbcd16.vhd (cont.)

C1

C2

C3

C4C14

C5C15

B150 B14 B13 B12 B11B10 B9 B8

16-bit binary input

B7 B6 B5 B4 B3 B2 B1 B0

BCD output

hundreds tens units

C6C16

C7C17C24

C8C18C25

C9C19C26

C11C21C28C32

C12C22C29C33

C13C23C30C34

0

0

C10C20C27C31

0

thousandsten thousands

P15 P14 P13 P12 P11 P10 P9 P8 P7 P6 P5 P4 P3 P2 P1 P0P19 P17P18 P16

binbcd16.vhd

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