aegis 2008 annual assembly 11 december 2008 paless – parallel analogue and logical simulation...
TRANSCRIPT
Acad
em
ic a
nd E
ducat ional Gr id Init iat ive o
f Serbia
A E G I S
AEGIS 2008 Annual Assembly
11 December 2008
PALESS – Parallel Analogue and Logical Simulation SystemMarko Dimitrijević
Faculty of electronic engeneering, University of Niš
Serbia
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11 December 2008
IntroductionIntroduction The simulation process of modern complex integrated
circuits and systems is memory and computationally intensive and algorithmically complex. An efficient way to cope with long simulation runtimes and high computational requirements is parallel simulation on a computer grid.
PALESS enables parallel simulation of electronic circuits and systems, characterized as large scale, mixed-signal, and mixed-mode including non-electrical components and phenomena on the grid. It can reduce long simulation runtimes of large mixed-signal circuits and microelectromechanical systems described by partial differential equations.
The simulation process speedup will increase integrated circuit design efficiency.
AEGIS 2008 Annual Assembly
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Application requirementsApplication requirements Obtain simulation speedup using parallel equation
formulation for nonlinear analog circuit elements providing possibility to analyze more complex circuits;
The Grid interface for the PALESS application; Possibility to run simultaneous simulations with
different simulation parameters using required grid resources.
AEGIS 2008 Annual Assembly
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Application requirements Application requirements The simulation of electronic circuits and systems is memory and computationally intensive, time consuming process suitable for execution on the Grid.Message Passing Interface (MPI)
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Solutions vector (previous iteration)
Solutions vector (past and past past time instants)
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Paralelization of equationParalelization of equation
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Nonlinearelements
contribution
Constant+
Lineartime
Dependent
SLAVE
SLAVE
SLAVE
MASTER
In eachiteration
Nonlinearelements
contribution
Nonlinearelements
contribution
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Master – Slave algorithmMaster – Slave algorithm
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Master
Slave NSlave 2Slave 1
Circuit matrix
Circuit matrix
Circuit matrix
Simulation
…
MPI_Recv
MPI_Send
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Implemenatation using MPIImplemenatation using MPI
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Solution vector (before previous iteration)
Solution vector (previous iteration)
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Application speedupApplication speedup
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nodesN on timeSimulation
node 1 on timeSimulationSpeedup
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Aplication speedupAplication speedup
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Application performance by the number of MOSFETs (circuit complexity) is shown, speedup
presents execution time ratio 2CPU/1CPU.
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Application speedupApplication speedup
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Application performance by the number of CPUs (circuit complexity is 1000 MOSFETs)
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ConclusionConclusion
Application performance is improved using MPI
Grid interface for PALLES aplication is developed
Application is successfully deployed within Seegrid infrastructure
AEGIS 2008 Annual Assembly