advd analog.pdf
TRANSCRIPT
A REPORT ON
Design a two stage single-ended output OPAMP (Folded
Cascode [Differential amplifier + common gate stage] + gain
stage)
Shreyash Pratap Singh 2011A3PS223P
Srinivas Gopal B.V. 2011A3PS148P
Arvind Biswal 2011A3PS100P
Submitted in partial fulfillment of the course
EEE C443/ EEE F313/ INSTR F313 – Analog & Digital VLSI Design
Under the Guidance of Mr. Sachin Maheshwari
Birla Institute of Technology and Science, Pilani
August-December, 2013
1. Introduction
Operational amplifiers (op amps) are an integral part of many analog and
mixed-signal systems. Op amps with vastly different levels of complexity are used to realize
functions ranging from dc bias generation to high-speed amplification filtering.
As a part of analog assignment, in this report we present the design and
simulation of a two-stage single ended output OP AMP (Folded cascode [differential
amplifier + common gate stage] + gain stage) with the biasing circuit for the following
specifications
i. Gain ≥ 90 dB
ii. Unity Gain Bandwidth ≥ 100 MHz
iii. Phase margin ≈ 60°
2. Theoretical Expressions ( Details of Circuit realization)
3. Frequency Compensation
4. Transistor Level Schematic of the Operational Amplifier
Figure 2 Circuit Diagram of Two Stage Folded Cascode Single Ended Output
OPAMP
5. Simulation Setups and Plots
5.1. Gain and Unity-Gain Bandwidth (UGB)
Figure 3 Circuit Setup for Open Loop Gain Calculation
tt – Corner (27° C, +3.3 V Supply)
Gain = 105.4 dB
UGB = 122.6 MHz
ff- Corner (0° C , +3.63 V Supply)
Gain = 110.6 dB
UGB = 117 MHz
ss- Corner (100 0° C , +2.97 V Supply)
Gain = 88.66 dB
UGB = 61.2 MHz
5.2. Phase Margin
Figure 4 Circuit Setup for Phase Margin Calculation
The open loop phase margin was found to be 59.88° which falls in the range of stable
operation i.e. 45°-60°
Analysis to check the stability of the op-amp
Closed loop phase margin was found to be 59.23° during stability analysis which
falls within the range of stable operation i.e. 45 to 60 degrees. Consequently, the
opamp was found to operate in a stable manner during analysis at all corners
The Gain margin must be less than Phase Margin, also the Phase Margin should be
well above 50 degrees
tt – Corner (27° C, +3.3 V Supply)
**********************************************************
Stability Analysis ‘stb’ freq = (1Hz -> 10GHz)
**********************************************************
Gain margin = 9.538 dB at frequency = 207.5 MHz
Phase margin = 59.23° at frequency = 109.2 MHz
ff – Corner (0° C, +3.63 V Supply)
**********************************************************
Stability Analysis ‘stb’ freq = (1Hz -> 10GHz)
**********************************************************
Gain margin = 7.251 dB at frequency = 226.3 MHz
Phase margin = 40.64° at frequency = 145.7 MHz
ss – Corner (100° C, +2.97 V Supply)
**********************************************************
Stability Analysis ‘stb’ freq = (1Hz -> 10GHz)
**********************************************************
Gain margin = 16.98 dB at frequency = 195.2 MHz
Phase margin = 123.9° at frequency = 31.36 MHz
5.3 Input Common Mode Range
Figure 5 Circuit Setup for ICMR calculation
A DC sweep of the input to the non-inverting terminal was performed
The opamp was connected in unity gain feedback
tt – Corner (27° C, +3.3 V Supply)
ICMR: 3.2133 – 0.8439 V = 2.3691 V
5.4 Common Mode Rejection Ratio
Figure 6 Circuit Setup for CMRR Calculation
The op-amp was connected in unity gain feedback
A common mode AC signal is provided to both the inverting and non-inverting
terminals
tt – Corner (27° C, +3.3 V Supply)
CMRR = 108.9 dB
5.5 Power Supply Rejection Ratio
Figure 7 Circuit Setup for PSRR Calculation
The opamp was connected in unity gain feedback
An AC source was provided at the upper rail of the power supply
tt – Corner (27° C, +3.3 V Supply)
PSRR = 80.11 dB
5.6 Slew Rate and Settling Time
Figure 9 Circuit Setup for Settling Time and Slewrate Calculation
The opamp was connected in unity gain feedback
A Transient pulse was provided at the inverting terminal input
Slew Rate = 1.83 V/µs
Settling Time = 554.472 ms
tt – Corner (27° C, +3.3 V Supply)
5.7 Input and Output Offset Voltage
Figure 10 Circuit Setup for Offset Voltage Calculation
A DC sweep of the input to the non-inverting terminal was performed
The opamp was connected in unity gain feedback
tt – Corner (27° C, +3.3 V Supply)
Output offset voltage = 70.881 mV
Input offset voltage = 380.648 nV
5.8 Output Swing
Figure 11 Circuit Setup for Output Swing Calculation
A Transient pulse was given at both the inverting and non-inverting terminals
tt – Corner (27° C, +3.3 V Supply)
Maximum Symmetric swing = 2.9296V
5.9 Unity Gain Buffer
Figure 12 Circuit Setup as Unity Gain Buffer
The opamp was connected in unity gain configuration
An AC analysis was performed to find the gain and it was found to be
approximately 0 dB
tt – Corner (27° C, +3.3 V Supply)
The Gain was observed to be 0 dB for AC Analysis thus confirming the unity gain buffer.
A Transient analysis was also performed to confirm the unity gain buffer operation.
It was observed the output peak to peak voltage and the input peak to peak voltage were
almost equal giving a gain of approximately one, confirming the unity gain buffer operation.
Results
Op-AMP Specifications Results Gain 105.4 dB UGB 122.6 MHz Phase Margin 59.88° PSRR 80.11 dB CMRR 108.9 dB Settling Time 554.472 ms Slew Rate 1.83 V/µs ICMR 2.3691 V Output Swing 2.9295 V Power 2.8298 mW Input Offset 380.6481 nV Output Offset 70.881 mV
UGB gain 54.36 µdB