accident zone detection

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1. INTRODUCTION

Road accidents constitute the major part of the accident deaths all over the world.

According to the Insurance Institute for Highway Safety (IIHS), new cars and its

high-tech safety features have helped to lessen auto related deaths over the past 12

years. Though it credits technology for lessening auto accidents, yet the IIHS

cannot help accusing bad driving behaviours like drunken driving, speeding and

not using seatbelts for still causing major traffic deaths. Automatic vehicle

accident detection and messag-ing system is an embedded intelligence implanted

into the auto-mobile.

Vehicle tracking system main aim is to give Security to all vehicles. Accident

alert system main aim is to rescuing people in accidents. This is improved security

systems for vehicles. The latest like GPS are highly useful now a days, this

system enables the owner to observe and track his vehicle and find out vehicle

movement and its past activities of vehicle.

This new technology, popularly called vehicle Tracking Systems which created

many wonders in the security of the vehicle. This hardware is fitted on to the

vehicle in such a manner that it is not visible to anyone who is inside or outside of

the vehicle. Thus it is used as a covert unit which continuously or by any interrupt

to the system, sends the location data to the monitoring unit.

When the vehicle is stolen, the location data from tracking system can be used to

find the location and can be informed to police for further action. Some Vehicle

tracking System can even detect unauthorized movements of the vehicle and then

alert the owner. This gives an edge over other pieces of technology for the same

purpose.

This accident alert system in it detects the accident and the location of the

accident occurred and sends GPS coordinates to the specified mobile, computer

etc.

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1.1. VEHICLE TRACKING FEATURES

It is mainly benefit for the companies which are based on transport system.

Since it can show the position of all vehicles in real time, so that they can

create the expected data accordingly. These tracking system can store the

whole data where the vehicle had gone, where did it stop, how much time it

take at every stop and can create whole data analysis. It is also used in buses

and trains, to estimate how far are they, how much time it takes for them to

come to a particular stop. These systems are used to data capture, data storage,

data analysis and finally data transfer.

1.2. ACCIDENT ALERT SYSTEM FEATURES

This system is based on new technology, its main purpose is to detect an

accident and alert to the control room, so the victim can find some help. It can

detect accidents the intensity of the accident without any visual contact from

control room. If this system is inserted in every vehicle then it is easy to

understand how many vehicles are involved in a particular accident and how

intense is it. So that the control room people can help the situation with the

prior knowledge of the location. The present board designed has both vehicle

tracking and accident alert systems, which make it more valuable and useful.

This board alerts us from theft and on accident detection also. This device

detects fire accidents also by placing fire detector in one of the interrupt pins.

1.3. USAGE OF TRACKING IN INDIA

Tracking in India is mainly used by transport systems, taxi companies, traffic

operators. Taxi operators use this to estimate how far the vehicle is from a

particular area and send this information to call centers and they can inform

general public about the distance of the taxi location and time it takes tom

come to them. Another use is for traffic police if this system is located in

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every vehicle they can estimate the traffic by looking on the map and if any

accident is detected then they can route the traffic in to another way. This is

how tracking is useful because India is one of busy traffic countries and this

system can control many of the traffic problems.

1.4. PROBLEM STATEMENT

Tracking in India is mainly used by transport systems, taxi companies, traffic

operators. Taxi operators use this to estimate how far the vehicle is from a

particular area and send this information to call centers and they can inform

general public about the distance of the taxi location and time it takes tom

come to them. Another use is for traffic police if this system is located in

every vehicle they can estimate the traffic by looking on the map and if any

accident is detected then they can route the traffic in to another way. This is

how tracking is useful because India is one of busy traffic countries and this

system can control many of the traffic problems.

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2. BLOCK DIAGRAM

This is the block diagram of vehicle tracking and accident alert system. This

shows the overall view of the vehicle tracking and accident alert system circuit.

The blocks connected here are LCD display, GPS, GSM, Shock Sensor, Power

supply.

FIG: 2.1 BLOCK DIAGRAM

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2.1. CONCEPT AND OVERVIEW

This vehicle tracking system takes input from GPS and send it through the

GSM module to desired mobile/laptop using mobile communication. Vehicle

Tracking System is one of the biggest technological advancements to track the

activities of the vehicle. The security system uses Global Positioning System

GPS, to find the location of the monitored or tracked vehicle and then uses

satellite or radio systems to send to send the coordinates and the location data

to the monitoring center. At monitoring center various softwares are used to

plot the Vehicle on a map. In this way the Vehicle owners are able to track

their vehicle on a real-time basis. Due to real-time tracking facility, vehicle

tracking systems are becoming increasingly popular among owners of

expensive vehicles.

FIG: 2.2 SYSTEM OVERVIEW

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Modem performs modulation during transmission and performs demodulation

during reception. GSM modem is similar to mobile phone without any

display, keypad, and speakers. It can send and receive messages and calls. The

data will be sent to MAX232 IC through RS232 cable.MAX232 synchronizes

the baud rates of modem and microcontroller. It also converts RS 232 voltage

lev-els to TTL voltage levels and vice versa. In RS 232, Logic 0 is represented

in between +3 volts to +25 volts, Logic 1 is represented in between -3 to -25

volts. In TTL logic 0 is represented as zero volts logic 1 is represented as +5

volts. Microcontroller sup-ports TTL voltage levels rather than RS 232

voltage levels. The received data is given to the microcontroller.

Correspondingly it gives an acknowledgement in the form of an SMS to the

mobile phone. LCD used in the circuit displays the reception of messages.

The microcontroller is interfaced to GPS and GSM module via a multiplexer,

where these devices are activated using select lines internally built in the

multiplexer. Multiplexer is interfaced to microcontroller via transmit and

receive pin.

LCD is interfaced to any ports of micro controller, it is used to display the

current status of the GPS and GSM modules, whether data is been reading

from GPS or writing to GSM

Most digital logic circuits and processors need a 5 volt power supply. To use

these parts we need to build a regulated 5 volt source. Usually you start with

an unregulated power To make a 5 volt power supply, we use a LM7805

voltage regulator IC (Inte-grated Circuit)

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3. HARDWARE

For designing this hardware many types of devices are used to make it perfectly

working. All the devices are purchased from different manufacturers. These

components are soldered on a soldering board. The following list of hardware are

required for this system.

BRIDGE RECTIFIER

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3.1.CIRCUIT DIAGRAM

FIG: 3.1 MAIN CIRCUIT DIAGRAM

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3.2. MICROCONTROLLER

When we have to learn about a new computer we have to familiarize about the machine

capability we are using, and we can do it by studying the internal hardware design

(devices architecture), and also to know about the size, number and the size of the

registers.

A microcontroller is a single chip that contains the processor (the CPU), non-volatile

memory for the program (ROM or flash), volatile memory for input and output (RAM), a

clock and an I/O control unit. Also called a "computer on a chip," billions of

microcontroller units (MCUs) are embedded each year in a myriad of products from toys

to appliances to automobiles. For example, a single vehicle can use 70 or more

microcontrollers.

The generic 8051 architecture sports a Harvard architecture, which contains two separate

buses for both program and data. So, it has two distinctive memory spaces of 64K X 8

size for both program and data. It is based on an 8 bit central processing unit with an 8 bit

Accumulator and another 8 bit B register as main processing blocks. Other portions of the

architecture include few 8 bit and 16 bit registers and 8 bit memory locations. Each 8031

device has some amount of data RAM built in the device for internal processing. This

area is used for stack operations and temporary storage of data. This base architecture is

supported with on chip peripheral functions like I/O ports, timers/counters, versatile

serial communication port. So it is clear that this 8051 architecture was designed to cater

many real time embedded needs.

The following list gives the features of the 8051 architecture:

Optimized 8 bit CPU for control applications.

Extensive Boolean processing capabilities.

64K Program Memory address space.

64K Data Memory address space.

128 bytes of on chip Data Memory.

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32 Bi directional and individually addressable I/O lines.

Two 16 bit timer/counters.

Full Duplex UART.

6 source / 5 vectors interrupt structure with priority levels.

On chip clock oscillator.

Now you may be wondering about the non mentioning of memory space meant for the

program storage, the most important part of any embedded controller. Originally this

8031 architecture was introduced with on chip, `one time programmable' version of

Program Memory of size 4K X 8. Intel delivered all these microcontrollers (8051) with

user's program fused inside the device. The memory portion was mapped at the lower end

of the Program Memory area. But, after getting devices, customers couldn't change

anything in their program code, which was already made available inside during device

fabrication. So, very soon Intel introduced the 8031 devices (8751) with reprogrammable

type of Program Memory using built in EPROM of size 4K X 8.Like a regular EPROM,

this memory can be re programmed many times. Later on Intel started manufacturing

these 8031 devices without any on chip Program Memory.

Central Processing Unit

The CPU is the brain of the microcontrollers reading user's programs and executing the

expected task as per instructions stored there in. Its primary elements are an 8 bit

Arithmetic Logic Unit (ALU), Accumulator (Acc), few more 8 bit registers, B register,

Stack Pointer (SP), Program Status Word (PSW) and 16 bit registers, Program Counter

(PC) and Data Pointer Register (DPTR). The ALU (Acc) performs arithmetic and logic

functions on 8 bit input variables. Arithmetic operations include basic addition,

subtraction, multiplication and division. Logical operations are AND, OR, Exclusive OR

as well as rotate, clear, complement and etc. Apart from all the above, ALU is

responsible in conditional branching decisions, and provides a temporary place in data

transfer operations within the device. B register is mainly used in multiply and divide

operations. During execution, B register either keeps one of the two inputs or then retains

a portion of the result. For other instructions, it can be used as another general purpose

register.

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AT89S52

The AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with 8K

bytes of in-system programmable Flash memory. The device is manufactured using

Atmels high-density nonvolatile memory technology and is compatible with the

industry-standard 80C51 instruction set and pin-out. The on-chip Flash allows the

program memory to be reprogrammed in-system or by a conventional nonvolatile

memory programmer. By combining a versatile 8-bit CPU with in-system programmable

Flash on a monolithic chip, the Atmel AT89S52 is a powerful microcontroller which

provides a highly-flexible and cost-effective solution to many embedded control

applications. The AT89S52 provides the following standard features: 8K bytes of Flash,

256 bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers, three 16-bit

timer/counters, a six-vector two-level interrupt architecture, a full duplex serial port, on-

chip oscillator, and clock circuitry. In addition, the AT89S52 is designed with static logic

for operation down to zero frequency and supports two software selectable power saving

modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial

port, and interrupt system to continue functioning. The Power-down mode saves the

RAM con-tents but freezes the oscillator, disabling all other chip functions until the next

interrupt or hardware reset.

FEATURES

Compatible with MCS-51 Products

8K Bytes of In-System Programmable (ISP) Flash Memory Endurance: 10,000

Write/Erase Cycles

4.0V to 5.5V Operating Range

Fully Static Operation: 0 Hz to 33 MHz

Three-level Program Memory Lock

256 x 8-bit Internal RAM

32 Programmable I/O Lines

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Three 16-bit Timer/Counters

Eight Interrupt Sources

Full Duplex UART Serial Channel

Low-power Idle and Power-down Modes

Interrupt Recovery from Power-down Mode

Watchdog Timer

Dual Data Pointer

Power-off Flag

Fast Programming Time

Flexible ISP Programming (Byte and Page Mode) and Green (Pb/Halide-free)

Packaging Option.

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PIN DIAGRAM

FIG 3. 2: PIN DIAGRAM OF AT89S52

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BLOCK DIAGRAM

FIG 3.3 : BLOCK DIAGRAM OF AT89S52

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PIN DESCRIPTION

VCC

Supply Voltage

GND

Ground

Port 0 Port 0 is an 8-bit open drain bidirectional I/O port. As an output port,

each pin can sink eight TTL inputs. When 1s are written to port 0 pins,

the pins can be used as high-impedance inputs. Port 0 can also be

configured to be the multiplexed low-order address/data bus during

accesses to external program and data memory. In this mode, P0 has

internal pull-ups. Port 0 also receives the code bytes during Flash

programming and outputs the code bytes during program verification.

External pull-ups are required during program verification.

Port 1 Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1

output buffers can sink/source four TTL inputs. When 1s are written to

Port 1 pins, they are pulled high by the internal pull-ups and can be used

as inputs. As inputs, Port 1 pins that are externally being pulled low will

source current (IIL) because of the internal pull-ups. In addition, P1.0

and P1.1 can be configured to be the timer/counter 2 external count

input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX),

respectively, as shown in the following table. Port 1 also receives the

low-order address bytes during Flash programming and verification.

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source current (IIL) because of the internal pull-ups. Port 2 emits the

high-order address byte during fetches from external program memory

and during accesses to external data memory that use 16-bit addresses

(MOVX @ DPTR). In this application, Port 2 uses strong internal pull-

ups when emitting 1s. During accesses to external data memory that use

8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2

Special Function Register. Port 2 also receives the high-order address

bits and some control signals during Flash programming and

verification.





source current (IIL) because of the pull-ups. Port 3 receives some

control signals for Flash programming and verification. Port 3 also

serves the functions of various special features of the AT89S52, as

shown in the following table.

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RST Reset input. A high on this pin for two machine cycles while the

oscillator is running resets the device. This pin drives high for 98

oscillator periods after the Watchdog times out. The DISRTO bit in SFR

AUXR (address 8EH) can be used to disable this feature. In the default

state of bit DISRTO, the RESET HIGH out feature is enabled.

ALE/PROG Address Latch Enable (ALE) is an output pulse for latching the low byte

of the address during accesses to external memory. This pin is also the

program pulse input (PROG) during Flash programming. In normal

operation, ALE is emitted at a constant rate of 1/6 the oscillator

frequency and may be used for external timing or clocking purposes.

Note, however, that one ALE pulse is skipped during each access to

external data memory. If desired, ALE operation can be disabled by

setting bit 0 of SFR location 8EH. With the bit set, ALE is active only

during a MOVX or MOVC instruction. Otherwise, the pin is weakly

pulled high. Setting the ALE-disable bit has no effect if the

microcontroller is in external execution mode.

PSEN Program Store Enable (PSEN) is the read strobe to external program

memory. When the AT89S52 is executing code from external program

memory, PSEN is activated twice each machine cycle, except that two

PSEN activations are skipped during each access to external data

memory.

EA/VPP External Access Enable. EA must be strapped to GND in order to enable

the device to fetch code from external program memory locations

starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is

programmed, EA will be internally latched on reset. EA should be

strapped to VCC for internal program executions. This pin also receives

the 12-volt programming enable voltage (VPP) during Flash

programming.

XTAL1 Input to the inverting oscillator amplifier and input to the internal clock

operating circuit.

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XTAL2 Output from the inverting oscillator amplifier.

MEMORY ORGANIZATION

MCS-51 devices have a separate address space for Program and Data Memory. Up to

64K bytes each of external Program and Data Memory can be addressed.

PROGRAM MEMORY

If the EA pin is connected to GND, all program fetches are directed to external

memory. On the AT89S52, if EA is connected to VCC, program fetches to addresses

0000H through 1FFFH are directed to internal memory and fetches to addresses 2000H

through FFFFH are to external memory.

DATA MEMORY

The AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a

parallel address space to the Special Function Registers. This means that the upper 128

bytes have the same addresses as the SFR space but are physically separate from SFR

space. When an instruction accesses an internal location above address 7FH, the address

mode used in the instruction specifies whether the CPU accesses the upper 128 bytes of

RAM or the SFR space. Instructions which use direct addressing access the SFR space.

For example, the following direct addressing instruction accesses the SFR at location

0A0H (which is P2).

MOV 0A0H, #data

Instructions that use indirect addressing access the upper 128 bytes of RAM. For

example, the following indirect addressing instruction, where R0 contains 0A0H,

accesses the data byte at address 0A0H, rather than P2 (whose address is 0A0H).

MOV @R0, #data

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Note that stack operations are examples of indirect addressing, so the upper 128 bytes of

data RAM are available as stack space.

WATCHDOG TIMER (ONE-TIME ENABLED WITH RESET-OUT)

The WDT is intended as a recovery method in situations where the CPU may be

subjected to software upsets. The WDT consists of a 14-bit counter and the Watchdog

Timer Reset (WDTRST) SFR. The WDT is defaulted to disable from exiting reset. To

enable the WDT, a user must write 01EH and 0E1H in sequence to the WDTRST register

(SFR location 0A6H). When the WDT is enabled, it will increment every machine cycle

while the oscillator is running. The WDT timeout period is dependent on the external

clock frequency. There is no way to disable the WDT except through reset (either

hardware reset or WDT overflow reset). When WDT over-flows, it will drive an output

RESET HIGH pulse at the RST pin.

USING THE WDT

To enable the WDT, a user must write 01EH and 0E1H in sequence to the WDTRST

register (SFR location 0A6H). When the WDT is enabled, the user needs to service it by

writing 01EH and 0E1H to WDTRST to avoid a WDT overflow. The 14-bit counter

overflows when it reaches 16383 (3FFFH), and this will reset the device. When the WDT

is enabled, it will increment every machine cycle while the oscillator is running. This

means the user must reset the WDT at least every 16383 machine cycles. To reset the

WDT the user must write 01EH and 0E1H to WDTRST. WDTRST is a write-only

register. The WDT counter cannot be read or written. When WDT overflows, it will

generate an output RESET pulse at the RST pin. The RESET pulse duration is 98xTOSC,

where TOSC = 1/FOSC. To make the best use of the WDT, it should be serviced in those

sections of code that will periodically be executed within the time required to prevent a

WDT reset.

WDT DURING POWER-DOWN AND IDLE

In Power-down mode the oscillator stops, which means the WDT also stops. While in

Power-down mode, the user does not need to service the WDT. There are two methods of

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exiting Power-down mode: by a hardware reset or via a level-activated external interrupt

which is enabled prior to entering Power-down mode. When Power-down is exited with

hardware reset, servicing the WDT should occur as it normally does whenever the

AT89S52 is reset. Exiting Power-down with an interrupt is significantly different. The

interrupt is held low long enough for the oscillator to stabilize. When the interrupt is

brought high, the interrupt is serviced. To prevent the WDT from resetting the device

while the interrupt pin is held low, the WDT is not started until the interrupt is pulled

high. It is suggested that the WDT be reset during the interrupt service for the interrupt

used to exit Power-down mode. To ensure that the WDT does not overflow within a few

states of exiting Power-down, it is best to reset the WDT just before entering Power-

down mode. Before going into the IDLE mode, the WDIDLE bit in SFRAUXR is used to

determine whether the WDT continues to count if enabled. The WDT keeps counting

during IDLE (WDIDLE bit = 0) as the default state. To prevent the WDT from resetting

the AT89S52 while in IDLE mode, the user should always set up a timer that will

periodically exit IDLE, service the WDT, and reenter IDLE mode. With WDIDLE bit

enabled, the WDT will stop to count in IDLE mode and resumes the count upon exit from

IDLE.

UART

The UART in the AT89S52 operates the same way as the UART in the AT89C51 and

AT89C52.

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3.3 GPS MODULE WITH PATCH ANTENNA

FIG:3.4 .GPS MODULE

This is a third generation POT (Patch Antenna On Top) GPS module. This POT

GPS receiver providing a solution that high position and speed accuracy performances as

well as high sensitivity and tracking capabilities in urban conditions & provides standard

NMEA0183 strings in raw mode for any microcontroller. The module provides current

time, date, latitude, longitude, speed, altitude and travel direction / heading among other

data, and can be used in a host of applications, including navigation, tracking systems,

fleet management, mapping and robotics.

This is a standalone GPS Module and requires no external components except

power supply decoupling capacitors. It is built with internal RTC Back up battery. It can

be directly connected to Microcontroller's USART. The module is having option for

connecting external active antenna if necessary.

The GPS chipsets inside the module are designed by MediaTek Inc., which is the

world's leading digital media solution provider and largest fab-less IC company in

Taiwan. The module can support up to 51 channels. The GPS solution enables small form

factor devices. They deliver major advancements in GPS performances, accuracy,

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integration, computing power and flexibility. They are designed to simplify the

embedded system integration process.

3.3.1. SPECIFICATIONS:

Supply: 3.3V, 45mA

Chipset: MTK MT3318

Antenna: High gain GPS patch antenna from Cirocomm

Data output: CMOS UART interface at 3.3V

Protocol: NMEA-0183@9600bps (Default) at update rate of 1 second.

Protocol message support: GGA, GSA, RMC, VTG

No. of Satellite simultaneously tracked: 51

Tracking Sensitivity: On-module antenna : -157 dBm

Position Accuracy :

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3.4 SIM300 GSM MODULE

FIG:3.5 GSM MODULE

This is a plug and play GSM Modem with a simple to interface serial interface.

Use it to send SMS, make and receive calls, and do other GSM operations by controlling

it through simple AT commands from micro controllers and computers. It uses the highly

popular SIM300 module for all its operations. It comes with a standard RS232 interface

which can be used to easily interface the modem to micro controllers and computers.

The modem consists of all the required external circuitry required to start

experimenting with the SIM300 module like the power regulation, external antenna, SIM

Holder.

Features

Uses the extremely popular SIM300 GSM module

Provides the industry standard serial RS232 interface for easy connection to

computers and other devices

Provides serial TTL interface for easy and direct interface to microcontrollers

Power, RING and Network LEDs for easy debugging

Onboard 3V Lithium Battery holder with appropriate circuitry for providing

backup for the modules internal RTC

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Can be used for GSM based Voice communications, Data/Fax, SMS,GPRS and

TCP/IP stack

Can be controlled through standard AT commands

Modules operation mode can be controlled through the PWR Switch connected

to the PWR pin (refer the SIM300 datasheet for more information)

Comes with an onboard wire antenna for better reception. Board provides an

option for adding an external antenna through an SMA connector

The SIM300 allows an adjustable serial baud rate from 1200 to 115200 bps (9600

default)

Modem a low power consumption of 0.25 A during normal operations and around

1 A during transmission

Operating Voltage: 7 15V AC or DC (board has onboard rectifier)

Note: The modem consumes current of nearly 1A during transmission; please make sure

that your power supply can handle such currents.

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3.5 RS232 COMMUNICATION

FIG: 3.6 SCHEMENTIC DESCRIPTION

RS232:

In communications, RS-232 is a standard for serial binary data interconnection

between a DTE (Data terminal equipment) and a DCE (Data Circuit-terminating

Equipment). It is commonly used in computer serial ports.

Scope of the Standard:

The Electronic Industries Alliance (EIA) standard RS-232-C [3] as of 1969 defines:

Electrical signal characteristics such as voltage levels, signaling rate, timing and

slew-rate of signals, voltage withstand level, short-circuit behavior, maximum

stray capacitance and cable length

Interface mechanical characteristics, pluggable connectors and pin identification

Functions of each circuit in the interface connector

Standard subsets of interface circuits for selected telecom applications

The standard does not define such elements as character encoding (for example,

ASCII, Baud rate or EBCDIC), or the framing of characters in the data stream (bits per

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character, start/stop bits, parity). The standard does not define protocols for error

detection or algorithms for data compression.

The standard does not define bit rates for transmission, although the standard says it

is intended for bit rates lower than 20,000 bits per second. Many modern devices can

exceed this speed (38,400 and 57,600 bit/s being common, and 115,200 and 230,400 bit/s

making occasional appearances) while still using RS-232 compatible signal levels.

Details of character format and transmission bit rate are controlled by the serial port

hardware, often a single integrated circuit called a UART that converts data from parallel

to serial form. A typical serial port includes specialized driver and receiver integrated

circuits to convert between internal logic levels and RS-232 compatible signal levels.

Circuit working Description:

In this circuit the MAX 232 IC used as level logic converter. The MAX232 is a

dual driver/receiver that includes a capacitive voltage generator to supply EIA 232

voltage levels from a single 5v supply. Each receiver converts EIA-232 to 5v

TTL/CMOS levels. Each driver converts TLL/CMOS input levels into EIA-232 levels.

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In this circuit the microcontroller transmitter pin is connected in the MAX232

T2IN pin which converts input 5v TTL/CMOS level to RS232 level. Then T2OUT pin is

connected to reviver pin of 9 pin D type serial connector which is directly connected to

PC.

In PC the transmitting data is given to R2IN of MAX232 through transmitting pin

of 9 pin D type connector which converts the RS232 level to 5v TTL/CMOS level. The

R2OUT pin is connected to receiver pin of the microcontroller. Likewise the data is

transmitted and received between the microcontroller and PC or other device vice versa.

PCB LAYOUT:

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3.6. SHOCK SENSOR

The sensor used to detect accident is shock sensor. This is single stage shock sensor,it

detects any hard impact acted on it . The output from sensor after impact will be +5v and

connected to INT (pin 12) of processor. These sensors are fixed on all sides of the car to

detect impact occurred on it. These outputs from sensors is send into OR gate to detect at

least one impact.

FIG: 3.7 SHOCK SENSOR

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3.6.1. Schematic Diagram:

FIG 3.8 SCHEMATIC DIAGRAM

Schematic Description:

Vibration circuit is used to sense the mechanical vibration. This circuit is

constructed with

1. Piezo electric plate.

2. Operational amplifier

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3. 555 IC timer

Piezo electric plate is the special type of sensor which is used to sense the

mechanical vibration. Piezo electric plate converts the mechanical vibration to electrical

signal. The converted electrical signal is in the range of small milli voltage signal.

Then the electrical signal voltage is given to amplifier unit through 0.1uf

capacitor in order to filter the noise signal. The amplifier circuit is constructed with

operational amplifier LM1458. The amplified output is in the form of AC signal the

diode is used to rectify the negative signal.

The rectified signal is given to comparator. The comparator circuit is constructed

with LM1458 operational amplifier in which the signal is given to inverting input

terminal. The reference voltage is given to non inverting input terminal. It converts the

input signal to +12V to -12V square pulse.

The square pulse is given to base of BC 547 transistor whenever the positive side

of square pulse is come the transistor conducts emitter and collector side is short circuited

because the transistor is act as switch. The collector side is connected to trigger terminal

of the 555 IC. When the transistor is conducted negative signal is given to trigger

terminal because the emitter is connected to ground side.

Now the 555 IC conducts and generates the square pulse. The frequency of the

square pulse is depends upon the resistor and capacitor connected in between 7th

(discharge) and 6th (threshold) terminal.

The square pulse is given to base of the Q2 transistor. The transistor is turn ON

and turn OFF depends upon the square pulse. The Q2 transistor output is 0 to 5V pulse.

Whenever the Piezo electric plate sense the vibration the Q2 transistor outputs the 0 to

5V pulse. This pulse is given to microcontroller or other related circuit to inform that

vibration has been occurred.

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3.6.2 Application:

Piezoelectric sensors have proven to be versatile tools for the measurement of

various processes. They are used for quality assurance, process control and process

development in many different industries.

Piezo electric sensors are also seen in nature. Bones act as force sensors. Once

loaded, bones produce charges proportional to the resulting internal torsion or

displacement. Those charges stimulate and drive the build up of new bone material. This

leads to the strengthening of structures where the internal displacements are the greatest.

With time, this causes weaker structures to increase their strength and stability as material

is laid down proportional to the forces affecting the bone.

PCB LAYOUT:

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3.7 LIQUID CRYSTAL DISPLAY

Liquid crystal display (LCD) has material which combines the properties of both

liquid and crystals. They have a temperature range within which the molecules are almost

as mobile as they would be in a liquid, but are grouped together in an order form similar

to a crystal.

First thing to begin with is to know what LCD driver/controller is used in

LCD.Yes, your LCD is dumb it does not know to talk with your microcontroller. LCD

driver is a link between the microcontroller and LCD. You can refer the datasheet of

LCD to know the LCD driver for e.g. JHD 162A is name of LCD having driver

HD44780U.You have to interface the LCD according to the driver specification. To

understand the algorithm of LCD interfacing user must have datasheet of both LCD and

LCD driver. Many people ignore the datasheets and end up in troubles. If you want to

interface LCD successfully you must have datasheets.

Figure3.9. LCD Module

More microcontroller devices are using 'smart LCD' displays to output visual

information. The following discussion covers the connection of a Hitachi LCD display to

a PIC microcontroller. LCD displays designed around Hitachi's LCD HD44780 module,

are inexpensive, easy to use, and it is even possible to produce a readout using the 8 x 80

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pixels of the display. Hitachi LCD displays have a standard ASCII set of characters plus

Japanese, Greek and mathematical symbols.

3.7.1. Hardware Diagram

16 x 2 Char LCD

R1

R2

GND

Vcc

Vf RS RW EN

D0 D7

A K D0

D7

ACK

Figure 3.10 LCD pin configuration

For an 8-bit data bus, the display requires a +5V supply plus 11 I/O lines. For a 4-

bit data bus it only requires the supply lines plus seven extra lines. When the LCD

display is not enabled, data lines are tri-state which means they are in a state of high

impedance (as though they are disconnected) and this means they do not interfere with

the operation of the microcontroller when the display is not being addressed. The LCD

also requires 3 "control" lines from the microcontroller.

When the LCD is initialized, it is ready to continue receiving data or instructions.

If it receives a character, it will write it on the display and move the cursor one space to

the right. The Cursor marks the next location where a character will be written. When we

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want to write a string of characters, first we need to set up the starting address, and then

send one character at a time.

3.7.2. Pins description

Table 3.1 LCD Pin Description

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3.7.3 Logic status on control lines

3.7.3.1. RS (Command / Data):

This bit is to specify weather received byte is command or data. So that LCD can

recognize the operation to be performed based on the bit status.

RS = 0 => Command

RS = 1 => Data

3.7.3.2. RW (Read / Write)

RW bit is to specify weather controller wants READ from LCD or WRITE to

LCD. The READ operation here is just ACK bit to know weather LCD is free or not.

RW = 0 => Write

RW = 1 => Read

3.7.3.3. EN (Enable LCD)

EN bit is to ENABLE or DISABLE the LCD. When ever controller wants to write

some thing into LCD or READ acknowledgment from LCD it needs to enable the LCD.

EN = 0 => High Impedance

EN = 1 => Low Impedance

3.7.3.4. ACK (LCD Ready)

ACK bit is to acknowledge the MCU that LCD is free so that it can send new

command or data to be stored in its internal Ram locations.

ACK = 1 => Not ACK

ACK = 0 => ACK

Reading data from the LCD is done in the same way, but control line R/W has to be high.

When we send a high to the LCD, it will reset and wait for instructions. Typical

instructions sent to LCD display after a reset are: turning on a display, turning on a cursor

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and writing characters from left to right. Characters that can be shown on the display are

stored in data display (DD) RAM. The size of DDRAM is 80 bytes.

Before we access DD RAM after defining a special character, the program must

set the DD RAM address. Writing and reading data from any LCD memory is done from

the last address which was set up using set-address instruction. Once the address of DD

RAM is set, a new written character will be displayed at the appropriate place on the

screen. Until now we discussed the operation of writing and reading to an LCD as if it

were an ordinary memory. But this is not so. The LCD controller needs 40 to 120

microseconds (uS) for writing and reading. Other operations can take up to 5 mS. During

that time, the microcontroller can not access the LCD, so a program needs to know when

the LCD is busy. We can solve this in two ways.One way is to check the BUSY bit found

on data line D7. This is not the best method because LCD's can get stuck, and program

will then stay forever in a loop checking the BUSY bit. The other way is to introduce a

delay in the program. The delay has to be long enough for the LCD to finish the operation

in process.

At the beginning we mentioned that we needed 11 I/O lines to communicate with an

LCD. However, we can communicate with an LCD through a 4-bit data bus. Thus we can

reduce the total number of communication lines to seven.

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3.8. Power Supply

3.8.1. Block Diagram

FIG 3.11 : BLOCK DIAGRAM OF POWER SUPPLY

The ac voltage, typically 220V rms, is connected to a transformer, which steps that ac

voltage down to the level of the desired dc output. A diode rectifier then provides a full-

wave rectified voltage that is initially filtered by a simple capacitor filter to produce a dc

voltage. This resulting dc voltage usually has some ripple or ac voltage variation. A

regulator circuit removes the ripples and also remains the same dc value even if the input

dc voltage varies. This voltage regulation is usually obtained using one of the popular

voltage regulator IC units.

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3.8.2. Schematic Diagram

FIG 3.12: SCHEMATIC DIAGRAM OF POER SUPPLY

3.8.3. Working Principle

3.8.3.1. Transformer

The potential transformer will step down the power supply voltage (0-230V) to (0-15V

and 0-9V) a level. If the secondary has less turns in the coil then the primary, the

secondary coil's voltage will decrease and the current or AMPS will increase or decreased

depend upon the wire gauge. This is called a STEP-DOWN transformer. Then the

secondary of the potential transformer will be connected to the rectifier.

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3.8.3.2. Bridge Rectifier

When four diodes are connected as shown in figure, the circuit is called as bridge

rectifier. The input to the circuit is applied to the diagonally opposite corners of the

network, and the output is taken from the remaining two corners.

Let us assume that the transformer is working properly and there is a

positive potential, at point A and a negative potential at point B. the positive potential at

point A will forward bias D3 and reverse bias D4.

The negative potential at point B will forward bias D1

and reverse D2. At this time D3 and D1 are forward

biased and will allow current flow to pass through them;

D4 and D2 are reverse biased and will block current flow.

The path for current flow is from point B through D1, up

through Load, through D3, through the secondary of

the transformer back to point B.

One-half cycle later the polarity across the secondary of the transformer reverse, forward

biasing D2 and D4 and reverse biasing D1 and D3. Current flow will now be from point

A through D4, up through Load, through D2, through the secondary of transformer, and

back to point A. Across D2 and D4. The current flow through Load is always in the same

direction. In flowing through Load this current develops a voltage corresponding to that.

Since current flows through the load during both half cycles of the applied voltage, this

bridge rectifier is a full-wave rectifier.

One advantage of a bridge rectifier over a conventional full-wave rectifier

is that with a given transformer the bridge rectifier produces a voltage output that is

nearly twice that of the conventional half-wave circuit.

This bridge rectifier always drops 1.4Volt of the input voltage because of the diode. We

are using 1N4007 PN junction diode, its cut off region is 0.7Volt. So any two diodes are

always conducting, total drop voltage is 1.4 volt.

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3.8.3.3. Filter

If a Capacitor is added in

parallel with the load resistor

of a Rectifier to form a

simple Filter Circuit, the

output of the Rectifier will

be transformed into a more

stable DC Voltage. At first,

the capacitor is charged to

the peak value of the rectified Waveform. Beyond the peak, the capacitor is discharged

through the load until the time at which the rectified voltage exceeds the capacitor

voltage. Then the capacitor is charged again and the process repeats itself.

3.8.3.4. IC Regulators

Voltage regulators comprise a class of widely used ICs. Regulator IC units contain the

circuitry for reference source, comparator amplifier, control device, and overload

protection all in a single IC. IC units provide regulation of either a fixed positive voltage,

a fixed negative voltage, or an adjustably set voltage.

A fixed three-terminal voltage regulator has an unregulated dc input voltage, it is applied

to one input terminal, a regulated dc output voltage from a third terminal, with the second

terminal connected to ground.

The series 78 regulators provide fixed positive regulated voltages from 5

to 24 volts. Similarly, the series 79 regulators provide fixed negative regulated voltages

from 5 to 24 volts.

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This is a regulated power supply circuit using the 78xx IC series. These

regulators can deliver current around 1A to 1.5A at a fix voltage levels. The common

regulated voltages are 5V, 6V, 8V, 9V, 10V, 12V, 15V, 18V, and 24V. It is important to

add capacitors across the input and output of the regulator IC to improve the regulation.

In this circuit we are using 7805 and 7812 regulator so it converts variable

dc into constant positive 5V and 12V power supply respectively.

3.8.3.5.PCB Layout

FIG 3.13 : PCB LAYOUT

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3.8.3.6.PIN Description

1) Input

2) Ground

3) Output

3.8.3.7. Types of positive voltage regulators

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4. APPLICATIONS

Commercial fleet operators are by far the largest users of vehicle tracking systems.

These systems are used for operational functions such as routing, security, dispatch

and collecting on-board information.

These are also used for fire detector in large vehicles like train, bus etc. because the

vehicle like train contains large number of people and the sending alert of fire

accident can save many lives.

The applications for this project are in military, navigation, automobiles, aircrafts,

fleet management, remote monitoring, remote control, security systems, tele

services, etc.

Fleet monitoring

Vehicle scheduling

Route monitoring

Driver monitoring

Accident analysis

Geo-fencing geo-coding

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5. CONCLUSIONS

Vehicle tracking system makes better fleet management and which in turn brings

large profits. Better scheduling or route planning can enable you handle larger jobs

loads within a particular time. Vehicle tracking both in case of personal as well as

business purpose improves safety and security, communication medium,

performance monitoring and increases productivity. So in the coming year, it is

going to play a major role in our day-to-day living.

Main motto of the accident alert system project is to decrease the chances of losing

life in such accident which we cant stop from occurring. Whenever accident is

alerted the paramedics are reached to the particular location to increase the chances

of life. This device invention is much more useful for the accidents occurred in

deserted places and midnights. This vehicle tracking and accident alert feature plays

much more important role in day to day life in future

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6. REFERENCES

1. R.S GAONKAR Microprocessor architecture programming Application

WILEY EASTERN LTD, NEWDELHI

2. KRISHNA KANT Microprocessor and microcontroller EASTERN

COMPANY EDITION NEW DELHI 2007

3. DANIEL .W.LEWIS Fundamental of embedded software prentice Hall of

India, 2004

4. WILLIAM STALLING Wireless communication and Networks, 2nd

edition, 2005 prentice hall of India

accident zone detection

Documents

vehicle tracking systems

vehicle tracking features

vehicle movement

accident deaths

accident alert systems

accident alert system

particular accident

location data