A Unified Understanding of the Many Forms ofOptical Code Division Multiplexing

Eli YablonovitchRick Wesel

Bahram JalaliMing Wu

Ingrid Verbauwhede

Can FPGA’s + Modulator/PhotoDetector ArrayMimic any form of OCDMA?

PrincetonUSC

Matched Filtering in Time Domain (non-coherent)

UC DavisTelcordia

Purdue Univ.

Matched Filtering in the Spectral Domain (coherent)

Block Diagram

DW

DM

DE

MU

X

Photodetectors FPGADataFrom

Network

Vo

ltag

eTime

ThresholdLevel(validdata)

Mu

lti-wave

leng

thL

aser So

urce

Wav

elen

gth

Time

Wav

elen

gth

Time DW

DM

MU

XTo Network

Transmitter

Receiver

Wav

elen

gth

Modulators

FPGAData

Code

Time

PLL

Switch Matrix

Delay Module

Code Generator

System clock

LVD

S O

utput

LVD

S Input

Protocol

Input clock

Input data

Output clock

Output data

LVDS: Low Voltage Differential Signaling

PLL: Phase-Locked Loop

FPGA Encryption

Therefore FPGA’s + Modulator/PhotoDetector Array can easily duplicate the performance of Matched

Filtering in Time Domain (non-coherent)

Therefore Princeton scheme andUSC scheme can

be emulated by our FPGA approach

thresholddetector

Spectral P

hase Decoder

Wavelength M

UX

Wavelength M

UX

Data

Fre

quen

cy

timet

Photo-receiverarray

Buffer

Dela

y

Sum

Data

FPGA

time

Fre

quen

cy

t

Equivalence Between Spectral Phase Encoding And Time Sequential Encoding:

(a) Sequential brief individual pulses, have a broad spectrum as indicated by the colors. The plus and minus signs in (a) indicate various phase shifts induced on the spectral components of one pulse. The phase shifts can be decoded by a matched filter, producing a single big pulse that can be monitored by a threshold detector.

(b) With no loss of generality, the pulses can be spectrally filtered, and each spectral component sent to a phase sensitive photo-receiver. The retrieved information can be stored and processed in a Field Programmable Gate Array, which is fully equivalent to direct-sequence radio CDMA.

(a)

(b)

Figure 1: Coherent detection without a local oscillator. The ring is a carrier add/drop separation filter.

sidebands + carrier

sidebands

sidebands

carrier

carrier

opticalelectrical

+

Figure 4: Tandem single side band receiver, not requiring a local oscillator, avoids duplicate side-bands.

180hybrid

coupler

carrieradd/drop

EDFA

opticalelectrical

sidebands

carrier

carrier2

+ +

in-phasesignal

quadraturesignal

sidebands

cos2(t) code2(t)signal(t)=

(1/2)signal(t)

1

-1time

chip time

local codegenerator

code(t)

Transmittercarrier wave

cos(t)

cos(t) code(t) signal(t)code(t) signal(t)code(t)

signal(t)

Receiverlocal

oscillatorcos(t)

local oscillatorcos(t)

cos(t) code(t) signal(t)

cos2(t) code(t)signal(t)

time

time

mixer

mixermixer

mixer

A Direct Sequence radio CDMA system imposes random phase shifts  +1 or –1 on the signals in much the same way as the channelized optical spectral phase decoder/encoder, described in a previous vugraph.

Direct Sequence Spread Spectrum:

Therefore FPGA’s + Modulator/PhotoDetector Array can do Spectral Phase Encoding if Coherent detectors

are used

Therefore UC Davis scheme andTelcordia scheme and

Purdue scheme can be emulated by

our FPGA approach

freq

uenc

y

ttime

freq

uenc

y

time t

chip time

channel 1

channel 2

freq

uenc

y

ttime

time between pulses

The different approaches are all equivalent since, the frequency  time rectangular cell changes shape, but its area is preserved, in accordance with the “Uncertainty Principle”.

Conventional Wavelength/Time matrix. Frequency and time are treated on an equal footing.

Spectral Phase Encoding. Each color of each pulse will be coded with a different phase shift, producing narrow slicing of the spectrum, but relatively long periods between pulses.

Direct-Sequence Time-Domain Spread-Spectrum CDMA. Each channel occupies a broad frequency spectrum corresponding to the inverse of the chip time.

Successive Decoding

• We can decode the first user by treating others as noise, then the first user’s ones become erasures for the other users. Proceed in this way until finish decoding all the users.

• This is called successive decoding. For binary OR channel, this process does not lose capacity as compared to joint decoding.

Successive Decoding: The Z-Channel • Successive decoding for n users:

– User with lowest rate is decoded first– Other users are treated as noise– The decoded data of the first user is used in the

decoding of the remaining users

• First user sees a “Z-channel”

• Where i = 1-(1-p)n-i is the probability that at least one of the n-i remaining users transmits a 1

1

11 0x

1x

0y

1y

Simple codes

• In order to have a hardware demo working for the May meeting, some very simple codes were produced.

• This demo consists of two transmitter and two receivers

• Both receivers decode the information independently

Simple Codes for Demo• Short codes have been designed for a

simple demo for 2 users• These were chosen to be as simple to

encode and decode as possible • Each bit is encoded separately• Bit synchronism is assumed, blocked

asynchronism is allowed• Coordination is required• These codes are error free

Simple codes for Demo (2)

Receiver 1 looks for position of 0 (which always exists)

If 1 or 2, decide 1

If 3 or 4, decide 0

Source 1

1 2 3 4

0

1

Rate 1/4

Source 2

1 2 3 4 5 6

1

0Rate 1/6

0

1

Receiver 2 looks forFIRST position of 0.If 1, 3 or 5, decide 1If 2, 4 or 6, decide 0

Worst Case :

block i block i+1

Sum Rate 5/12

FPGA Setup for initial successive decoding Demo

DataGenerator

Encoder

FPGA

Modulator

CWLaser

DataGenerator

Encoder

FPGA

Modulator

CWLaser

WavelengthCoupler

Photodetector

Bit ErrorRate Tester

Decoder

FPGA

Photodetector

Bit ErrorRate Tester

Decoder

FPGA

Transmitter 1

Transmitter 2

Receiver 1

Receiver 2