IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 51, NO. 3, JUNE 2004 921

A High Performance Reconfigurable HardwarePlatform for Digital Pulse Processing

João M. Cardoso, J. Basílio Simões, Carlos M. B. A. Correia, A. Combo, R. Pereira, J. Sousa, N. Cruz, P. Carvalho,and C. A. F. Varandas

Abstract—This paper presents a new reconfigurable hardwareplatform which uses both digital signal processors (DSP) andfield programmable gate arrays (FPGA) to attain high resolutionand real-time processing in nuclear spectrometry experiments.The module was designed in order to provide a high digital pulseprocessing (DPP) yield with the capacity of being reconfigurableaccording to the experimental conditions and the desired dataoutput. This allows unprecedented real time processing capabil-ities implemented in the FPGA such as pulse pileup correctionthrough adaptive filtering and effective signal-to-noise ratio(SNR) control and optimization. The module uses a Virtex-II ProFPGA (Xilinx) and a DSP from the TMS320C64xx family (TexasInstruments) and is implemented on a PCI board to be used ina host workstation. Special emphasis is given to the scalability ofthe module along with the potential capacity of being used as aportable stand-alone instrument. This reconfigurable hardwareplatform allows us to simultaneously benefit from the advantagesof the hardware based digital spectrometers, namely, their highthroughput, and of the flexibility of the software based configura-tions. Besides, this same platform can be used as a general purposehigh-speed data acquisition and processing unit.

Index Terms—Data acquisition, digital nuclear spectrometry,digital pulse processing (DPP), hardware reconfigurable systems,real-time systems.

I. INTRODUCTION

T RADITIONAL spectrometry systems were based onanalog modules used to determine a limited number of

parameters from a single or a set of detectors. For over 40 yearsthis has been almost the only technically feasible solution,playing an important role in a number of scientific, industrial,and medical applications and therefore nearly becoming astandard architecture. In spite of this, the dependency on afew intrinsic limitations in this kind of technological approach(pulse pileup rejection, ballistic deficit spectral distortions,

Manuscript received November 22, 2003; revised February 18, 2004. Thiswork was carried out in the Electronics and Instrumentation Center (Unit732/02) of the Physics Department, University of Coimbra. The work on theacquisition and processing module has been carried out within the framework ofthe Contract of Association between the European Atomic Energy Communityand Instituto Superior Técnico. This work was also supported by Fundaçãopara a Ciência e a Tecnologia under Project CERN/P/FIS/40114/2000 and bythe Operational Program Science, Technology and Innovation of EuropeanCommunity 3rd Frame Program.

J. M. Cardoso, J. B. Simões, and C. M. B. A. Correia are with the Electronicsand Instrumentation Center, Physics Department, University of Coimbra,3004-516 Coimbra, Portugal (e-mail: cardoso@lei.fis.uc.pt; jbasilio@lei.fis.uc.pt).

A. Combo, R. Pereira, J. Sousa, N. Cruz, P. Carvalho, and C. A. F. Varandasare with the Associação Euratom/IST, Centro de Fusão Nuclear, Instituto Supe-rior Técnico, 1049-001 Lisboa, Portugal.

Digital Object Identifier 10.1109/TNS.2004.829484

incomplete charge collection nonlinearities, etc.) were respon-sible for both its lack of versatility to be applied in newerapplications and cumbersome, and often expensive, solutionsto overcome some of those resolution limitations.

The advent of fast digitizing modules (Flash ADCs) associ-ated with dedicated processing units (DSPs) allowed the appear-ance in the early 1990s of a series of possible alternative archi-tectures to overcome the described limitations. In some way, allthese new solutions tended to bring the digital domain to the de-tector and preamplifier realm and thus dramatically increasingthe overall versatility and broaden even more the applicationsrange. From the hybrid analog–digital processing system thattried to combine the best of both worlds [1], to the high-speedmultiprocessing digital system based on a scalable master–slavearchitecture [2], all increasingly more digitally driven spectrom-eters, allowed the softening of limitations of the traditional mod-ules with several and important additional advantages. In fact,all the pulse validation, processing, and selective storing couldbe digitally made with these systems.

The introduction of digital pulse processing (DPP) techniquesstarted to show that optimal filtering regarding the signal-to-noise ratio (SNR) was achievable, as well as the amplitude cor-rection of some front-end limitations like the incomplete chargecollection and the ballistic deficit [3]. On the other hand, themajor drawback of these systems was the maximum achiev-able throughput since the amount of data to process by digitalmeans was significantly increased. The solutions to overcomethis throughput limitation used fast processing modules such asfield programmable gate arrays (FPGAs) to implement the mostcumbersome and time consuming algorithms used during thepulse processing [4]. The result was a series of prototypes inter-esting enough to spark the attention of some companies leadingto a few commercial products [5]–[7].

However, a series of limitations still remains in this digitalspectrometers: i) weighting functions are somehow standardin the way that the same functions are used regardless of thephysical conditions present in the experimental apparatus beingtherefore far from optimal, ii) pulse pileup events are still ne-glected thus reducing count rate efficiency or ignoring possibleevents correlations, iii) achievable throughput is still away fromthe theoretically maximum possible with these systems, i.e.,the full digitizing of the data stream and, therefore, the zerodead time limit.

In order to overcome these limitations in the DPP systems, ahigh performance reconfigurable platform is presented and dis-cussed in this paper. It was originally designed to operate in neu-tron spectrometry experiments as a fast and flexible transient

0018-9499/04$20.00 © 2004 IEEE

922 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 51, NO. 3, JUNE 2004

Fig. 1. Architecture overview of the high performance reconfigurable hardware platform (combined FPGA-DSP) in comparison with the complexity of amultiprocessing and scalable architecture used for DPP (scheme partially adapted from [2]).

recorder [8]. However, it can also be used as a more generalpurpose acquisition and processing platform. Due to its recon-figurable nature it can be tailored to other applications wherehigh speed data acquisition and processing is required.

This paper starts by presenting the architecture overview ofthe module (Section II) followed by a more in-depth descrip-tion where some technological aspects are presented and archi-tecture decisions are justified (Section III). Finally, a series ofimportant applications in the atomic and nuclear spectrometryscope is presented, showing the versatility of this kind of highspeed acquisition modules (Section IV).

II. ARCHITECTURE

The basic architectural structure of this platform (Fig. 1) isbased on an ultra-fast data acquisition and transient recordermodule developed for experimental nuclear fusion purposes [8].However, this architecture possesses important common pointswith the core architecture of a digital spectrometer and with theones implemented in previously developed DPP systems [2] yetwith some significant differences.

It is divided into three main blocks: acquisition, processingand control, and user/host interface. An overview of the modulestructure is presented in the next subsections.

A. Acquisition Block

This block is based on one (or more) fast acquisitionchannel(s) consisting of a 200 MSPS, 8-bit Flash ADC fol-

lowed by a FIFO or a set of interleaved FIFOs according to therequired digitizing speed. Included in this block is a triggerand pulse locator (TPL) unit that alerts the processing block ofthe occurrence of new pulses, giving their exact location in theFIFOs. This unit is also able to signal the occurrence of eventswhich may contain piledup pulses. In this way, the processingblock can process this events with a proper algorithm thusavoiding its rejection. The acquired data is delivered to theprocessing unit that validates, processes, and stores the results.Also included in this block is a predigitizer filtering and asignal conditioning unit that can be used for dynamic rangeadjustment.

B. Processing and Control Block

The main purpose of this block is to perform all the data pro-cessing required by the specific application as well as to gen-erate the proper control signals. Periodic analysis of the inputsignal (determining its noise contents and characteristics, eventrate, etc.) is performed in order to find and update the processingparameters stored in the FPGA.

In this block we made simultaneous use of two high speedcomponents: an FPGA and a digital signal processor (DSP).These components have complementary characteristics that as-sume an important role in our architecture.

The FPGA is used in order to achieve the highest performancepossible when working with fixed point arithmetics on paral-lelizable algorithms. Along with this, it possesses an intrinsicreconfigurability and an enormous capability of interfacing.

CARDOSO et al.: A HIGH PERFORMANCE RECONFIGURABLE HARDWARE PLATFORM FOR DIGITAL PULSE PROCESSING 923

Fig. 2. Schematic DPP of the reconfigurable hardware platform. Digitized data is fed to the FPGA which determines the rise edge of new occurring pulses (y )and calculates its amplitude through the a digital filter that reproduces the numerical convolution S (t) with a proper predetermined weighting function W (t).The results are passed on to the DSP that builds the histograms and communicates with the host PC for user interface.

The FPGA used in this module belongs to the Virtex-IIProfamily (Xilinx) which includes one Power PC core andeight high speed interfaces capable of implementing severalprotocols.

On the other hand, the DSP is ideal for fast and sequentialarithmetics becoming a powerful and versatile tool whenenriched with an optimized library of mathematical functions.The DSP used in the module belongs to the TMS320C64xxfamily (Texas Instruments) containing a PCI interface and anembedded dynamic memory controller. This important featuresignificantly accounts to reduce the complexity of both thememory and the host interfaces and, consequently, the overallcost and complexity of the module.

The keynote in this processing and control block is its ca-pacity to produce real-time parameterization of the hardwareprocessing algorithms stored in the FPGA in order to keep upwith the physical conditions of the digitized signal.

C. Interface Block

In spite of being almost completely physically embedded inthe DSP, special reference should be made to the interface capa-bilities of the module. The communications with the host is as-sured through the PCI (version 2.2) bus interface of the DSP. Inthis way, all the user interface can be accomplished in real time(global parameter adjustment and control, graphical visualiza-tion, overall acquisition control, etc.). When a host is present,a dedicated application allows the user to control a great dealof acquisition parameters according to the specific needs of the

experiment (pulse length, pre-trigger configuration, weightingfunction shapes, etc.).

The enormous interface potential of the FPGA is also usedto turn this platform into a scalable system. A fast full-duplexserial transceiver capable of attaining at least 2.5 Gbits/s mayinterface high speed standard protocols and thus dramaticallyincrease the processing power [9]. This means that a reconfig-urable hardware multiprocessing platform can be implementedby using this module.

III. FUNCTIONAL DESCRIPTION

The functional description of the platform is presented ac-cording to the procedures usually involved in the DPP applied toatomic and nuclear spectrometry (Fig. 2). The major advantageof this high speed platform is the use of the FPGA to performthe processing through hardware implementation.

Data read from the acquisition FIFOs undergo a series of nu-merical analysis through the application of digital filters in theFPGAs with the ultimate goal of determining pulse quantitiessuch as amplitude, rise time, or time of occurrence, for instance.

Each digitized pulse is numerically differentiated in order todetermine its rising edge position. This procedure is used, alongwith the hardware trigger information from the TPL, to give anestimation of the region that should be used in the pulse ampli-tude determination. The amplitude is obtained through the use ofa digital filter with the coefficients of a predetermined weightingfunction. The calculated pulse amplitude is then passed on to theDSP in order to build the energy spectrum.

924 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 51, NO. 3, JUNE 2004

This basic energy determination procedure can be completedwith other digital filters also physically implemented in theFPGA that may run in parallel over the digitized data streamin order to determine parameters such as the pulse rise time orthe exact pulse occurrence time applying a digital version of aconstant fraction discriminator (CFD).

A. Optimum Weighting Function Determination (CalibrationProcedure)

The choice of the weighting function (WF) parameters whichmaximize the SNR require the exact knowledge of the operatingconditions and the characteristics of the noise that is effectivelypresent in each experimental session [10]. This WF determina-tion is accomplished in the DSP by an autocalibration proce-dure that uses the least mean square (LMS) method [11], [12].Through this method, no previous knowledge of the noise com-ponents is required and all the relevant noise in the system isconsidered regardless of its physical source [13]. Being a rel-atively slow procedure it is performed by the DSP prior to thestart of the acquisition. In long lasting experiments it can also bedone periodically in order to keep the WF as close as possible tothe optimal. The optimized WF [14] is then used to reconfigurethe hardware through the update of the FPGA.

B. Adaptive Filtering

Another important feature that is implemented in the FPGAis the adaptive filtering processing capability to overcome pulsepileup rejection. Software pileup correction in the DSP is effi-cient in terms of resolution but can be rather slow, so the useof the FPGA processing power is ideal to accomplish it. Theoccurrence of pileup indicates that fewer samples per pulse areavailable for amplitude estimation, before or after the pulse step.The immediate consequence is the impossibility of using theregular WF in the digital filtering procedure. Instead, a largeWF lookup table (LWF) is used as a source to build the WFfor each piledup pulse. This is performed by decimation of theLWF table according to the number of samples available beforeand after each pulse step (pulse length). A proper normalizationgives an adaptive and asymmetrical function as close as pos-sible to the one used for the general case. As a consequence,dead time is significantly reduced in the way that all the pulsesare processed according to its characteristics and with the bestpossible filtering parameters.

IV. APPLICATIONS

This acquisition and processing module is used as a stan-dard PC module in nuclear and atomic spectrometry. However,other application areas include dosimetry measurements, par-ticle physics experiments, etc. Particular applications, wherehigh event rates are necessary or unavoidable and, consequently,where pileup events are not rare, constitute a special target forthe present module. Fig. 3 shows the described PCI implemen-tation of the reconfigurable hardware platform. However, pre-vious experience had shown that a stand-alone or portable in-strument for on-field and remote location measurements are alsoimportant in the application realm of this hardware module [15].

Fig. 3. The reconfigurable hardware platform implemented on a PCI board fora host PC and using a TMS320C6415 DSP and Virtex-II Pro FPGA. Acquisitionchannels digitize at 200 MSPS and Piggyback socket allows the use of up to512 MB of SDRAM.

On the other hand, this platform can also be used as an effec-tive transient recorder for ultra-fast data acquisition. In this case,real-time processing may loose some flexibility but lossless datastream storage is attained. Standard digital signal processing canbe used and near real-time performance is achieved.

V. CONCLUSION

A reconfigurable high performance platform based on DPPtechniques is presented. The complementary use of a FPGA anda DSP in the same module significantly accounts for the overallincrease of flexibility and performance. The real-time streamprocessing capability of the FPGA lowers the burden of the DSP.Near-optimum filtering is made possible through a calibrationprocedure that analyzes the noise effectively present in each ex-periment and accordingly reconfigures the hardware (FPGA).Piledup events are also processed by means of an adaptive fil-tering method that uses a decimated and normalized weightingfunction built according to the number of samples available foreach pulse.

REFERENCES

[1] J. M. R. Cardoso, J. B. Simões, and C. M. Correia, “A mixed analog-dig-ital pulse spectrometer,” Nucl. Instrum. Meth., vol. A 422, pp. 400–404,1999.

[2] J. B. Simões and C. M. B. A. Correia, “Pulse processing architectures,”Nucl. Instrum. Meth., vol. A 422, pp. 405–410, 1999.

[3] J. M. Cardoso, J. B. Simões, T. Menezes, and C. M. B. A. Correia,“CdZnTe spectra improvement through digital pulse amplitude correc-tion using the linear sliding method,” Nucl. Instrum. Meth., vol. A 505,pp. 334–337, 2003.

[4] M. Bolic and V. Drndarevic, “Digital gamma-ray spectroscopy basedon FPGA technology,” Nucl. Instrum. Meth., vol. A 482, pp. 761–766,2002.

[5] V. T. Jordanov, D. Hall, G. Woodward, and R. Zakrzewski, “Portableradiation spectrometer using low power digital pulse processing,” in1999 IEEE Nuclear Science Symp. Conf. Rec., Seattle, WA, 1999, pp.5696–5699.

[6] W. K. Warburton, M. Momayezi, B. Hubbard-Nelson, and W. Skulski,“Digital pulse processing: new possibilities in portable electronics,” J.Radioanal. Nucl. Chem., vol. 248, no. 2, pp. 301–307, 2002.

[7] D. Odell, B. Bushart, L. Harpring, F. Moore, and T. Riley, “Zero deadtime spectroscopy without full charge collection,” Nucl. Instrum. Meth.,vol. A 422, pp. 363–367, 1999.

[8] A. Combo, R. Pereira, J. Sousa, N. Cruz, S. Conroy, J. Kallne, and M.Weiszflog, “A PCI transient recorder for the magnetic proton recoil neu-tron spectrometer at JET,” in Proc. 4th IAEA Technical Meeting on Con-trol, Data Acquisition and Remote Participation for Fusion Research,San Diego, CA, July 2003.

CARDOSO et al.: A HIGH PERFORMANCE RECONFIGURABLE HARDWARE PLATFORM FOR DIGITAL PULSE PROCESSING 925

[9] A. Combo, A. Batista, J. Sousa, and C. A. F. Varandas, “An event-drivenreconfigurable real-time processing system for the next generation offusion experiments,” Rev. Sci. Instrum., vol. 4, no. 3, pp. 1815–1818,2003.

[10] M. Sampietro, A. Geraci, A. Fazzi, and P. Lechner, “Advanced experi-mental application of a digital signal processor in high resolution X-rayspectroscopy,” Rev. Sci. Instrum., vol. 66, no. 1, pp. 5381–5382, 1995.

[11] S. Riboldi, A. Geraci, R. Abbiati, E. Gatti, and G. Ripamonti, “A newmethod for LMS synthesis of optimum finite impulse response (FIR)filters with arbitrary time and frequency constraints and noises,” in 2002IEEE Nuclear Science Symp. Conf. Rec., 2002, pp. 198–202.

[12] G. Bertuccio and A. Pullia, “A method for the determination of the noiseparameters in preamplifying systems for semiconductor radiation detec-tors,” Rev. Sci. Instrum., vol. 64, no. 1, pp. 3294–3298, 1993.

[13] A. Pullia, “How to derive the optimum filter in presence of arbitrarynoises, time-domain constraints, and shape input signals: A newmethod,” Nucl. Instrum. Meth., vol. A397, pp. 414–425, 1997.

[14] E. Gatti, P. Manfredi, M. Sampietro, and V. Speziali, “Suboptimal fil-tering of 1=f -noise in detector charge measurements,” Nucl. Instrum.Meth., vol. A 297, pp. 467–478, 1990.

[15] J. M. Cardoso, V. Amorim, R. Bastos, R. Madeira, J. B. Simões, and C.M. B. A. Correia, “A very low-cost portable multichannel analyzer,” in2000 IEEE Nuclear Science Symp. Conf. Rec., Lyon, France, 2000.