a complete design flow for silicon photonics

A complete design flow for silicon photonics James Pond*a, Chris Coneb, Lukas Chrostowskic, Jackson Kleina, Jonas Flueckigerc, Amy Liua,

Dylan McGuirea, Xu Wanga aLumerical Solutions, Inc., 535 Thurlow Street, Vancouver, BC, Canada V6E 3L2; bMentor

Graphics, 8005 SW Boeckman Road, Wilsonville, OR, USA, 97070; cElectrical and Computer Engineering, University of British Columbia, Vancouver, BC, Canada V6T 1Z4

ABSTRACT

Broad adoption of silicon photonics technology for photonic integrated circuits requires standardized design flows that are similar to what is available for analog and mixed signal electrical circuit design. We have developed a design flow that combines mature electronic design automation (EDA) software with optical simulation software.

An essential component of any design flow, whether electrical or photonic, is the ability to accurately simulate large-scale circuits. This is particularly important when the behavior of the circuit is not trivially related to the individual component performance. While this is clearly the case for electronic circuits consisting of hundreds to billions of transistors, it is already becoming important in photonic circuits such as WDM transmitters, where signal cross talk needs to be considered, as well as optical cross-connect switches. In addition, optical routing to connect different components requires the introduction of additional waveguide sections, waveguide bends, and waveguide crossings, which affect the overall circuit performance. Manufacturing variability can also have dramatic circuit-level consequences that need to be simulated. Circuit simulations must rely on compact models that can accurately represent the behavior of each component, and the compact model parameters must be extracted from physical level simulation and experimental results.

We show how large scale circuits can be simulated in both the time and frequency domains, including the effects of bidirectional and, where appropriate, multimode and multichannel photonic waveguides. We also show how active, passive and nonlinear individual components such as grating couplers, waveguides, splitters, filters, electro-optical modulators and detectors can be simulated using a combination of electrical and optical algorithms, and good agreement with experimental results can be obtained. We then show how parameters, with inclusion of fabrication process variations, can be extracted for use in the circuit level simulations. Ultimately, we show how a multi-channel WDM transceiver can be created, from schematic design to tapeout, using key features of EDA design flows such as schematic driven layout, design rule checking and layout versus schematic.

Keywords: photonics, simulation, silicon photonics, photonic integrated circuits, electronic design automation (EDA), design flow, process design kit (PDK), photonic circuit simulation

1. INTRODUCTION Silicon photonics is a cost effective technology that can enable large scale photonic integrated circuits for a variety of applications, from bio-sensing circuits to on-chip and intra-chip communication systems. Broad adoption of silicon photonics requires standardized design flows comparable to what is available for electronic circuits [1-3]. We have developed a complete design flow for silicon photonics that harnesses decades of investment in electronic design automation (EDA) tools combined with state of the art photonic simulation tools [4-5].

The design flow is shown in Figure 1, and is based on schematic driven design starting with Mentor Graphics Pyxis Schematic. Users can simulate photonic circuits with INTERCONNECT and can choose to view results either in INTERCONNECT or in Pyxis EZwave. For the circuit simulations to be meaningful, a Process Design Kit (PDK) must be pre-populated with validated compact models. The creation of a PDK requires a large number of component level simulations and parameter extraction, validated by experimental results. A generic, non-proprietary silicon photonics design kit is available for download at http://www.siepic.ubc.ca/GSiP which makes it possible for end-users to test the design flow described in this paper.

From Pyxis Schematic, a user can create the layout with Pyxis Layout. This allows for design verification such as design rule checking (DRC), layout versus schematic (LVS) and even lithography simulation. The results of the layout and

Silicon Photonics and Photonic Integrated Circuits IV, edited by Laurent Vivien, Seppo Honkanen,Lorenzo Pavesi, Stefano Pelli, Proc. of SPIE Vol. 9133, 913310 · © 2014 SPIE

CCC code: 0277-786X/14/$18 · doi: 10.1117/12.2052050

Proc. of SPIE Vol. 9133 913310-1

Downloaded From: http://proceedings.spiedigitallibrary.org/ on 08/04/2014 Terms of Use: http://spiedl.org/terms

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design verification can then be fed back into the circuit simulation to predict the impact of the physical layout. This is particularly important because the waveguide lengths, bend placements, crossings can have a major impact on circuit performance. Furthermore, photonic components can be extremely sensitive to lithography effects: for example, the lithographic smoothing of a nominally rectangular waveguide Bragg grating can have a dramatic impact on the bandwidth of the device. Therefore this flow contemplates the direct simulation of components from the layout, including lithography effects, to spot check components and, if necessary, to re-extract parameters for circuit simulation.

Since silicon photonics is a relatively immature technology, and a great deal of innovation is ongoing at the component level, designers will often have to work with a combination of two approaches – schematic design or layout design – and perform a combination of circuit level and component level simulations. As the technology continues to mature, the need for layout-centric design and component level simulation will be reduced while schematic-driven design and circuit simulations will become dominant.

This paper will focus on some of the key aspects of this design flow related to circuit and device simulation: the simulation of photonic circuits and systems; component simulation and parameter extraction; the development of compact models; parameterized compact models in the PDK; manufacturing non-uniformity; and component level simulation after lithography simulation. Finally, we will show an example of designing a wavelength division multiplexing (WDM) system with this flow.

Figure 1. The design flow is based on a schematic driven design. Mentor Graphics tools are used to create a schematic (Pyxis Schematic) and layout (Pyxis Layout) and to perform layout verification steps (Calibre nmDRC, LFD, Calibre nmLVS). For optical simulations Lumerical tools are used, i.e. Lumerical INTERCONNECT for photonics system/circuit simulations and FDTD Solutions, MODE solutions, and DEVICE for PDK development and spot check simulations.

2. CIRCUIT AND SYSTEM LEVEL SIMULATION Time and frequency domain simulation of bidirectional, multimode and multichannel circuit topologies

Optical circuit simulation for design and verification is a key part of the design flow. Circuit simulation requires nonlinear transient analysis and scattering data analysis to capture the optical and electrical signal waveforms in the time domain and the frequency domain, respectively.

Although photonic integration has much in common with electronic integration, a major difference is the variety of components and technologies in photonics, and the nature of the signals that needs to be included in the simulation (wavelength, phase, polarization, etc.). Lasers, modulators, couplers, filters and detectors are just a few of the different components present in a PIC. Furthermore, each one of these components has different operation principles and



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materials. As will be discussed in the next section, circuit simulations rely on proper compact models that accurately represent the optical and electrical responses of these components in time and frequency domain. Additionally, the optical simulation and analysis of PICs is particularly challenging because it also involves bidirectional, multichannel and even multimode propagation of light [6].

INTERCONNECT photonic integrated circuits are composed of individual elements such as optical waveguides, phase modulators and photodetectors, linked by connections that transmit electrical and optical signals. Elements are the fundamental blocks of the circuit and they are represented by parameters and compact models. A ring resonator element, for example, can be modeled using an analytical equation or a scattering matrix. In both cases the compact model defines the relationship between the element’s input and output ports. The accuracy of the simulation is defined by the quality of the compact model and its parameters. Parameter extraction is then a key process in this methodology as will be discussed in a subsequent section.

One interesting aspect of photonic integrated circuit simulation is that the waveguides themselves must be seen as components of the circuit, rather than as simple “wires” that connect other components. Therefore an eigenmode solver should be used to extract key waveguide propagation properties such as mode profiles, effective index, and dispersion. The waveguide losses, which are largely due to manufacturing imperfections such as sidewall roughness are often best determined experimentally.

Frequency domain analysis

Frequency domain analysis is modeled on the same type of scattering analysis used in the high-frequency electrical domain for solving microwave circuits, enabling bidirectional signals to be accurately simulated [7]. However, it has been extended to allow for an arbitrary number of modes supported in the waveguide elements with possible coupling between those modes that can occur in any element. Consequently, the scattering matrix of a given element describes both the relationship between its input and output ports and the relationship between its input and output modes.

Figure 2. Block diagram of an INTERCONNECT circuit. Each element (A, B, C and D) is represented by a scattering matrix that defines the relationship between an arbitrary number of input and output ports and modes (Ψ). IA is the circuit source and its output contains two modes.

Scattering analysis requires that the scattering matrix of each element in the circuit elements be known. This is not the case for circuits that contain opto-electronic devices, such as ring modulators, where the scattering matrix of the ring depends on its driving voltage. INTERCONNECT performs a preliminary simulation during which the circuit elements calculate their own scattering matrices. For example, the ring modulator can calculate its scattering matrix depending on the steady-state electrical signal input, enabling simulations of PICs containing both passive optical components and active opto-electronic elements. The preliminary calculation can also determine the coupling coefficients between two waveguides by performing overlap integration between waveguide modes before starting the scattering analysis, allowing the scattering matrix of a waveguide to combine its propagation properties and coupling losses into a single scattering matrix.



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After running a frequency domain simulation, a comprehensive set of measurements on the complex transmission spectra can be calculated. Typical results include gain, phase, dispersion and group velocity. Spectral peak analysis can also be performed to calculate free spectral range (FSR), bandwidth, Q-factor, and other key parameters.

Figure 4. Scattering data analysis of the simple Fabry-Perot resonator shown in the inset makes it possible to calculate key design parameters such as FSR and Q-factor.

It is possible to perform a parameter extraction of a sub-circuit by calculating and exporting its overall scattering matrix. Once established, the sub-circuit can be replaced by its equivalent scattering matrix element, improving simulation speed.

Time domain analysis

Time domain analysis is performed using a dynamic data flow simulator [8]. When a simulation runs, data flows from the output port of one element to one or more input ports of one or more connected elements. When an element receives data, its compact model applies its behavior to the data and generates the appropriate output. In the time domain simulation, data is represented as a stream of samples. Each sample represents the value of the signal at a specific point in time. In addition to optical signals, INTERCONNECT supports digital and electrical signal types. This flexibility to represent different types of element behavior and signal types enables the development of compact models that can comprehensively address the variety of nonlinear opto-electronic devices present in photonic integrated circuits.

Similar to the frequency domain simulations, the multimode nature of optical components is also included in the time domain simulation, and is not limited to two orthogonal modes or polarizations. INTERCONNECT optical signal support an arbitrary number of modes and base bands, giving designers the capability to simulate bidirectional, multimode and multichannel optical circuits.



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Figure 5. The scattering matrix is a container of multiple modes and digital filters centered at each signal baseband.

Time domain signal integrity analysis of a circuit under test is performed by analyzing the input or output signal at different ports, which may be electrical, optical or digital. Eye diagrams can be calculated from the time domain simulation and the resulting analysis can determine key signal integrity parameters such as bit error rate (BER), optimum threshold and decision instant, and extinction ratio.

Figure 6. The eye diagram resulting from a simulation of an optical transceiver. The analysis of the eye diagram offers insight into the nature of the circuit imperfections

3. COMPONENT LEVEL SIMULATION AND PARAMETER EXTRACTION In this section we will consider some examples of photonic components. We will demonstrate how they can be simulated and show how parameters can be extracted to create compact models in INTERCONNECT. We will consider some representative examples of components that are currently being used in manufactured photonic circuits such as waveguide splitters, grating couplers, tapers, spot size converters, modulators and photodetectors. Simulations examples of next generation components, such as nonlinear devices and integrated gain media can be found at [9].



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Waveguide splitters

Simple waveguide splitters can be achieved by making y-junctions or directional couplers [5]. More complex splitters that are less sensitive to manufacturing imperfections can involve adiabatic tapers [10]. It is relatively simple to create compact models for these devices, for example, by specifying an insertion loss (IL) and a splitting ratio. In general though, these devices can be well modeled by S parameters which allows us to include frequency dependent effects and different reflections on every port. S-parameters can be extracted from FDTD simulations by using modal expansion. A typical simulation setup is shown in Figure 7. The structure has been optimized using Particle Swarm Optimization (PSO) to reduce IL and reflections, which can be seen from the unusual shape of the splitting region and is similar to the designs in [5] and [11]. An eigenmode solver is used to calculate the desired input mode and excite the system. The EM field is recorded at the 3 ports and then expanded on the desired output modes. Using modal expansion, we can not only calculate the coefficients of all desired modes but also determine the forward and backward propagating coefficients. This allows us, for example, to use a single field monitor at port 1 to extract not only S11, but also to obtain the input power for normalization of all S parameters. Since this is a 3 port system, in general 3 simulations are needed to extract the full S parameter. However, symmetry considerations often allow us to reduce the total number of simulations.

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Figure 7. (a) The simulation setup of a splitter and (b) EM field considerations for defining S parameters.

There are two important considerations when working with S-parameters for optical waveguides: firstly, the waveguide modes are not necessarily power orthogonal – meaning that the total power in the waveguide is not simply the sum of the power in each individual mode present; and, secondly, the vectorial nature of the EM modal fields introduces additional complexity compared to a scalar quantity like voltage.

Waveguide power orthogonality: Fortunately, in non-absorbing waveguides, the waveguide modes are power orthogonal which greatly simplifies the analysis. While there is always some absorption in real waveguides, in most practical circuits it is sufficiently low that we can make the approximation that the waveguide modes are power orthogonal. Care should be exercised when this approximation is invalid. For example, the waveguides used in many Ge photodiodes are clearly such a case.

Vectorial nature of waveguide modes: In general, a standard sign and phase convention for the E and H fields of forward and backward propagating modes should be used for all ports of a component. Typically, in a non-absorbing waveguide, the transverse E and H fields are chosen to be real-valued. The backward propagating mode has the same field profile but the tangential H field and normal E field components are reversed in sign. The S-parameters are the complex coefficients of the forward and backward propagating modes, once all modes have been normalized to carry the same power. This means that the S-parameters can have additional negative signs that may not be expected. For example, the S21 coefficient in a 180 degree U-bend will have an additional negative sign for TE-like modes but not for TM-like modes, which can be seen Figure 7b. This is simply due to the fact that the physical fields in the waveguide are the S-parameter coefficients multiplied by the (fully vectorial) modal fields of the waveguide and a 180 degree rotation will reverse the direction of some field components. Furthermore, we must be careful when using symmetry considerations to reduce the number of simulations or measurements that need to be made since the symmetry of the modal fields must be considered.

Finally, small numerical errors in the S-matrix may cause it to violate passivity, particularly for devices with extremely low IL such as waveguide couplers. This can be fixed by using a variety of methods, from fitting with rational functions to using singular value decomposition to scale the S matrix such that its 2-norm is less than or equal to 1. More details can be found in [4] and [5].



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Grating couplers

Grating couplers are also passive devices that can be simulated by S parameters. These can be extracted in a similar way to waveguide splitters. The additional complexity is that fiber modes must be used and typically the fiber mode is incident at an angle to the device. Fortunately, the modal expansion can be done even when the EM fields are known over an angled cross section of the fiber. Grating couplers have sufficiently high IL that small numerical errors do not lead to passivity violations in the S-matrix. However, there can be small violations of reciprocity when broadband simulations are used. However, the S matrix can easily be made reciprocal after simulation with S = 0.5(S+St).

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Figure 10. The simulation setup for a grating coupler in 2D (a) and 3D (b).

The simulation setup for grating couplers is shown in Figure 10. The fiber is cleaved at an angle of to reduce reflections and the grating coupler is designed accordingly. We can calculate the S parameters for the device, which are shown in Figure 11. We can see that the 2D and 3D results are very similar and it makes sense for a designed to optimize this device in 2D before running a 3D simulation for final S parameter extraction. Each 3D FDTD simulation of this device takes about 9 minutes on a 4 processor (32 core total) AMD workstation from 2010. The 2D FDTD simulations take a few seconds. We can also see that the S matrix is not perfectly reciprocal except near the center frequency, which is due



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Figure 11. The S parameters for a grating coupler simulated in 2D and 3D.

Tapers and spot size converters

Tapers can be simulated by FDTD and the S parameters can be extracted. However, these devices are often on the order of 100 μm in length and 3D FDTD simulations can begin to take up to an hour per simulation on a single workstation, and sometimes longer when a fine mesh size is used. An alternative is to use the Eigenmode Expansion (EME) method. The computational cost of EME scales exceptionally well with the propagation distance, making it an ideal method for simulating long passive devices. We have compared EME with 3D FDTD for the spot size converter in [12] and the results are shown in Figure 12. The EME results agree well with 3D FDTD but the full length sweep of the taper can be generated in a few minutes, compared to 6 hours for the 11 data points shown calculated by 3D FDTD.

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Figure 12. (a) The transmission for the spot-size converter in [12] (and shown in (b)) calculated using the EME solver and 3D FDTD. The EME simulation took 3 minutes to simulate 101 different taper lengths (blue squares), whereas 3D FDTD took 6 hours to simulate 11 different taper lengths (green squares) on the same workstation.

Electro-optic modulators

Electro-optic modulators encode an electrical signal onto an optical channel. A multitude of different configurations are being evaluated for research and commercial interests, including travelling-wave (Mach-Zehnder), ring, and photonic crystal modulators. Electrically, either the spatial distribution of the free carrier density or the electric field is used to perturb the refractive index of the material. These effects are achieved using integrated PN/PIN junctions or MOS/SIS capacitors to control the charge density or electric field, respectively, in the active region [13-16].

The electrical response of the modulator to an applied voltage is simulated using Lumerical’s DEVICE. The Poisson and drift-diffusion equations are solved self-consistently to calculate the distribution of electrostatic potential V, electron density n, and hole density p within the semiconductor. In the development of the compact model, DC steady-state simulations were performed to determine the spatial distributions of free carriers as a function of the applied bias. The static junction capacitance vs. voltage (C-V) characteristics are calculated from the differential charge in response to a



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The carrier-induced change in the refractive index (∆n and ∆k) over the waveguide due to the free-carrier plasma dispersion effect can be calculated using a wavelength-dependent silicon model [17]. The electron and hole density calculated in the electrical simulation is used to create a material with a spatially-varying index in the active region according to

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Waveguide integrated photodetectors

At the receiver, photo-detectors convert the optical signal into an electrical one and recover the information encoded on the optical channel. These components can be accurately simulated using a combination of optical and electrical solvers. An FDTD simulation calculates the distribution of the electric and magnetic fields, which can be related to the loss or absorbed power in the materials [18]:

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Typically, germanium is used as the absorbing medium in detectors for silicon photonics applications given its good absorbance in the C-band and its relative ease of integration into standard silicon CMOS processing [19]. Lumerical’s FDTD Solutions, MODE Solutions and DEVICE can be used to simulate and optimize germanium-on-silicon photodetectors in all typical layouts, including butt- and evanescent-coupled components. The active region of the detector is defined in the germanium by a diode, commonly in a lateral or vertical PIN configuration or a lateral MSM configuration [19 and refs. within].

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Figure 14: The simulation setup (a) of the VPD from [20], with 3D view shown in inset. The electrical simulation region is shown in right-half plane. The optical generation rate from the FDTD simulation is shown (b) in the cross-section A-A’ and (c) the cross-section B-B’ averaged in the direction of propagation. The latter is the input to the electrical simulation.

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Figure 15: Steady state response of the simulated photodetector. Geometry from [20]. The dark and illuminated IV characteristic (a) is simulated at T=300K, with dark current 0.3uA at 1V reverse bias, and a saturation current of 1mA. The dark current (b) is also mapped as a function bias voltage and temperature.

As an example, we simulate the response of an evanescently-coupled vertical Ge-on-Si photodetector based on the design of [20]. An FDTD simulation is performed using a fundamental mode source as the optical input. The simulation setups and a cross-section of the absorbed power and corresponding generation rate is shown in Figure 14. This generation rate, averaged in the direction of optical propagation, is used as source term in the electrical simulation.

Proc. of SPIE Vol. 9133 913310-10


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Figure 16: Transient response (a) of current to 90uW optical signal applied as a step function at 100fs. The blue curve represents the numerical derivative and is used to generate (b) the impulse response as a function of frequency.

4. COMPACT MODELS Compact models are essential for the simulation of large-scale photonic integrated circuits. To be useful, these compact models must exist in both the frequency and the time domains. While some passive optical components, such as splitters or grating couplers can be well described using S-parameters, many components require highly sophisticated compact models. In this section, we will show as an example how a compact model can be created for an electro-optical ring modulator. We begin with rigorous, component level simulations of a reverse-biased PN diode using the design presented in reference [21]. We then use the results for the PN diode to simulate the circuit level dynamic response of a ring modulator circuit. This is then verified by running a 2.5D finite-difference time-domain (FDTD) simulation of a ring with a refractive index that varies in time that shows good agreement with advanced component level simulation. We can conclude that a quasi-static compact model, based on the response to a DC driving voltage, is insufficient to correctly describe this device at high frequencies of operation.

Figure 17. From left to right: the refractive index profile; the optical mode profile; the change in refractive index as a function of applied voltage; and the change in loss as a function of applied voltage.

PN diode

The response of the PN diode to an applied voltage is calculated using Lumerical’s DEVICE, and translated into a spatially varying change in refractive index, as described in the previous section. The effective index and loss of the waveguide are calculated using Lumerical’s MODE Solutions, which solves Maxwell’s equations on a finite difference mesh of the waveguide cross section [22]. It is worth noting that perturbation theory is often used for this calculation, i.e., assuming a stationary mode profile, with overlap calculations, but this may not be sufficiently accurate. In fact, for small SOI waveguides it can introduce a large error, for example, nearly a 20% error in [23]. The refractive index of the

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waveguide (taking into account ∆n and ∆k from the electrical simulation) and the resultant optical mode profile are shown in Figure 17. Using Lumerical’s DEVICE and MODE Solutions, one can calculate the change in effective index and loss as a function of applied voltage for the PN diode, which is also shown in Figure 17.

Ring modulator

Figure 18. The sub-circuit compact model for the dynamic response of the ring. This compact model is itself composed of phase shifting, waveguide, coupling and filtering elements.

With Lumerical’s INTERCONNECT, we can study the transient response of a ring modulator circuit based on the same reverse-biased PN diode as shown in Figure 18. We can use the extracted voltage dependent effective index and loss from the component level electro-optic simulations of the PN diode.

Figure 19 shows the steady-state and dynamic response of the ring modulator circuit. The steady state response is calculated with a quasi-static approximation which assumes that the ring will have the same response to a driving voltage as it does to a DC voltage, regardless of the frequency of operation. The dynamic response uses a full time domain simulation in INTERCONNECT. For large input voltages, one can see the “overshooting” effect in the dynamic response when the ring is suddenly brought out of resonance by the input electrical signal. This effect is physically expected since the relatively high Q ring resonator has optical energy stored inside the ring which must be released at the time the device is brought out of resonance [24]. Additionally, the capacitance of the PN diode leads to high frequency roll off which can be simulated by adding a filter to the INTERCONNECT compact model based on the capacitance extracted from DEVICE.

Figure 19. The steady-state and dynamic response of the ring modulator in a circuit level simulation (left) and the dynamic response of a ring modulator simulated using a 2.5D FDTD method with a time-varying refractive index (right).

A component level simulation using a 2.5D FDTD method [25] was carried out to verify this response. This method is ideal for optically large planar components because it offers comparable accuracy to 3D FDTD while only requiring the simulation time and memory of a 2D FDTD simulation. By introducing a refractive index that varies in time, we can observe the dynamic response of the ring modulator to an input electrical signal. Figure 19 also shows the response of

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the ring when a step index ∆n is applied between 10ps and 20ps. This is very similar to the dynamic response from the circuit level simulation with INTERCONNECT.

It is clear that sophisticated compact models are necessary to perform accurate photonic integrated circuit simulation. An advanced designer may choose to simulate initially with a faster steady state model but move the more computationally intensive dynamic model for final circuit verification.

5. CREATING PARAMETERIZED COMPACT MODELS FOR THE PDK We have shown how components can be simulated, parameters can be extracted and compact models can be created. This approach is sufficient for fixed cell components that are validated once and then never changed. When programmable cells are used for components that are parameterized, we are confronted with a new challenge because we need a compact model for every possible value of the parameterized cell. Furthermore, we ideally would like to parameterize cells not by their geometric properties such as waveguide length or gap width, but by their design intent parameters such as Q-factor, free spectral range (FSR) and so on.

We could envisage an automated simulation of each component, prior to running any circuit simulation but this could be extremely time consuming, particularly since cells specified by design intent parameters might require an optimization phase to find the correct geometry that matches the design intent.

To solve this problem we pre-simulate a range of designs by sweeping the relevant geometric properties over all possible values. While this involves a large number of simulations, the process only needs to be done once. The PDK can then be populated with lookup tables that create a mapping between design intent parameters, compact models, and physical geometries. It also makes it possible to explore manufacturing non-uniformity, as we shall see in the next section, and perform statistical yield analysis.

Figure 20. Experimental results measured with 371 samples (left) and results simulated with INTERCONNECT using 300 samples (right).

6. MANUFACTURING NON-UNIFORMITY Manufacturing non-uniformity also needs to be taken into account, particularly when designing silicon photonic circuits. Resonator and interferometric devices, in particular, are highly sensitive to phase shifts due to waveguide geometry variability. It is not uncommon to find that fabricated ring resonator variability across a chip, across a wafer, across a lot, or lot-to-lot, is larger than the free spectral range of the resonator. For example, in [26], ring resonator variability across a chip was measured. In our design flow, the manufacturing variability can be included within the INTERCONNECT simulations, which is made possible by the lookup table approach presented in the previous section. Here, we assume a 1 nm r.m.s. thickness variation and a 5 nm r.m.s waveguide width variation. The optical spectra for the ring resonators in [26] were simulated, and the optical spectra were analyzed using the same methods as used in the experiments. The resonator peak wavelengths were located, and the group index was found by measuring the free spectra range; the experimental and simulated results are shown in Figure 20. Each of the diagonal groups of data points corresponds to one resonator mode (this graph is particularly useful to identify the same resonator mode on sets of data where the

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variability is greater than the FSR). The impact of the thickness and width variations show a clear variability in the resonator wavelengths, related to the waveguide parameters (effective and group index). Such an analysis also allows a correlation between the resonator wavelength variations and the physical parameters (thickness, width). Specifically, height and thickness variations have different impacts on the effective index and group index. For a 500x220 nm strip waveguide, height variations lead to a ∆neff / ∆ng = -0.86, whereas width variations lead to ∆neff / ∆ng = 4.25. The opposite signs and different magnitudes indicate that the geometry variations (width and height) can be separated and extracted from experimental data. From a design methodology perspective, and for a given manufacturing process with known fabrication variations (width, thickness), the designer can predict the circuit variability. This is similar to the common electronics EDA techniques such as corner analysis (typical-typical, fast-fast, slow-slow) or Monte Carlo simulations. Such an approach is critical in determining whether a photonic integrated circuit will work repeatability in a manufacturing process, and can help identify the tuning requirements (where to put thermal tuners, how much tuning is required).

7. COMPONENT LEVEL SIMULATION WITH LITHOGRAPHY CORRECTION As we have seen in the previous section, many photonic devices can be extremely sensitive to geometric variations. For example, a waveguide coupler is highly sensitive to the gap between the two waveguides. It can therefore be useful to perform lithography simulation for a particular process to see the difference between what is on the mask and what is actually manufactured.

By combining the lithography simulations of Calibre with component simulations such as FDTD, we can fully understand the impact of lithography on device performance. This approach has been used to study the impact of lithography on waveguide Bragg gratings [27-28]. The waveguide gratings on the waveguide are designed to be quite small, on the order of 10s of nm. Therefore when manufactured, the gratings become more sinusoidal in shape. By calculating the post-lithography grating shape with Calibre, and then simulating the actual device with 3D FDTD, excellent agreement between the experimental and simulated results can be obtained, as shown in Figure 21.

Figure 21. A waveguide Bragg grating that is designed to be made of square teeth but is manufactured as a sinusoidal-like grating after lithography [27-28]. (a) The original structure in Pyxis and the resulting shape (blue lines) as calculated by Calibre. (b) The lithography simulated structure imported into Lumerical’s FDTD Solutions. (c) Comparison of the FDTD simulation of the pre- and post-lithography simulated design, and the experimental results.

It is unlikely that designers will perform lithography simulation on all components and then re-simulate them all with 3D FDTD. However, it is possible for a designer to identify components that are particularly sensitive to lithography and spot check some of them. If the performance deviates from expectation, it is possible to extract parameters, update compact models and study the impact on the overall circuit performance. In addition, people developing PDKs and associated compact models may find it easier to validate compact models against experimental results by extracting parameters from devices that include lithography corrections by Calibre.

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"ill Fi

WDM Optical Interconnect

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Cascaded Ring Modulators

8. WDM TRANSCEIVER In this section we show an example of how the full design flow can be used to create a WDM transceiver made of cascaded ring modulators, which modulate light only at particular wavelengths and allow light at all other wavelengths to pass through without been affected [29]. Having determined the optimum operation point of the ring modulator, one can cascade several with different resonant wavelengths on a single waveguide, and modulate different wavelengths of light independently. The schematic and layout for the cascaded modulators is shown in Figure 23.

Figure 22. Schematic capture (above), then layout (below) using Pyxis.

Figure 23. The circuit schematic and simulation results of an 8-channel WDM system interconnect with a comb laser as input. Cascaded ring modulators, in detail, allow for modulation and multiplexing of multiple WDM channels. The resulting eye-diagrams are shown.

The schematic, once drawn in Pyxis, can be exported as a netlist and simulated in INTERCONNECT, using compact models developed with the methodologies we have described. The imported circuit can be seen in Figure 23, and the resulting eye-diagrams are shown in the inset which allow key signal integrity parameters such as bit error rate to be

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determined. The effects of the non-ideal component performance, in particular the “overshoot” effect of each ring modulator, can then be evaluated.

9. CONCLUSIONS We have developed a full design flow for silicon photonics that makes it possible to reliably design, simulate, layout and manufacture large scale photonic integrated circuits. We can achieve this by combining the highly mature EDA software that has been developed for the electronics industry with state of the art photonic simulation software. To make silicon photonics broadly accessible, it will be necessary to continue creating foundry-specific PDKs using this methodology and this will be the subject of ongoing work.

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[3] Thylén, L., He, A., Wosinski, L., Dai, D., “The Moore’s law for photonic integrated circuits,” Journal of Zhejiang University SCIENCE A, 7(12), 1961-1967 (2006).

[4] Chrostowski, L., Flueckiger, J., Lin, C., Hochberg, M., Pond, J., Klein, J., Ferguson, J., and Cone, C., “Design methodologies for silicon photonic integrated circuits”, Proc. SPIE 8989, Photonics West 2014, (2014).

[5] Chrostowski, L., Hochberg, M. [Silicon Photonics Design], Cambridge University Press (2014). [6] Klein, J. and Pond, J., "Simulation and Optimization of Photonic Integrated Circuits," in Advanced Photonics

Congress, Optical Society of America (2012). [7] Pozar, D.M., [Microwave Engineering, Third edition], John Wiley & Sons (2004). [8] Parks, T.M., "Bounded Scheduling of Process Networks," Technical Report UCB/ERL-95-105, PhD Dissertation,

EECS Department, University of California Berkeley, CA 94720 (1995). [9] “Flexible Material Plugins,” Lumerical Solutions, Inc.,

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[10] Yun, H., Shi, W., Wang, Y., Chrostowski, L. and Jaeger, N.A.F, “2 × 2 Adiabatic 3-dB Coupler on Silicon-on-Insulator Rib Waveguides,” Proc. SPIE, 8915, (2013).

[11] Zhang, Y., Yang, S., Eu-Jin Lim, A., Lo, G-Q., Galland, C., Baehr-Jones, T., and Hochberg, M., “A compact and low loss Y-junction for submicron silicon waveguide,” Optics Express 21, 1310-1316 (2013).

[12] Tsuchizawa, T., et al., “Microphotonics Devices Based on Silicon Microfabrication Technology,” IEEE J. Sel. Topics Quant. Elec., 11(1), 232 (2005).

[13] Baehr-Jones, T. et al., “Ultralow drive voltage silicon traveling-wave modulator,” Optics Express, 20, 12014 (2012). [14] Van Campenhout, J. et al., "Low-Voltage, Low-Loss, Multi-Gb/s Silicon Micro-Ring Modulator based on a MOS

Capacitor," OFC/NFOEC Tech. Digest, OM2E.4 (2012). [15] Rosenberg, J.C. et al., “A 25 Gbps silicon microring modulator based on an interleaved junction,” Optics Express

20, 26411 (2012). [16] Anderson, S.P. and Fauchet, P.M., “Ultra-low energy switches based on silicon photonic crystals for on-chip optical

interconnects,” Proc. SPIE, 7606, 76060R (2010). [17] Soref , R.A., and Bennett, B.R., “Electrooptical effects in silicon,” IEEE Journal of Quantum Electronics, 23(1),

123-129, (1987). [18] “Optoelectronic Modeling of Photosensitive Devices,” Lumerical Solutions, Inc.,

<https://www.lumerical.com/solutions/innovation/optoelectronic_modeling_photosensitive_devices.html> (2012). https://www.lumerical.com/solutions/innovation/optoelectronic_modeling_photosensitive_devices.html.

[19] Guolian, L. et al., “Improving CMOS-compatible Germanium photodetectors,” Optics Express, 20, 26345 (2012). [20] Tsung-Yang, L., et al. “Silicon Modulators and Germanium Photodetectors on SOI: Monolithic Integration,

Compatibility, and Performance Optimization,” IEEE J. Sel. Topics Quant. Elec, 16, 307 (2010). [21] Ayazi, A. et al., “Linearity of silicon ring modulators for analog optical links,” Optics Express, 20(12), 13115-

13122 (2012).

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[22] Zhu, Z. and Brown, T.G. “Full-vectorial finite-difference analysis of microstructured optical fibers,” Optics Express, 10, 853–864 (2002).

[23] Ackert, J. J., Doylend, J. K., Logan, D. F., Jessop, P. E., Vafaei, R., Chrostowski, L., Knights, A. P., “Defect-mediated resonance shift of silicon-on-insulator racetrack resonators,” Optics Express, 19(13), 11969-11976, (2011).

[24] Sacher, W.D., Green, W.M.J., Assefa, S., Barwicz, T., Pan, H., Shank, S.M., Vlasov, Y.A., and Poon, J.K.S., "Coupling modulation of microrings at rates beyond the linewidth limit," Optics Express 21, 9722-9733 (2013).

[25] Hammer, M., and Ivanova, O.V., “Effective index approximations of photonic crystal slabs: a 2-to-1-D assessment,” Optical and Quantum Electronics 41(4), 267-283 (2009).

[26] Chrostowski, L., Wang, X., Flueckiger, J., Wu, Y., Torres, M.A.G., Wang, Y., and Talebi Fard, S., “Impact of Fabrication Non-Uniformity on Chip-Scale Silicon Photonic Integrated Circuits,” Optical Fiber Conference (2014).

[27] Wang, X, et al., “Lithography Simulation for the Fabrication of Silicon Photonic Devices with Deep-Ultraviolet Lithography,” IEEE Group IV Photonics (2012).

[28] Wang, X., “Silicon photonic waveguide Bragg gratings”, PhD Dissertation, Electrical and Computer Engineering, University of British Columbia, Canada (2013).

[29] Xu, Q., Schmidt, B., Shakya, J., and Lipson, M., “Cascaded silicon micro-ring modulators for WDM optical interconnection,” Optics Express, 14, 9431-9435 (2006).

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a complete design flow for silicon photonics

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