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A CMOS DVD 4x VITERBI DETECTOR: SYSTEM DESIGN AND
VLSI IMPLEMENTATION
Kenneth Chalmers
A thesis submitted in conformity with the requirements for the degree of Master of Applied Science
Graduate Department of Electrical and Computer Engineering University of Toronto
Copyright @ 1999 by Kenneth Chalmers
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Abstract
A CMOS DVD 4x Viterbi Detector: System Design and VLSI hplementation
Kennet h Chalmers
Master of Applied Science
Graduate Department of Electrical and Computer Engineering
University of Toronto
1999
DVD represents the current state-of-the-art in consumer read-only optical storage, and
read channel data rates are constantly being pushed higher. At higher data rates, impair-
ments limit the usefulness of traditional shcer based methods of data detection. A~so,
intersymbol interference degrades the slicer error performance. This thesis examines
Viterbi detection, which improves bit error rate, for a 4x (104.64 Mbps) DVD read chan-
nel. A mode1 of the DVD read channel is presented, and used as the basis for designing
a Viterbi detector that exploits the channel characteristics such as run-length limited
coding constraints. An architecture irnplementing the detector is developed, as well as
a 0.35 Pm, 3LM, CMOS implementation with a core area of 0.62 mm2 and to td area of
5.4 mm2, which is expected to run at 4x data rates.
Acknowledgements
This work would not have b e n possible without the support of many people and
organizations, and 1 would like to take this opportunity to thank a few of them here.
First and foremost 1 would like to thank my parents, whose love and support made
t his whole incredible journey possible. Thanks Mom; thanks Dad.
Of course this thesis wodd not have been possible without the insi1iration, guidance,
assistance, support, and nudging of my supervisor, Professor Glenn Gulak. 1 am proud
to have had the privilege of working under him.
Financial support was provided by NSERC, and the fabrication of the chip would not
have been possible without the funding and services of CMC.
Many thaeks to the people of LP392 and EECG, past and present, resident and
visitor, who have been my cornpanions on this journey. Andy, Christian, Ali, Javad,
Sandy, Jordan, Vaughn, Kambiz, Tooraj, Scott, Yaska, Emmanuel, Jason, Marcus, Elias,
Qiang, Khalid, and anyone else I've forgotten to list. Special thanks to Vincent, Warren,
and Nirmal for their friendship and help in getting this project done.
Thanks to Peter, Eugenia, Jaro, and ail the other technical people who keep the labs
and the tools humming.
1 am indebted to Fatih Sarigoz for source code without which the duty-cycle correction
code in this thesis would not have been possible.
Contents
List of Tables
List of Figures
List of Acronyms
List of Symbols
vii
xii
1 Introduction 1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Motivation 1
1.2 Objectives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.3 Outline . . . . . . . . . . . . . . - . . . . . . . . . . . . . . . . . . . . . . 2
Background Theory 4
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1 Introduction 4
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 DVD Basics 4
. . . . . . . . . . . . . . . . . . . . . . . . 2.2.1 A Note on Terminology 4
. . . . . . . . . . . . . . . . . . . . . . . . . 3.2.2 Physical Disc Format 5
. . . . . . . . . . . . . . . . . . . . . . . 2.2.3 The DVD Read Channel 8
. . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3 Data Detection for DVD 16
. . . . . . . . . . . . . . . . . . . . . . . . . 2.3.1 Threshold Detection 17
. . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3.2 Viterbi Detection 18
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4 TrellisReduction 25
. . . . . . . . . . . . . . . . . . . . . . . . . . 3.5 Existing Implementations 28
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5.1 Hitachi 1997 28
. . . . . . . . . . . . . . . . . . . . . . . . . 2.5.2 Kim, Cho, et al . 1998 28
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5.3 Samsung 1997 28
. . . . . . . . . . . . . . . . . . . . . . . . 2.5.4 Hwang, Lee, et al . 1998 28
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5.5 Pioneer 1998 29
. . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5.6 Cimis Logic 1999 29
2.6 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3 System Design and Simulation 31
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1 Introduction 31
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2 Channel Mode1 31
. . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1 Impulse Response 32
. . . . . . . . . . . . . . . . . . . . . . . . . 3.2.2 Channel Impaimients 37
. . . . . . . . . . . . . . . . . . . . . . . 3.2.3 Final Simulation Mode1 42
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3 Equalization 43
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.4 Simulation Results 45
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5 S u r n m a r y 48
4 Hardware Design of the Detector 49
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.1 Introduction 49
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.2 Design Parameters 49
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.2.1 Quantization 50
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.2.2 Branch Metrics 52
. . . . . . . . . . . . . . . . . . . . . . . . . . . 4.2.3 Number of States 53
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.2.4 MergeDepth 57
. . . . . . . . . . . . . . . . . . . 4.2.5 Survi vor Memory Management 57
. . . . . . . . . . . . . . . . . . . . . . . . 4.2.6 State Metric Overflow 59
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.2.7 Final Results 60
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.3 Chip Architecture 61
. . . . . . . . . . . . . . . . . . . . . . . 4.3.1 Branch Metric Generator 61
. . . . . . . . . . . . . . . . . . . . . . 4.3.2 Add-Compare-Select Unit 62
. . . . . . . . . . . . . . . . . . . . . . . . 4.3.3 S w i v o r Memory Unit 64
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.3.4 Clock Doubling 66
. . . . . . . . . . . . . . . . . . . . . 4.4 Chip Implementation Specificat ions 69
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.4.1 Test 72
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.4.2 CriticalPath 72
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5 Summary 72
5 Conclusions 74
. . . . . . . . . . . . . . . . . . . . . . . . . . 5.1 Sumrnary and Conclusions 74
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.2 Contributions 75
. . . . . . . . . . . . . . . . . . . . . . . 5.3 Suggestions for Future Research 75
. . . . . . . . . . . . . . . . . . . . . . . . . . 5.3.1 Analog Interfacing 75
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.3.2 Equalization 76
. . . . . . . . . . . . . . . . . . . . . 5.3.3 Demodulation and Decoding 76
. . . . . . . . . . . . . . . . . . . . . . . . . . 5.3.4 Higher Data Rates 76
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.3.5 Soft Detection 77
Bibliography
A Measurement Setup
B C Source Code for Channel Mode1
C VHDL Source Code
List of Tables
. . . . . . . . . Storage capacity of various read-only optical disc systems
. . . . . . . . . . . . . . . . . . . . . . . . . . . . Attributes of DVD vs CD
. . . . . . . . . . . . . . . . . . . . . . . . . Partial EFMPlus coding table
. . . . . . . . . . . . . . . . . . . . . . . . . ZNL simulation parameters
. . . . . . . . . . . . . DVD specification for the equalizer charact erist ics-
. . . . . . . . . . . . . . . . . . . . Default branch rnetric reference values
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC parameters
. . . . . . . . . . . . . . . . . . . . . . . . . . . . IC pin List and functions
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sarnpling rates
vii
List of Figures
. . . . . . . . . . . . . . . . . . . . . . . . . . 2.1 Feature sizes of a DVD disc 7
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 The DVD read channel 8
. . . . . . . . . . . . . . . . . . . . 2.3 NRZI encoding and decoding processes 9
. . . . 2.4 Power spectral density of the EFMPlus code (based on figure in [6]) 10
. . . . . . . . . . . . . . . . . . 2.5 Demonstration of intersymbol interference 11
. . . . . . . . . . . . . . . . . . . 2.6 DVD coding and modulation chah chain 13
. . . . . . . . . . . . . . . . . . . 2.7 EFMPlus code state transition diagram 14
. . . . . . . . . . . . . . . 2.5 Structure of Reed-Solomon product code block 16
. . . . . . . . . . . . . . . . 2.9 Basic conceptual mode1 of threshold detection 17
. . . . . . . . . . . . . . . . . . . . . . 2.10 Error event in threshotd detection 18
. . . 2.11 Markov process state transition diagram and its treUis representation 21
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.12 Labeled trellis stage 22
. . . . . . 2.13 Block diagram of the major operations in the Viterbi algorithm 23
. . . . . . . . . . . . . . . 2.14 S hift register mode1 of intersymbol interference 26
. . . . . . . . . . . . . . . . . . . . . . . . 2.15 v = 3 trellis diagram (8 states) 26
. . . . . . . . . . . . 2.16 Reduced trellis for v = 3 using d = 2 RLL constraint 27
. . . . . . . . . . . . . . . . . 3.1 Shift-register based channel response mode1 32
. . . . . . . . . . . . . . 3.2 Channel impulse response (Gaussian spot profile) 33
. . . . . . . . . . . . . . 3.3 Channel impulse response (Ieast-squares recovery) 36
. . . . . . . . . . . . . . . . . . . . . . 3.4 Impairments in the channel mode1 37
. . . . . . . . . . . 3.5 Zero-memory nonlinearity input/output characteristic
. . . . . . . . . . . 3.6 Block diagram of DVD read channel simulation mode1
. . . . . . . . . . . . . . . . . . . . . . . . 3.7 Digital equalizer chaiacteristic
3.8 Sarnpled DVD data filtered through the charnel low-pass filter . . . . . . 3.9 Cornparison of chbnnel simulation and sampled DVD readout data . . . . 3.10 Error histograms for channel simulation, with and without ZNL . . . . . . 3.11 Sampled DVD data vs . channel simulation noise power spectral density . .
. . . . . . . . . . . . . . . . . . . . 4.1 Block diagram of the Viterbi detector
4.2 BER vs . SNRfor ~itfyicg Levels of quantization accuracy (v = 4, jitter =
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 10%. merge depth = 25)
4.3 BER vs . SNR for L1 and L2 norm branch metrics (v = 4. quantization =
. . . . . . . . . . . . . . . . . . . 5 bits. jitter = 10%. merge depth = 25)
. . . . . . . . . . . . . . . . 4.4 Impulse responses in tenns of channel bit rate
4.5 BER vs . SNR for varying numbers of states (no quantization. jitter =
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 10%. merge depth = 25)
. . . . . . . . . . . . . . . 4.6 Reduced-state trellis for the DVD read channel
. . . . . . . . . . . . . 4.7 Register exchange implementation for 2 state trellis
4.5 BER vs SNR for final simulation (v = 4. q=5 bits. merge depth = 25. L1
. . . . . . . . . . . . . . . . . . . . . . . . . . n o m . state metric ovedow)
. . . . . . . . . . . . . . . . . . 4.9 One bIock of the branch metric generator
. . . . . . . . . . . . . . . . . . . . . . . . 4.10 The branch metric generator-
. . . . . . . . . . . . . . . . . . . . . . . . . . . 4.1 1 Cornparison value storage
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.12 ACS unit building block
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.13 Add-compareselect unit
4.14 Normalization block for ACS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.15 Survivor memory unit slice
4.16 The survivor memory unit . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . 4.17 Clock doubling and swinging-input design 68
. . . . . . . . . . . 4.15 Input/output timing diagram for Viterbi detector chip 68
. . . . . . . . . . . . . . . . . . . . . . . 4.19 Mask layout for Viterbi detector 70
. . . . . . . . . . . . . . . . . . . . . . . . A.1 Measurement equipment setup 84
A.2 Block diagram of IC read channel, including measurernent point . . . . . . 85
List of Acronyms
ACS
AWGN
BER
BMG
ISI
CD
CD-ROM
CrRC
DVD
DVD-ROM
ECC
EFM
Gbits
GB
GBytes
Mbits
MB
MByt es
RS-PC
SMU
SNR
VHDL
Add-Compare-Select
Additive White Gaussian Noise
Bit Error Rate
Branch Metric Generator
Intersymbol Interference
Compact Disc
CD Read Only Memory
Cross-Interleave Reed-Solomon Code
Digital Video/Versatile Disc
DVD Read Only Memory
Error Correction Code
Eight-to-Fourteen Modulation
Gigabits (log bits = 1.25 x 10' bytes)
Gigabyte (z3' bytes = 1 .O73741824 x log bytes)
Gigabytes ( 10' bytes)
Megabits (106 bits = 1.25 x IO5 bytes)
Megabyte (220 bytes = 1.048576 x 106 bytes)
Megabytes (106 bytes)
Reed-Solomon Product Code
Survivor Memory Unit
Signal- t *Noise Ratio
Very high speed integrated circuit Hardware Description Language
List of Symbols
Modulating (diannel) bitstream. al. E -1,+1.
Detected version of a- Ideally â = a.
Channel impulse response.
Trellis state i.
Transition from state xi to state xj.
Channel symbol corresponding to transition ciTi- Branch metric for transition Eiqj at time k.
State metric for state xi at time k .
Decision for survivor path coming into state xi at time k.
Survivor sequence coming into to state xi at time k. -f+.
Gaussian normal distribution n(x) = ,&e au .
with mean p and standard deviation a.
Bit interval of data from the DVD channel.
Least-squares approximation to g(t ) . Obrerved c h a ~ e l d u e s (samples) .
y = a * g, where * is the convoIution operator.
Zero memory nonlinearity operation.
xii
Chapter 1
Introduction
1.1 Motivation
DVD represents the curent state of the art in consumer optical storage systems. Known
variously as Digital Video Disc, Digital Versatile Disc, or just DVD, the DVD format
ha, now firmly entrenched itself in the homes of consumers the world over. CEMA (the
Computer & Electronics Marketing Association) estimates the sales to dealers in the
period March 1997 to July 1999 to be 2.8 million units [l] in the United States alone.
On the data side, DVD-ROM drives are widely available as upgrades to existing
computers, and many new computers ship with DVD-ROM drives as standard equipment
instead of CD-ROM drives. Dataquest estimates more than S million DVD-ROM drives
will be shipped in 1999 [2]. As in any computer storage mechanism, research immediately
began to increase the data rates of the drives.
Like CD-ROM, the reference multiple ("xn) method of speed notation is used, with lx
denoting a fust-generation, reference speed DVD drive (channel bit rate of 26.16 Mbps).
2x and 4x drives rapidly appeared, and as of this writing 6x drives are available from
some manufocturers (such as Pioneer [3] and Toshiba [4]).
To enable these high data rates, hi& speed analog and digital electronics are re-
quired to retrieve the data encoded on the disk and return it to the original user data
bitstream. FVhile basic threshold detection has served the first generation of DVD play-
ers, impairments to the read process (which become magnified at higher speeds) result
in increased detector accuracy requirements in the read channel. One such improved
method, examined in this thesis, is Viterbi detection-
Also, future high-density D M (HD-DVD) systems using a blue laser [5] will require
Viterbi detection, since increased data density will map i@ channel impairments. These
channeIs will also run at higher data rates than &st-generation DVD and thus require
high speed detection. This thesis will focus solely on standard DVD-Video/ROM discs
at high data rates; however, the principles presented here could easily be used to develop
a Viterbi detector for HD-DVD when it becomes available.
1.2 Objectives
This thesis describes the development of a DVD read channel detector. We present the
design of a channel simulation for evaluating performance of various schemes, followed
by the system design and VLSI implementation of a Viterbi detector suitable for use in
a 4x DVD read channel.
The thesis is presented in five chapters and three appendices. Chapter 2 provides the
background theory used in this thesis. It describes the DVD system and its read channel,
data detection systems used in the DVD read channel (including the Viterbi a lgo r i t h ) ,
the tuning of the Viterbi algorithm to run-length limited channels, and existing imple-
mentations. Chapter 3 presents the design of a DVD read channel system simulation,
including channel model, equalization, and cornparisons of our model to actual DVD
read channel data obtained with an oscilloscope. Chapter 4 describes the hardware im-
plement ation of the Viterbi detector, including tradeofi made in adapting the algorithm
to hardware, a description of the architecture used, and a summary of the IC imple-
mentation. Findy, Chapter 5 siimmarizes the work and contributions of this thesis and
present s suggestions for hture improvements and research. Appendix A describes the
experimentd measurement setup used to obtain readout signals from an existing DVD
player, Appendix B contains the C source code for our channel modeI, and Appendix C
contains the VHDL source code for the Viterbi detector impIementation.
Chapter 2
Background Theory
2.1 Introduction
In this chapter we provide some background theory on the systems and dgorithms used in
this thesis. First, a brief introduction to the DVD system, including physical disc format
and read channel basics, is presented. Next, we discuss the detection schemes used in the
DVD read channel: threshold detection and Viterbi detection. A method of reducing the
Viterbi trellis to fit the run-length limiting constraints of the channel follows. Findly,
we conclude the chapter with a summuy of existing literature on detection in the DVD
read channel.
2.2 DVD Basics
2.2.1 A Note on Terminology
Since its introduction, there has been much confusion about the acronyrn DVD. Origi-
naily it stood for "Digital Video Disc," since DVD was first conceived as a video coun-
terpart to the CD (Compact Disc) of the audio world. However, early on it was decided
that the DVD format would be useful for a wider range of applications t h m just dis-
playing movies, such as audio (entire libraries of a composerYs work could fit on a single
DVD) and computer data (DVD-ROM, a direct replacement for CD-ROM and back-
wards compatible in that any DVD-ROM drive can read CD-ROM discs). Thus, it was
proposed that the acronym (which by now had been too widely adopted to change) have
its meaning altered to "Digital Versatile Disc." After some argument within the DVD
community, the general consensus seems to be to use the acronym DVD without commit-
ting it to stand for any particular meaning. This thesis will follow the latter convention
by referring to the format throughout simply as DVD.
2.2.2 Physical Disc Format
DVD was designed as a successor to the ubiquitous Compact Disc (CD) and CD-ROM.
PL DVD disc shares a CD's macroscopic dimensions. Visibly a DVD is identical to a CD,
with a 120 mm diameter and 1.2 mm thickness.
Like other read-only optical storage mechanisms, DVD stores information as runs of
pits and lands (low levels and high levels) etched into the substrate of the physical disc.
A laser shines on the disc and reflects off the surface back to a detector. The intensity
sensed at the detector varies depending on whether the laser is shining on a pit or a land.
These intensity variations are translated through some signal processing algorithms back
into the original user data strearn that was written to the disc.
The primary advrintage of DVD over CD is increased storage capacity. A CD-ROM
has a storage capacity of 680 Mbytes of data, while a singie-sided single-layer DVD can
hold 4.7 Gbytes. Furthemore, DVDs can be manufactured with two separate tayers
of information stacked vertically on one side of the disc (which can be accessed without
flipping the disc). The upper layer is semi-transparent, allowing the laser to focus through
i t to the second layer below. Finally, DVDs c m dso be manufactured with information on
both sides of the disc (which requires disc flipping). The formats are usually abbreviated
SL/DL for single layer/double layer and SS/DS for single-sided/double-sided. Table 2.1
Table 2.1: Storage capacity of various read-only optical disc systems.
Disc Format 1 Capacity
Table 2.2: Attributes of DVD vs. CD.
CD DVD (SSSL) DVD (SSDL) DVD (DSSL) DVD (DSDL)
At tribute Track pitch Minimum pit/land length Substrate thickness Recording code (rate) Error control coding Error control coding rate Laser wavelength Lens numericd aperture Reference channel bit rate Reference user bit rate Total storage capacity
680 ~ b & s 4.7 GBytes 8.54 GBytes 9.4 GBytes 17.08 GBytes
CD 1.6 p m 0.834 pm 1.2 mm EFM (8/17) CRC [32,28]/[28,24] 780 nm 0.45 4.32 Mbits/s 1.41 Mbits/s 0.68 Gbytes
DVD 0-74 p m 0.40 p m 0.6 mm x 2 EFM Plus (8/16) RS-PC [208,192]/[182,172] 650 MZ
0.6 26.16 Mbits/s 11.08 Mbits/s 4.7 Gbytes
52% 0% Rate 6.25%
summarizes the storage capacities of the different options.
As Table 2.1 shows, the double sided, double layer DVD can hold the equ iden t of
more than 25 CD-ROM discs. Even the basic 4.7 Gbyte DVD translates to a 6.9 times
increase in storage capacity over CD. This increase cornes about due to improvements in
several areas, such as physical geometry, modulation schemes, and coding schemes. The
differences between these attributes of CD and DVD axe summarized in Table 2.2 [6].
The feature sizes (track pitch and minimum pit/land length) of DVD are much smailer
than those of CD - each less than half the size. This allows more data to be packed into a
given unit area (increased areai density). Fig. 2.1 illustrates the feature sizes graphically.
Figure 2.1: Feature sizes of a DVD disc.
2.2.3 The DVD Read Channel
This thesis is concerned with the detection of data from DVD discs, converting the analog
waveforms received from the laser back into the digital bitstream that was originally
encoded on the &SC. To provide context for the detection process, this section will
describe the major building blocks of the DVD read channel. Figure 2.2 shows these
basic blocks.
Decoders
Figure 2.2: The DVD read channel.
Channel Detector
The channel detector converts the analog readout signa1 from the opticd pickup into the
original channel bitstream. This block is the focus of this thesis, and will be explored
further in section 2.3.
NRZI
NRZI (Non return to zero inverted) is a common modulation scheme in communication
systems. It encodes the data as transitions rather than levels. During a bit interval, the
presence of a high-tdow or low-to-high transition signifies a 1, while the absence of such
a transition represents a O. For example, if the low signal is represented by O and the high
signal by 1, then the bit stream O0101 would be represented (assmïïng an initial signal
level of O) as O, O, 1, 1, O.... Using Boolean algebra, this procedure can be described as
exclusive-oring (XOR) the previous bit with the curent bit (Eq. 2.1).
A property of NRZI, due to its XOR nature, is that recovering the NRZI modu-
Iated bits simply involves performing the exact same XOR operation on the modulated
bitstream, Since:
the original bitstream can be recovered using:
Figure 2.3 shows the encoding and decoding processes.
- Encoding Decoding
Figure 2.3: NRZI encoding and decoding processes.
In the DVD write process, the NRZI modulated bits are converted from 1/0 to +1/-1
before writing, so the signal being detected follows the +1/-1 convention. Once recovered,
the NRZI demodulated bits are fed into the EFMPlus demodulator, described next.
EFMPIus
EFMPlus coding is slightly more complicated than NRZI. Though the acronym EFM for
"Eight-tefourteen modulation," this is slightly misleading since the scheme encodes 8
user bits into 16 channel bits (a rate 8/16 code). Still, EFMPLus is an improvement over
the older EFM scheme used in CD-ROM, which is a rate 8/17 code.
The purpose of EFMPlus coding is twofold: DGsuppression and run-length limiting.
The EFh4Plus recording code was carehilly designed to minimize the DC content of
a rcuidorn input bitstream. This feature ensures that the channel data stream doesn't
interfere with low frequency signals used in the senro system (which controls the alignment
of the optical pickup). Immink ([6], [7]) and Braun and Janssen [8] discuss the DC
suppression of EFMPlus. Figure 2.4, adapted from [6], shows the computer simulated
power spectral density of EFMPlus modulated data (the lower curve represents the code
performance with 3 bytes of lookahead, which irnproves DC suppression).
0.0001 0.001 0.01 Norrnalized Frequency [F/Fb]
Figure 2.4: Power spectral density of the EFMPlus code (based on figure in [6]).
Run-length Limiting (RLL) [9] is the other major h c t i o n performed by EFMPlus.
RLL codes are widely used in computer disc drives to mitigate the effects of intersymbol
int erference (ISI) .
ISI is a result of the isoiated impulse response of a channel spanning two or more bit
intervals. In other words, some of the energy from previous and/or future symbols inter-
feres with the energy of the current symbol at the sampling instant, either constructively
or des tructively. Figure 2.5 demons trates ISI graphically.
Envelope magnitude
Sampling instants Envelope
Tails of adjacent bits decay to zero before cunent sampling instant
1
Tails of adjacent bits non-zero in cunent sampling interval
a No intersyrnbol interference b. Intersymbol interference
Figure 2.5: Demonstration of intersymbol interference.
Ideally, a chmnel has zero ISI. This states that, in the digital domain, the impulse
response p must satisfy ([IO] chapter 6):
or its Fourier transform must satisfy:
This is the Nyquist criterion for zero ISI.
Unfortunately, many real-world channels are band iimited and the bandwidt h avaii-
able or spectral shape of the channel response does not d o w impulse responses which
have zero ISI. The DVD channel fails into this category and so the ISI must be accom-
modated, through the RLL feature of EFMPlus.
RLL codes help to mitigate IST by irnposing constraints on the output data stream.
They require that a certain number of 'O' or nuU syrnbols be present between any con-
secut ive '1' symbols in the original data stream. The number of required zeros is the d
parameter of an RLL code. Also, RLL codes often impose an upper iimit on the number
of consecutive nulls, denoted k, which helps to ensure adequate information is available
for timing recovery (e.g. PLL bcking). DVD's EFMPlus code has (d, k) = (2,lO) [6].
This means that, after NRZI modulation, any bit interval with a transition in it (denoting
a '1') wilI be foliowed by at least 3 bit intervals (3T) with no transition.
A constraint of d = 2 translates to a 3T run length due to the nature of NRZI. For
example, with an initial condition of 0, the bit sequence 1001 wodd be output as the
NRZI modulated sequence 1, 1, 1, O (following Eq. 2.1). The two zeros result in three
consecut ive ones.
Figure 2.6 shows the entire coding and modulation process (including NRZI) graphi-
cal1 y.
The EFMPlus coding procedure is implemented using a 4state h i t e state machine
with a lookup tabie in each state. Each lookup tabie has 344 16-bit words in it and a
next state specification. The EFMPlus modulator takes strearns of &bit input words and
uses the values as indices into the table. From that table position, the state machine
reads the 16-bit output word and the next state. A partial coding table for the EFMPlus
scheme is shown in Table 2.3 (from [6]) . Figure 2.7 shows the state transition diagram,
where each state is labeled with the transition set S, that represents the set of all input
values that cause a transition from state x to state y. For example, looking at Table 2.3
1 consecutive 1 's
t 001 0001 001 001001
At least two and no more than ten
v û's between consecutive 1's I
-1 -1
1 followed by N o 0's becomes nin of length 3T
(T = bit interval)
Figure 2.6: DVD coding and modulation chain chain.
only inputs 6 and S have a next state of 3 from a current state of 2, so thej
the set
Note that an &bit input word implies 256 lookup positions, while the tables have
344 syrnbols available. The extra 88 words make up the substitution table, and their
values correspond to the first 88 input words (0000 0000 through 0101 0111). These
substitution table values, dong with lookahead during the coding process, are used to
improve DC suppression. By considering the next 2-3 values that will be generated, the
modulator can choose the output value, either from the main or substitute table, which
will minimize the DC content.
The decoding process involves exarnining the bitstream in 16-bi t words (synchronized
so they correspond to the modulator output through the use of a reserved sync word)
and using an inverse Iookup table to recover the original &bit input. Some of the &bit
input words are represented by the same 16-bit output word (for example inputs 5 and
6 in state 1); however, these were carefdy designed so that though the outputs are the
same the next states are always either state 2 or state 3, and never the same. States 2
Input O 1 2 3 4 5 6 1 8
Table 2.3: Partial EFMPlus coding table.
State 1 (out, next) 00 10000000001001,1
State 2 (out, next) 0100000100100000,2
State 3 (out, next) 001000000000 100 1 , l
State 4 (out, next) 0 100000100100000,2
Figure 2.7: EFMPlus code state transition diagram.
and 3 were assembled so that bits 1 (the MSB) and 13 unambiguously identiS the state
(output words taken from state 2 always have zeros in both these bits, while those from
state 3 have at least one one). Thus, with the knowledge of these two bits fiom the next
modulated word the current word can be unambiguously demodulated.
After EFMPlus decoding the channel bits are now ready for error control code de-
coding, discussed next .
Error Control Code (ECC)
After demodulation, one more step is required to transform the channel bits back into
the original user bits: error control code decoding. Error control coding uses parity bits
stored with the original user bits to detect and correct errors in the data Stream it receives.
The DVD channel uses a scheme known as Reed-Solomon product code (RS-PC) for its
error cont rol coding.
RS-PC views the data as matrices of bytes that are input from the EFMPlus demod-
ulated bitstream, 192 rows by 172 columns. It uses two Reed-Solomon codes, Cl and
C2, to generate parity checks for the data. Ci is a [208,192] RS code, meaning that for
every 192 byte long input string, it generates a 208 byte long output string (i-e. there
are 208 - 192 = 16 parity bytes). C2 is a [182,172] code.
To generate an RS-PC block requires two steps:
Apply Cl to the columns of the 192 x 172 input matrix to generate a 208 x 172
matrix.
Apply C2 to the rows of the 208 x 172 matrix to generate a final 208 x 182 byte
output matrix.
Note that Cz operates on every row, including those containing only parity bytes
generated by Ci. This additional redundant error check improves the performance of the
scheme. Figure 2.8 shows the structure of an RS-PC block.
I I 1 72 bytes I l I
Figure 2.8: Structure of Reed-Solomon product code block.
The RS-PC ECC code is capable of correcting a maximum burst error length of
approximateiy 2200 bytes (5.8% of an ECC block, 1.6 mm worth of data on the physical
disc) and can reduce a random input error rate of 2 x IO-^ to user data error rate IO-''
[SI - A high level description of RS-PC and further references appear in [6] , while [II] and
[El describe hardware implementations of a DVD read channel RS-PC circuit.
Source Decoding
Finally, the fdly detected and decoded user bits are demultiplexed into their component
streams (audio, video, sub titles, and ot hers) and sent to the various source decoders
required to convert the bitstreams into audio signals (such as Dolby Digital [13]), video
signals (MPEG-2 video [14]), and others. These source decoders are beyond the scope of
t his thesis,
2.3 Data Detection for DVD
Data detection for the DVD read channel is the focus of this thesis. This section will
briefly describe threshold detection, the traditional method of detection used in CD
players and first generation DVD drives. We will then describe Viterbi detection, the
application of the Viterbi algorithm to data detection, which improves detector error
rates in the DVD read channel.
2.3.1 Threshold Detection
Threshold detection is the simplest method of data detection? and has proved effective
in multiple generations of CD-ROM drives and the first generation of DVD drives.
Conceptudly, threshold detection involves slicing the input signal to a high or low
level and sarnpling the s h e d signal at a rate synchronized to the rate of the data symbols.
Figure 2.9 shows this basic model.
Sampler Laser readout level .-- Detected signal slicer data
Readout signal
Sliced signal
Sampling instants
Output bitstream
Figure 2.9: Basic concep tua1 rnodel of threshold detection.
In an ideal channel, this scheme is perfectly adequate. However, as impairments start
distorting the channel response, the number of errors made by a threshold detector can
rapidly become unacceptable. Because the output of the detector is highly dependent on
the magnitude of the input signal, any impairment (such as ISI, randorn noise, or timing
jitter) that can reduce the magnitude of the signal a t the sampling instants increases the
probability of making an error (the slicer output being inverted). Figure 2.10 shows an
example of an error event in a threshold detector system due to timing jitter.
Sampling jneiani
' n t = < - i - - - -. instead of + 1 - -
Figure 2.10: Error event in theshold detection.
In a channel with intersymbol interference, such as the DVD read channel under con-
sideration, the ISI causes signal energy loss at the sampling instants due to deconstructive
interference. Instead of binary signaling, the channel symbols take on multiple values (up
to 2'. where 1 is the length of the channel impulse response in bit internls).
This generdy results in a lower average signal energy being presented to the slicer,
which reduces its noise immunity (lowers the SNR). However, by examining adjacent
bits (something the basic slicer cannot do) we can account for the different signal levels
(channel syrnbols). A detector that takes the ISI into account and uses the information
presented by it could improve error performance. One such detector, using the Viterbi
algori t hm, is discussed next .
2.3.2 Viterbi Detection
Viterbi detection is based on the Viterbi algorithm ([15], [l6]), which is a dynamic pro-
gramming algorithm for h d i n g the shortest path through a class of directed, weighted
graphs. It can be shown that, in the presence of additive white Gaussian noise (AWGN),
the Viterbi algorithm f d s into the class of maximum-likelihood sequence detectors (MLSD).
These detectors are optimal in the maximum-likelihood sense, that is they maximize the
probability density function:
where y is the observed channel value (corrupted by noise) and s is a channel symbol
(the set of all channel symbols being denoted S). This is the likelihmd function for the
symbol S.
In the presence of AWGN, the likelihood function becomes ([IO] chapter 9):
where a* is the noise variance.
Since the likelihood function is nonzero, we can take the natural logarithm and negate
each side of the identity without afTecting it. This means Eq. 2.7 can be rewritten as:
Since a is a constant, maximizing the likelihood function in AwGN is equivalent to
finding the symbol s which minimizes:
in Eq. 2.8.
The maximum-likelihood sequence detector maxirnizes the likelihood (minimizes Eq. 2.9)
over the entire sequence of received values y, choosing the set of symbols s so that Eq. 2.9
is minimized for the
vidual components) . global s u m of al1 likelihoods
That is, it h d s s so that:
(possibly at the expense of some indi-
is minimized (where K is the message length).
This vector interpret ation shows t hat maximum likelihood detection is equ iden t to
finding the vector s that is closest to y in Euclidean space-it rninimizes the distance
between the two vectors. Thus the maximum likelihood detector in the presence of
AWGN is also known as a minimum distance detector. The Viterbi algorithm can be
used as a minimum distance/maximum likelihood sequence detector.
We wiil present a quick overview of the Viterbi algorithm in this section. First, we
describe the trellis diagram representation of a f i t e s t a t e discrete time Markov process.
This is a directed weighted g a p h suitable for use with the Viterbi algorithm. We will then
provide a brief description of the algorithm itself as used in the detector. In conclusion,
we show how an ISI chamne1 such as the DVD read channel can be represented using a
treliis diagram and t herefore utilize the Viterbi algorit hm.
Trellis diagrams
Introduced in [l?], a trellis diagram is a representation of a finite-state cliscrete-time
Markov process with the transitions unrolled in time. Each stage in the trellis shows
every state in the process and d possible transitions leading into and out of that state.
Figure 2.11 shows the familiar state-transition diagram description for a 2-state Markov
process and the corresponding trellis for 5 time intervals.
We denote the set of al1 possible states of the process as X, with xi being state i
at some arbitrary time. There are M total states (2 in Fig. 2.11), so i can take on the
values O 5 i 5 M - 1. The transition from a current state i to a future state j from the
next time siice is defined as ci,.. These are the edges in the trellis diagram.
The edges of the trellis are weighted with lengths, comrnonly known as branch metrics
and denoted X ( c j , j , k). It is the sum of these lengths between the starting and ending
nodes in the trellis that the Viterbi algorithm aims to minimize, thus finding the shortest
pat h t hrough the treuis.
State transition diagram
Trellis diagram
Figure 2.11: Markov process state transition diagram and its trellis representation.
Each state at a given time k also has a state rnetric associated with it, ri(b), which
is the total length of the shortest path leading up to state i at time k.
Associated with a given r i ( k ) are the output d u e s associated with the branches that
resulted in t hat state rnetric. These outputs concatenated together form the suruivor
sequence leading up to state i, which we call jC;(k).
Figure 3.12 shows one stage of the 2-state trellis labeled with this notation.
With this notation defmed, we can now describe the Viterbi algorithm solution to
finding the shortest path through a trellis.
The Viterbi algorithm
Given a trellis such as that of Fig. 2.11, and a known starting state x., the Viterbi
algorithm operates as follows (from [16]):
1. lnitialize storage:
Figure 2.12: Labeled trellis stage.
a %.(O) =x,; >ii(0) (i = l . - .M, ifs) arbitrary.
a r,(0) = 0; ri(0) (i = l . . .M , i # s) = oo
2. Compute:
for ail &,.-
3. For each y at time k + 1 find:
rj(k + 1) = min r ( C j ) t
and store I ; ( k + 1) and the corresponding survivor sequence kj(k + 1).
4. Let b = b + 1 and repeat a t step 2 until the entire trellis is traversed.
The fundamental operations of the aigorithm can be represented with three major
blocks, as shown in Fig. 2.13.
Figure 2.13: Block diagram of the major operations in the Viterbi algorithm.
In the literature, the blocks for branch metric cdculation, path selection, and survivor
sequence storage are known as the branch metric generator (BMG), add-compare-select
unit (ACS or ACSU), and survivor management unit (SMU) respectively. An architecture
for hardware implementation of the Viterbi detector will be examined in section 4.3.
Yk
Branch metric caiculation
Branch metric
calcufation m. /
For channel detection, the common method used for branch metric calculation is the
Euclidean distance squared (L2 n o m ) between the observed signal at time k (yk) and
a set of I (possibly time varying) possible channel symbols si , , (k) , 1 5 i 5 I . In the
detector studied here the channel symbols will be constant with time, so we drop the
function-of-k notation and label them si,j- With this we can calculate the branch metrics
at each time step as:
L
k) = (yk - s i j ) * for d transitions f iv j
The branch metric with the smdes t L2 n o m is the closest in Euclidean space to
the actual received signal. The Viterbi algorithm minimizes the sum of the L2 noms
over the signal sequence, thus minimizing the distance between the vector of the received
inputs (y) and the set of al1 vectors of possible input sequences s which, in the presence
of AWGN, corresponds to maximum-iikelihood detection.
1
Path selection
Su rvivor sequence storage -
/ *, /
'$6
Trellis description of a Channel with ISI
The Viterbi detector can be used in a channe1 with intersyrnbol interference [16]. The
following is a brief summary of how this is achieved.
The digi ta1 model of a communications charnel, given digital impulse response g and
input stream a, yields an output y such that:
Ln a system with no ISI gk is an impulse, resulting in yk = a k . In the DVD channel,
a,, takes on the values +1 or -1 representing a bit 1 or bit O respectively.
Commonly gk is not an isolated impulse but still has finite energy. This means the
amount of ISI (width of the impulse response) decays to zero or becomes negligible after
a certain time span Y, meaning g is finite with extent v. This reduces Eq. 2.12 to:
Eq. 2.13 describes a shift register process of length v, where the values tapped from
the shift register are multiplied by the samples of the impulse response. Figure 2.14 shows
the shift register digitd model of ISI. The non-causai response shown becomes causal in
the model - this transformation doesn't rnatter in our application since al1 simulations
are run off-line (non real-time), so timing delays that are integer multiples of the symbol
rate make no difference to the system.
-4 shift register sequence c m be modeled as a finite-state discrete-time Markov pro-
cess, which is exactly what a trellis describes. Thus, we can map the ISI model into a
trellis diagram.
The length of the shift register describing the channel impulse response is also known
as the constraint length. The resulting number of states in the trellis is 2".
Each state in the trellis represents one possible sequence of received symbols. The
transitions represent the results of shifting out the oldest symbol in the state and shifting
Impulse Response
Figure 2.14: Shift register mode1 of intersymbol interference.
in a new symbol, either O or 1 in our case. Thus, su for each transition ci,, is the output
from the filter after setting the bits in the shift register equal to the string of bits for
that state and transition.
2.4 Trellis Reduct ion
The previous section introduced the concept of a trellis diagram, a time unrolled represen-
tation of a Markov process. In Section 2.2.3 we also introduced RLL codes, a modulation
technique used to combat intersymbol interference. In this section we will present a
method for exploiting the d constraints of RLL codes to reduce the number of states in
the trellis for a channel.
Figure 2.15 shows a standard trellis for a binary channel with constraint Iength v = 3
(S states). The dashed lines correspond to receiving the symbol zero, while the solid lines
represent receiving the symbol one.
In the figure, each state is labeled with a binary nurnber representing the last v bits
received (3 in this example). Transitions are labeled with either a 'O' or a ' 1', representing
a transition based on receiving the corresponding bit. Each state label is unique, and
represents one of the 8 different values that can be taken on by a 3 bit binary number.
Figure 2.15: v = 3 trellis diagram (8 states).
Not all these numbers are valid according to o u RLL constraints. For example, a 11
before NRZI (which violates our d = 2 constraint) becomes either 010 or 101 (depending
on whether the previous bit is a 1 or O) after NRZI modulation. Thus states 2 and 5
me not Iegal according to our modulation scheme and can be removed from the trellis
diagram al t oge t her.
Using the same principle, certain transitions can be removed as well. For example,
state 1 (binary 001) followed by a O (giving the binary sequence 0010) would be NRZI
demodulated as either O011 or 1011, both of which violate the d constrzi.int. Removing
dl the other transitions with violations, we arrive at the trellis shown in Fig. 2.16.
- - - - - - - O branch - 1 branch
Figure 2.16: Reduced trellis for v = 3 using d = 2 RLL constraint.
The benefits of treiliç reduction are twofold. First, this improves detection accuracy by
not dowing the detector to even consider the impossible states. Second, the hardware
architecture of the detector is simplified, since each state corresponds to a number of
hardware resources in the implementat ion.
2.5 Existing Implementations
Ln this section we will review the known existing publications (to September 1999) in-
volving DVD read chonne1 detectors.
2.5.1 Hitachi 1997
A paper by research teams with Hitachi Ltd. describes a 2x DVDROM read channe1
implementation in [18]. Their implementation focuses on the equalizer design with a
brief discussion of the ECC decoder. There is no discussion of the detection method used
or B ER performance achieved.
2.5.2 Kim, Cho, et al. 1998
In [19] the development of the analog front-end for a 4x DVD read chan ne1 IC is give
This front-end uses threshold detection, and focuses on the analog signals (pick up track-
ing, equalizer, etc.) rather than the digital sections. No detector error performance
curves are shown.
An implementation by the Korean electronics Company Sarnsung is given in ['JO]. This
irnplementation uses a partial response traosfer function in its design, meaning their
implementation requires a partial response equalizer front-end. They describe t heir re-
search, but present no hardware irnplementation.
2.5.4 Hwang, Lee, et al. 1998
This research, described in [21], introduces the zerememory nonlinearity (ZNL) as an
impairment in the DVD read chme l . We will examine the ZNL impairment further
in Section 3.2.2. The paper describes an adaptive Viterbi detector using a leôst-mean-
squares approach to estimate the parameters of the ZNL and update the branch metric
generation accordingly. This includes only computer simuiation results, no hardware
implernentation.
2.5.5 Pioneer 1998
Pioneer, the Japanese electronics Company, describes a Viterbi detector for DVD read
channel in [22]. They state that their design has been incorporated into a read channel
LSI chip, but provide no operating details or design parameters.
2.5.6 Cirrus Logic 1999
A DVD read channel design operating at 120 million samples per second ( 4 . 5 ~ ) is pre-
sented in [23] by a team from Cirrus Logic Semiconductors. Their paper describes a
complete read channel implementation, including servo control, timing recovery, demod-
dation, and ECC. They briefly mention that the circuit uses a Viterbi detector, but
again provide no implementation details. They daim a gain of 6 dB at a bit error rate
of 10-6 using maximum-likelihood sequence detection over slicer-based detection. Their
0.35 Pm CMOS implementation is 73 mm2 for the entire mixed-signal read channel.
2.6 Summary
In this chapter we:
Gave an overview of the DVD system, including improvements compared to its
predecessor CD.
Presented the basic DVD read channel flow, including detection, modulation, and
error-control coding, with a brief discussion of the schemes used.
Discussed detection in the DVD charnel in detail, including threshold and Viterbi
detection.
S howed a technique for exploit h g run-length h i ting constraints to reduce the
number of states in a trellis.
Reviewed existing Literature/implementations on Viterbi detection for DVD chan-
nels.
Chapter 3
System Design and Simulation
3.1 Introduction
This chapter presents the design and simulation of a DVD read channel. we discuss the
development of a channel model, including the impulse response of the linear channel and
the impairrnents (noise) found in the channel. We then describe the equalization used
in the DVD read channel, and conclude with a cornparison of the channel simulation to
data sampled from an actual DVD player channel.
3.2 Channel Mode1
The channel model is the most important preiiminary in the design of the detector. The
channel model allows us to experiment with different parameters in the design and see
how chonging them will affect the performance of the detector. No model is perfect,
and a model will never cornpleteIy reflect the true performance of the detector in the
actual physicd system. However, we c m get an approximation that can demonstrate
the relative performance of different schemes, and obtain results that wiil be close to the
absolute results of the physical circuit if the model is accurate. This section will develop
a channel model for the DVD read channel used in the design of the Viterbi detector.
CHAPTER 3. SYSTEM DESIGN AND SIMULATION
3.2.1 Impulse Response
Perhaps the most important aspect of any linear communication system model is the
impulse response of the channel. This is the output of the channel in response to a
single, isolated impulse at its input. For a linear channel, the response of the channel to
a stream of input data can be modeled as the convolution of that data with the channel's
impulse response. In the discrete-time channel with finite impulse response, this can
further be simplified to a shift register process such as that of Fig. 3.1.
t Channel response
Figure 3.1: ShiRregister based channel response rnodel.
The impulse response can be either t ime-invariant (for static channels) or tirne-varying
for tirne-varying channels such as fading channels. This thesis only considers a static
channel model.
W e next examine two impulse response models used over the course of this study:
the Gaussian impulse response and the response recovered using least-squares channel
identification.
Gaussian impulse response
As a first approximation, the DVD channel can be modeled using a simple Gaussian
impulse response h( t ) , as described by Eq. 3.1-
CHAPTER 3. SYSTEM DESIGN AND SIMULATION 33
This is the approximate impulse response for an optical channel given in [24]. This
response is characterized by ta, which controls the l/e-width of the (Gaussiôn-shaped)
laser spot. For our DVD rnodel, we determined, by using the impulse in simulation and
comparing the results to the sampled DVD data, that 150 ns (which is approximately 4T
l ) was a reasonabïe value for to. The resulting impulse at a lx bit interval of T = ,-,,,,,, response is shown in Fig. 3.2.
Figure 3.2: Channel impulse response (Gaussian spot profile).
This impulse response was used in al1 simulations up to and including the design
of the integrated circuit, described in Chapter 4. However, further research revealed a
better method for determining the impulse response, discussed next.
Least-squares channel identification
Leas t-squares chaanel identification uses a least-squares (LS ) solution technique to ex-
tract the impulse response of a linear channel from a readout of the chamel's response
to a known data sequence.
CHAPTER 3. SYSTEM DESIGN AND SIMULATION 34
The least-squares algorithm is a method of solving an overdetermined set of linear
equations, i.e. a system with more equations than unknowns. For a Lnear equation, this
represents the beforelafter channel response bits (the equations) and the channel impulse
response (the unknowns) . The full description including performance notes is discussed in [25]. A bnef sumrnary
of the algorithm follows here:
Let:
T denote the channel bit interval.
y denote the read-head output signal.
rn p denote the readout oversampling factor.
a denote the original user bit stream (a E +1, -1 for DVD).
O g denote the channel impulse response.
O w denote the recovered version of g.
Then:
where ~ ( t ) = uncorrelated, additive, zero-mean noise.
Let our sarnpling factor be Td = $
Sampling with t = mTd (rn E integers):
The estimated channel response is:
where w ( t ) is the estimated version of g ( t ) .
Our problem is to find w( t ) such that the error signal.
is minimized.
Now define:
a M is the estimated length of the channel impulse response.
O 1 is the number of samples of y available.
Then the solution minimizing e(rnTd) is:
For our system, we could obtain channel response readouts through our equipment
setup (described in Appendix A). However, we had no signals corresponding to known
original data sequences (a in the above algorithm). Thus, we were forced to recover the
original input sequences by ourselves, in essence becoming the data detector.
To recover the data, we used feature length extraction. This technique involves mea-
suring the distance between two consecutive zero crossings and dividing i t by the bit
interval, T. The sign of the signal between the zero crossings (positive or negative) d e
notes the original bits (1s or Os, respectively). Ideally, every pair of zero crossings would
CHAPTER 3. SYSTEM DESIGN AND SIMULATION 36
be separated by an exact multiple of T. However, in the real channel, factors such as
domain bloom (where the pits/lands are written larger or smder than they should be)
and jitter in the write process cause the zero crossing locations to drift from the ideal.
Thus, this recovery method is not perfect and requires correction by hand.
One automated technique for improving the automatic recovery accuracy is duty-cycle
correction, or DCC. This procedure, described in [26], helps to correct for the baseline
drift that causes errors in duty cycle. The algorithm examines the feature lengths over a
given interval, compares them to ideal mdtiples of T, and adds or subtracts a constant
offset based on the deviations. This procedure greatly improved detection accuracy and
the least-squares recovery procedure itseif.
With the original data stream extracted, we could perform the least-squares channel
identification procedure. The resulting recovered impulse response for a data set of 269
channel bits and channel response oversampled a t 7 times the bit rate is shown in Fig. 3.3.
-14 -12 -10 -8 -6 4 -2 O 2 4 6 8 10 12 14 Norrnalized Time [m
Figure 3.3: Channel impulse response (least-squares recovery) .
CHAPTER 3. SYSTEM DESIGN AND SIMULATION
3.2.2 Channel Impairment s
The next important feature of a channel model, once the impulse response is determined,
is the collection of impairments that cause the channel output to deviate from its ideal
values and thus cause errors in the recovered bitstream. This section will discuss five
impairments in the DVD read channel: disc tilt, zerememory nonlinearity, additive white
Gaussian noise, timing jitter, and dropout. Figure 3.4 shows how the impairments enter
the system.
Tilt
Figure 3.4: Impairments in the channel model.
When describing impairments, it useful to d e h e the quantity Signal-to-Noise Ratio
(SNR). The SNR of a signal is a rneasure of the noise power relative to the message
signal's power. It is simply defined as the ratio of the mean-square values of the signal
and noise, that is:
where S is the signal and N is the noise.
The measurement of the performance of a detector in an impaired channel is the Bit
Error Rate (BER), defined as:
N e BER = - Nt
CHAPTER 3. SYSTEM DESIGN AND SIMULATION 38
where Ne is the number of errors made by the detector and Nt is the total number of
bits tested-
Disc Tilt
Tilt for a DVD system is defked as the angle by which the laser deviates from a perpen-
dicular to the &SC readout surface- Tilt c m be caused by many factors: m o r s or motion
of the spindle holding the DVD disc in place, improper alignment of the laser read head,
and even warping in the DVD disc itself.
Though generdy not a factor in CD-ROM system design, disc tilt is a more significant
problem in DVD systems. DVD read channels are more sensitive to tilt than CD because
of the decreased feature size - the relative effect of tilt is magnified. This has in fact been
the impetus for the changeover from slicer based detectors to the more costly but more
accurate Viterbi detectors, such as the one described in this thesis.
Any tilt can be decomposed into two fundamental bases: radial tilt, dong the di-
rection from the center of the disc to its edge: and tangential tilt, in the instantanmus
direction of motion of the disc. Radial tilt increases inter-track interference, while tangen-
tial tilt causes increased asymmetry in the impulse response and increased intersymbol
interference [26]. Also shown in [26], both forms of tilt increase data-twclock jitter (tan-
gential tilt more so than radial tilt).
Using the least-squares extracted impulse respUnse means that any tilt in the DVD
read channel we are modeling is already present in the impulse response, and does not
need to be added to the simulations. Therefore we do not make a comparative study of the
performance of the detector in the presence of different amounts of tilt. However, studies
[22] have shown that the Viterbi detector improves the detector error rate compared to
slicer based detection in the DVD read channel with tilt.
Zero-memory nonlinearity
The concept of a zero-memory nonlinearity (ZNL) as a DVD read channel impairment
is introduced in [21]. A ZNL is simply a piecewise linear function that c m be used to
boost or attenuate the signal amplitude at an arbitrary point in both the positive and
negatives senses of the signal. Figure 3.5 shows such a inputfoutput characteristic. The
characteristic is applied to the channe1 data (after convolution with the impulse response)
in the simulation to account for magnitude changes in the DVD read channeI.
Figure 3.5: Zero-memory nonlinearity input/output characteristic.
In the figure, y1 and y, are the ordinates for the start of the gain b c t i o n (r2 < O <
yi), while the slopes ml and rnz control the amount of gain at each sense (positive or
negat i ve) .
This piecewise linear transfer tunction is mathematicdy described ;rs [21]:
CHAPTER 3. SYSTEM DESIGN AND SIMULATION
Table 3.1: ZNL simulation pârameters
Parameter I Value
where:
= 0.5 (y1 - (1 - mi) + 72 (1 - mz))
a2 = 0.5 (ml + mz)
pl = -0.5 - (1 - ml)
p2 = 0.5 - (1 - m2)
Hwang et. al. ([21]) presents an adaptive version Viterbi algorithm that takes into ac-
count the ZNL. For this work, however, we use a time invariant ZNL and precompensate
for it in the channel symbol values s;,j.
The simulation parameters were determineci by using an iterative search to find the
values that minimized the mean-squared error (MSE) between the simulation and the
sampled DVD. MSE is denoted c2 and defined as [IO]:
where yk is the sampled DVD chamel value and ck is the corresponding channel simula-
tion value. This yielded the results shown in Table 3.1
Further evidence of the presence of a ZNL in the DVD read channe1 data will be
presented with the simulation results in section 3.4.
Additive White Gaussian Noise
Additive white Gaussian noise, or AWGN, is a common mode1 for noise sources in corn-
munication channel simulations. As the name implies, AWGN is an additive form of
noise. The noise values foilow a Gaussian probability distribution, which is defined by a
mean ( p ) and standard deviation (a) as shown in Eq. 3.6.
The term white refers to the fact that the noise values are uncorrelated.
The output of a channel only afFected by AWGN is:
where x ( t ) is the unimpaired channel response and u(t) is uncorrelated noise following a
Gaussian distribution.
The AWGN for our experirnents was generated with a zero mean and standard devi-
ation calcdated to give a desired SNR (e-g. 10 dB).
Timing jitter
Timing jitter is often the parameter used to quanti@ perhrmance of a DVD read channel.
In the literature a jitter of less than 20% relative to the sarnpling interval is considered
sufficient in terms of BER performance for DVD [26].
In our experiments, ive generate independent timing offsets using a uniform distribu-
tion and apply the results at each sampling interval. Linear interpolation between the
points is used to generate the offset signal value. Though linear interpolation does not
give the most accurate result, it is fast (for the purposes of simulation) and should in fact
yield pessimistic results due to interpolation noise. Thus, it should provide lower bounds
for the performance in actuai jitter.
Signal dropout
Signal dropout is another common source of error in reading an optical disc. Dropout is
commonly caused by flaws introduced to the surface of the disc, such as fingerprints or
scratches. It is characterized by the signal magnitude suddeniy attenuating by a large
factor (signal energy decreases), so there is no information for the detector to detect.
Some implementations, such as [27], have a defect detector that signals a flag when the
signal envelope drops below a certain level, signifying dropout. Dropout generdy causes
burst errors that the RS-PC code is designed to correct.
3.2.3 Final Simulation Mode1
The structure of the final DVD read channel simulation is shown in Figure 3.6. Though
early conceptual designs were done in Matiab, the final simulation was coded in C to
improve simulation speed. The C source code is provided in Appendix B.
Random data
I
Jitter u AWGN
Ermr counts +
Figure 3.6: Block diagram of DVD r a d channel simulation model.
CHAPTER 3. SYSTEM DESIGN AND SIMULATION
Table 3 -2: DVD specification for the equalizer characteristics.
3.3 Equalizat ion
Parameter Gain variation Group delay variation (F 5 6.5 MHz) Gain (5 MHz) - Gain (O Hz)
An important aspect of any communications channel is equalization, attempting to re-
move as much intersyrnbol interference and high frequency noise as possible to aid ac-
Value < 3 9 dB 5 $ 3 3s 3.2 zk 0.3 dB
curate channel detection. Idedy, this is accomplished without further increasing the
signal-band noise.
The DVD specification provides a recommended equalizer, consisting of a 6th-order
low pass analog Bessel filter (LPF) with a corner frequency (-3 dB point) at 8.2 MHz (to
remove high-frequency noise) and a t t a p transversal fiiter wit h coefficients (-0.17, 1.34,
-0.17) a t times (-2T, 0, 2T) (to boost the high-frequency signal components). AU this is
designed to operate on the reference channel data rate of 26.16 Mbps. We implemented
this exact filter but in digital form. This filter satisfies the specification's prescribed
equalizer characteristics for the l x channel, which are s h o m in Table 3.2
The DVD read channel signals scale linearly with increasing channel speed. For
example, signals that are 7 MHz in the l x channel will be 28 MHz in the 4x channel.
Designing the fiiter in digital f o m allows the same filter to be used with a data set from
any speed channel, so long as the samples are captured at the channel bit rate. The filter
is also easily scalable for oversampled data sets.
The simulation filter was designed in Matlab version 5.0, using the Matlab built-
in filter functions (indicated here using the typemiter font). The Bessel filter was
created using the bessel function, which gives the analog filter coefficients in the s-
CHAPTER 3. SYSTEM DESIGN AND SIMULATION 44
domain. This was transformed into a digital filter using the impinvar function, and then
cascaded with the 3-tap digital filter using the convolve function. The resdting digital
filter characteristic is shown in Figure 3.7.
Normalued Frequency ( f /q
Figure 3 -7: Digital equalizer characteristic.
3.4 - V> a¶ - g3-. C i=.
a - Q> '0
CZ s a 2.8
The data we obtained from sampling the DVD player read channel cornes after the
equalization in that channel implernentation. Still, the signal is affected by high frequency
noise, which can be rernoved with the low-pass filter portion of the reference equalizer.
Al1 sarnpled data sets used in this study (e.g. for least squares recovery) are Low-pass
fikered.
Figure 3.8 shows a cornparison of the sarnpled DVD read channel data before and
after low-pass filtering.
I r I b r r 6
- . . . . . . y . . . . . . . . . . . i . . . 1 . . . . . . . . . . .:. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -
3-. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
* . . . . . . . . . . . S . . . . . . . . . . . . ; . . . . . . . . . . . ‘ . . . . . . . . . . . . . . . . . . . . . . . .;
1 1 1 I I 1 1
Some higher speed channel irnplementations, such as the 2x channel in [18] and the
4x channel in (271, contain variable gain high-frequency equalizers, which d o w boosting
of the high frequency components more than the specified 3.2 dB. The detector design in
this thesis is based on signals after equalization, so the principles (such as least-squares
O 0.05 O. 1 0.15 0.2 0.25 0.3 0.35 Normalited Frequency [f/F]
CHAPTER 3. SYSTEM DESIGN AND SIMULATION
Tirne [s] x 10-
Figure 3.8: SampIed DVD data filtered through the channel low-pass filter.
recovery) apply to the output of any equalized channel so long as the output is still linear
and time-invariant .
3.4 Simulation Results
Using the estimated system impulse response aod the recovered user bitstream, we can
generate a simulated version of the channel readout and compare the simulation to the
original stream. Fig. 3.9 shows this cornparison for a short data set.
This process dowed us to veriSr the accuracy of the ZNL as an impairment in the
DVD read channel. As c m be seen in Fig. 3.9, the ZNL boosts the high amplitude signals
and suppresses the lows.
W e can rneasure the accuracy of our mode1 by examining the error, where error is
defined as:
CHAPTER 3. SYSTEM DESIGN AND SIMULATION 46
1.5 I 1 I I I 1 a I I +
LPF sarnpled DVD . . - . . . . .
t -
- g 3
Figure 3.9: Cornparison of channel simulation and sampled DVD readout data.
where y is the vector of sampled DVD data and Y is the simulation vector generated by
our model. This error can also be viewed as noise.
Generating histograms for the error signal for both channel models (with and without
ZNL) further verifies the ZNL model, as shown in Fig. 3.10.
The Gaussian curves included in Fig. 3.10 are normal curves with mean and standard
deviation equal to that of the data set. With the ZNL in place, the noise almost perfectly
fits the Gaussian distribution. The noise mean for the ZNL model is -0.0019, standard
deviation 0.0537, and the SNR (using the simulation with ZNL as the signal) is 22 dB.
Unfortunately, the noise is not white since a power spectral density (PSD) plot of the
noise is not flat across all frequencies, as shown in Fig. 3.11.
This means that AWGN is not a completely accurate model for the remaining impair-
ments in the channel (after the ZNL). The noise up to the chitnnel bit rate (normalized
frequency 1) appears to be l/ f noise rather than white, while the higher frequency noise
(which should be suppressed by the channel equalizer) is white.
CHAPTER 3. SYSTEM DESIGN AND SIMULATION
Without Zero-Memory Nonlinearity 200 I 1 t 1 1 I I I
Error magnitude
Wth Zero-Memory Nonlinearity
Error magnitude
Figure 3.10: Error histograms for channel simulation, with and without ZNL.
Figure 3.11: Sampled DVD data vs. channel simulation noise power spectral density.
CHAPTER 3. SYSTEM DESIGN AND SIMULATION
3.5 Summary
In this chapter we discussed:
The design of a channel model for the DVD read channel. This included the
channel impulse response models (Gaussian and least-squares recovery) and the
impairments present in the channel for simulating the effects of noise.
The equalization parameters of the standard DVD read channel, including a digital
filter impiementation used in this research.
A cornparison of the sirnulated channel data to actual sampled readout data taken
from a DVD ployer, verifying the accuracy of our channel model.
Chapter 4
Hardware Design of the Detector
4.1 Introduction
This chapter examines the hardware design of the Viterbi detector circuit. We describe
the architecture tradeoffs made in implementing the algorit hm in hardware, including
simdated error performance to justify the choices made. We then discuss the architecture
used in the VLSI implementation. Findy, the implementation and specifications of the
VLSI chip are presented.
4.2 Design Parameters
In this section, we d l examine the design tradeoffs required in making an IC implemen-
tation of the Viterbi detector, as opposed to the ideal version of the algorithm. Figure 4.1
shows a block diagrkm of the detector implementation. We will examine the quantization
of analog signds to discrete signds, the branch metric calculation, the number of states
in the trellis (Le. the memory length of the channel), the merge depth required in the
survivor memory, and state metric ovediow control.
CHAPTER 4. HARDWARE DESIGN OF THE DETECTOR
Laser output (y)
1 ' - I 1 1 Branch I& Metric : Generator I I I -
- - - - - - - Viterbi
Oetector
I
/ - - Add-Compare- Suwivor I Select Unit Memory
Unit 1 t
k t 1 1
Figure 4.1: Block diagram of the Viterbi detector.
Since the Viterbi detector is a digital circuit and the laser output is an analog signal,
some kind of analog-tedigital (A/D) conversion is required. The question is: how many
bits of precision are required in the A/D converter for accuracy in the detector? This was
determined empiricdy by simulating the detector's BER for various quantization levels,
with a timing jitter of 10% and increasing amounts of AWGN (represented by decreasing
SNR on the x axis). The number of states is held fixed at 4, which we show in the next
section to be a good tradeoff between detector size and BER performance. The outcome
of this experiment is shown in Figure 4.2.
Quant ization levels of 2 and 3 bits give extremely poor performance, show ing a leveling
off at a BER of about 7 x 10-~. Though 4 bits improves performance compared to
2 or 3 bits (and removes the leveling off), there is still a 1-1.5 dB loss compared to
higher quantization levels. At 5 bits, there is a less than 0.5 dB loss compared to higher
quantization levels (and a gain of approximately 6 dB compared to the slicer at a BER
CHAPTER 4. HARDWARE DESIGN OF THE DETECTOR
Figure 4.2:
IO%, merge
BER vs- SNR for different quantization levels in the Viterbi detector
SNR [dB]
BER vs. SNR for varying levels of quantization
depth = 25).
16 17
accuracy
18 19 20
(v = 4, jitter =
CHAPTER 4. HARDWARE DESIGN OF THE DETECTOR 52
of 10-~), while stilI being a reasonable size for a hardware implementation. Indeed,
[23] claims a flash A/D operating at 4 . 5 ~ (120 MHz) with 5.5 effective bits of accuracy,
which is more than adequate according to our results. Thus we chose this 5 bits for our
implernentat ion.
The simulations made two assumptions:
1. The quantizer boundaries are exactly evenly spaced.
2. The quantizer is a satuating quantizer, i.e. it Limits any input above the upper
input range to the maximum quantized value and any input below the lower input
range to the minimum quantized value.
4.2.2 Branch Metrics
With the quantization level decided, another tradeoff remains to be made in the branch
metric calculation. Though the L2 norm gives the best results in the maximum-likelihood
sense (in the presence of AWGN), an alternative with much lower hardware cost is the
LI nom. While the L2 n o m is defined as (y - sij)*, the L1 n o m is sirnply ly - si,jl.
When dealing with binary values this results in a great savings in terms of number of
bits of storage required and size of arithmetic units.
Given that our incoming signal values are 5 bits wide, the resulting L2 n o m s can be
up to 10 bits wide ((11111 - 00000)2 = 1111000001). Also, L2 n o m calculations require
a multiplier (to calculate the square of the difference). Multipliers are costly both in
terms of hardware area and latency. Findy, state metrics are made up of the sums of
past branch metrics. This means the state metric word size must be even larger than
that of the branch metrics. Not o d y the storage, but the adders required for generating
new state metrics would also have to be greater than 10 bits wide.
Figure 4.3 shows a simulated run of L1 vs. L2 n o m (v = 4, quantization = 5 bits,
merge depth 25, jitter = 10%). It shows that switching to an LI norm does not come
CHAPTER 4. HARDWARE DESIGN OF THE DETECTOR
without a penalty, but it is small: a loss of less than 0.5 dB compared to the L2 norm
over a wide range of SN&.
BER vs. SNR for LI and L2 branch metrics
a W m
Figure 4.3:
5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 SNR [dB]
BER vs. SNR for L1 and L2 n o m branch metncs (u = 4, quantization = 5
bits, jitter = IO%, merge depth = 25).
4.2.3 Number of States
The number of states used in the detector treilis is a deterrnining factor in the size of
every block in the Viterbi detector. As discussed earlier, the number of states is 2" where
v is the constraint length.
For a communication channel, the constraint length should be approximately equal to
the nurnber of bit intervols where the chknnel impulse response has a "çignificantn effect.
Significant is unfortunately an imprecise word, and significance varies from channel to
channel and from application to application.
CHAPTER 4. HARDWARE DESIGN OF THE DETECTOR 54
Looking at the impulse responses of the DVD read channel, we can see that the
magnitude of the response is largest within a 5T band around the center of the response
in both the Gaussias and extracted impulse responses (as shown in Fig. 4.4).
- 9 - 8 -7 - 6 - 5 4 - 3 - 2 - 1 O 1 2 3 4 5 6 7 8 9 Nomalized Time [t/TJ
Figure 4.4: Impulse responses in terms of channel bit rate.
Knowing this, we hypothesize a constraint length of 4 (since the transitions represent
one bit of the overd structure, this takes into account a total of 5 bits) to yield better
results than any lower d u e but not significantly worse results than higher values. Sim-
ulations run by varying the number of states and keeping dl other factors equal bear out
this hypothesis, as shown in Figure 4.5.
Fig. 4.5 shows the BER as a function of the number of states in the Viterbi detector,
with slicer detection included as a reference. A constraint length of u = 2 in fact performs
worse than slicer based detection. We hypothesized that this is caused by the zero-
memory nonlinearity, since eariïer simulations without the ZNL did not have this odd
behaviour.
The jump from v = 3 to u = 4 is fairly significant (about 2 dB at a BER of but
CHAPTER 4. HARDWARE DESIGN OF THE DETECTOR
BER vs. SNR for different numbers of states in the Viterbi detector
5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 SNR [dB]
Figure 4.5: BER vs. SNR for ~ s y i n g numbers of states (no quantization, jitter = IO%,
rnerge depth = 25).
CHAPTER 4. HARDWARE DESIGN OF THE DETECTOR 56
v = 4 is within 0.5 dB of any higher constraint lengths. Thus, as hypothesized, u = 4
gives a good tradeoff between pedormance and hardware size, as weil as improvement of
about 6 dB compared to slicer-based detection at a BER of 10-~.
The trellis correspondhg to constraint length v = 4, after being reduced according to
the d = 2 nui-length lirnit, is shown in Figure 4.6. The trellis reduces from 16 states (p)
to 8, and the number of edges goes d o m from 32 in the full trellis to 12 in the reduced
t rellis.
Figure 4.6: Reduced-state trellis for the DVD read channel.
CHAPTER 4. HARDWARE DESIGN O F THE DETECTOR
4.2.4 Merge Depth
In the ideal implementation of the Viterbi algorithm, the minimum distance calcuiation
is perfonned for the entire input sequence. In practice, however, the signal sequences
being detected are for ali practical purposes infinite in length (DVD discs often contain
4.5-5 Gbytes of data). Thus, we cannot store the survivor path for the entire sequence;
after some finite amount of time we must make a (sub-optimal) decision and output a
bit,
Fortunately, after a certain amount of time 6 the survivor paths tend to merge into
one cornmon ancestor path. A11 paths are identical after time 6, so we no longer need to
store the information but can instead output it. This is the merge depth of the SMU.
The merge depth can affect detector performance, since survivor sequences failing
to merge can cause erron in the detected sequence. A general rule for merge depth is
approximately 4-6 times the constraint length of the design for moderate SNR. Since our
chosen constraint length is v = 4, this implies a merge depth of 16-24 deep. To ensure
rnerging, we chose to slightly exceed the upper value and use a merge depth of 25.
To validate the merge depth, simulations were run which monitored the merge point
in the survivor memory at a worst-case SNR of 5 dB. The system parameters decided
upon to this point (5 bit quantization, Y = 4, L1 nom) nrere used in the simulation, as
will as timing jitter of 5%. The results after over 20 000 data points show merging to
occur &ter no more than 15 trellis stages, less than our chosen merge depth.
4.2.5 Survivor Memory Management
There exist several dgorithms for storing and updating the surviving sequences as de-
termined by the treKs decisions. The earliest and conccptually simplest method is the
register exchange algorithm, while a later alternative is one of the various forrns of the
traceback algorithm (originally introduced as the pointer method in [28], and summarized
CHAPTER 4. HARDWARE DESIGN OF THE DETECTOR 58
wi th newer techniques in [29]).
The register exchange algorithm is a simple physical mapping of the channel's trellis
into a hardware circuit, with add-compare-select (ACS) units at each treilis node. For
each state in the trellis there is one storage register, and decisions fiom the state metric
calculations dictate fiom which of its two inputs the register stores its new value. The
number of stages in a register exchange implernentation corresponds to the merge dep th.
For example, Fig. 4.7 shows a register exchange unit for a 2 state trellis.
1
Stage 1 I
Decisions L 1
1 1 I 1 ,
Figure 4.7: Register exchange implementation for 2 state treilis.
Traceback algorithms, on the other hand, do not store the actual bit values output by
the trellis. Instead, they store pointers indicating which branch of the trellis was taken.
Traceback algorithms require 3 stages of operation:
O-, * n - C
- 8 XJ
1 1
S.* D Q- D Q-, 1 * s T' A D
1 I
> CLK B X 1
I
a Decision write, which mites these pointers into the traceback memory.
> CLK
a Traceback read, which decodes these pointers back to the merge depth.
1 1 1 1 1 1 1 1 1 1 1 I I
% '
a Decode read, which decodes and outputs the bits past the merge depth.
1 - 1 1
*.. D Q - A = I . D Q - ,D
-'B 1
CLK 1
> C M l - l
The three basic traceback algorithms are k-pointer even, k-pointer odd, and one-
pointer. Details on them can be found in [29].
-
Q - ~ - * A = - > CLK
5
CHAPTER 4. HARDWARE DESIGN OF THE DETECTOR 59
There are tadeoffs in choosing the best algorithm for survivor management. Register
exchange is conceptually simpler and easier to implement. It also has iower latency than
the three traceback algorithms in [29] for a given merge depth. The traceback algorithms,
on the other hand, consume significantly Iess power than the register exchange algorithm.
Register exchange requires one read and one mite for every register in every clock stage,
resulting in a total bandwidth T x 2u (where T is the depth of the unit). Traceback
algorithms only require a write bandwidth of 2' and read bandwidth of k (where k is the
number of pointers). Also, traceback algorithms use standard SRAM for their pointer
storage. In the fabrication process used for this chip, the SRAM is only rated to a speed
of 80 MHz, less than the targeted 104.64 MHz for this chip. We would have had to design
custom low-latency SRAM cells, a project outside the scope of this thesis.
For its simpler implementation, Iower latency, and feasibility in our given fabrication
process, we decided to use the register exchange algorithm in our architecture.
4.2.6 State Metric Overflow
State metric ovexflow is another challenge faced in the hardware implementation of the
Viterbi algorithm. In the ideal case, the state metrics grow unbounded as required.
However, in the real implementation, a finite number of bits are anilable for storing the
state metrics, so some form of normôlization to restrict their dynamic range is required.
For Our implementation, we use most significant bit clearing as described in [20]. In
this technique, the state metric storage is made 3 bits wider than the input bit size (thus
S in our case). The most significant bits of each state metric are monitored with an AND
tree structure, and when all MSBs are equal to one they are cleared back to zero. This
has the effect of subtracting 2' from each state metric. In this way the state metrics are
continually normalized to prevent overflow.
There is a non-zero probability that one state metric could ovedow before the MSBs
of al1 the other states are set. In practice we expect the Likelihood of this to be extremely
CHAPTER 4. HARDWARE DESIGN OF THE DETECTOR
low-it never occurred in our simulations of 1 million points. Further, if this case does
occur the results wiil not be catastrophic, and should cause a negligible number of detector
errors.
4.2.7 Final Results
The final simulated performance of the detector, using al1 the parameters discussed pre-
viously, is shown in Fig. 4.8
BER vs. SNR using ail final hardware parameters
1 e-05 [ I 1 1 n I I 1 1 I 1 1 n I
5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 SNR [dB]
Figure 4.8: BER vs SNR for final simulation (v = 4, q=5 bits, merge depth = 25, LI
norm, state metric ovedow).
At a bit error rate of the Viterbi detector implementation has about a 6 dB
advantage over the tradi tional siicer based met hod.
CHAPTER 4. HARDWARE DESIGN OF THE DETECTOR
Figure 4.9: One block of the branch metric generator.
4.3 Chip Architecture
We will now discuss the implementation of the VLSI Viterbi detector for the DVD read
channel. This section will present block diagrams describing the designs used in the
architecture as shown back in Fig. 4.1
4.3.1 Branch Metric Generator
The branch metric generator (BMG) is responsible for generating the branch metrics, the
edge weights for the treus. As decided by our experiments, the BMG was designed using
an L1 norm and 5-bit wide input value. The channel symbol values (s values) were set
to the values used for the simulations; however, the circuit was created with the ability
to shift in new s values through the input lines. This allows us to adjust the branch
rnetrics, for example if improved values are deterrnined or the circuit is used in a channel
with a different impulse response.
The BMG is made up of an array of blocks, each of which calculates the branch metric
for one trellis edge. Fig. 4.9 shows one of these component blocks of the BMG.
With the symmetricd Gaussian impulse response used in our original simulations,
several edges in fact have the same branch metric calculations (the same s values), so the
redundant ones could be eliminated. However, as stated above we designed the circuit to
be able to shift in new s values if needed. Since these might corne from an asymmetric
impulse response, the decision was made to leave the extra cornparison units in. This is
CHAPTER 4. HARDWARE DESIGN OF THE DETECTOR
Figure 4.10: The branch metric generator.
especially important when the least-squares recovery method is used, since the extracted
impulse response is asymmetrical.
The branch metric blocks are connected together to form the BMG, as shown in
Fig. 4.10.
As stated previously, the s values can be left as the default reset values or shifted
in through the input port if new values are desired. Fig. 4.1 1 shows the circuit for this
function. In t his implementation, the reset values correspond to Sb i t quantized versions
of the Gaussian impulse response, and are enumerated in Table 4.1.
4.3.2 Add-Compare-Select Unit
The add-compare-select, or ACS, unit is the computational core of the Viterbi algorithm.
Each ACS subnode corresponds to one of the states in the trellis diagram, accepting two
branch metric values, adding them to the state metric, and storing the smaller resuit as
the new state metric.
The choice of surviving branch (O or 1, in this implementation) is signaled by the
decision lines, labeled vi (k) - These values are used in the survivor mernory unit, discussed
CHAPTER 4. HARDWARE DESIGN OF THE DETECTOR
a..
0.0 0.1
Figure 4.11: Cornparison value storage.
Table 4- 1: Default branch metric reference values.
s m. in
Reference Value
O
CU( - A
Q + 9.
C
SCAN -: A - CLK
D
CLK A
Qe ...
F
A w
m D Q
CU( - A m
...
-
Figure 4.12: ACS unit building block.
in section 4.3.3-
The ACS unit also incorporates the state metric storage. The result is a feedback
loop, with the previous time slice's state metrics feeding back through the storage to the
current time slice's input. Since there is feedback, the stage cannot be pipelined; thus it
generally represents the critical path in a Viterbi algorithm irnplementation. Alt hough
algori t hms exis t for improving speed through such techniques as block processing (see
[30]), it was determined that this would not be required to achieve our speed goals of 4x.
As with the BMG, the -4CS can be broken down into computational blocks that are
combined to form the whole unit. Figure 4.12 shows one of these ACS subblocks.
These blocks are combined, one for each state in the trellis, to form the entire unit
as shown in Fig. 4.13.
The normalization blocks for preventing state metric overflow use the design shown
in Fig. 4.14.
4.3.3 Survivor Memory Unit
Finally, the survivor memory unit (SMU) is responsibte for storing the survivor sequences
decided upon by the ACS. We used the register exchange algorithm for the SMU in this
implementation.
CHAPTER 4. HARDWARE DESIGN OF THE DETECTOR
Tap MSB of each line to fonn 8 bit wide bus
2 metrics 7 I I 1 State rd
Figure 4.13: Add-compareselect unit .
CHAPTER 4. HARDWARE DESIGN OF THE DETECTOR
Figure 4.11: Normalization block for ACS .
As with the other units examined so fax, the SMU can be broken up into component
pieces which can be connected to fonn the whole unit. In this case, one slice of the SMU
(correspondhg to one stage in the trellis) is shown in Fig. 4.15.
These are simply combined in n stages, where n is the merge depth (25 in our case).
Figure 4.16 shows the completed unit. The initial values correspond to the bit being
shifted out of the state. The final output (detected channel value) is taken to be the
output of state O at the final time slice. Not shown here is the fact that this reduces the
hardware somewhat, since storage not used in the path Ieading to state O at the final
time slice can be removed.
4.3.4 Clock Doubling
The IMS LogicMaster XL-60 IC tester available at the University of Toronto has a max-
imum clock speed rating of 60 MHz [31]. Therefore, to test the chip at 104.64 Mbps (4x
speed) some clock doubling circuitry is required. We generate a doubled clock using a
simple XOR circuit with two 90° out-of-phase input clocks. As well, since the inputs
must corne in at the clock rate, a swinging buffer is used to switch between two 5bi t
wide input Lines. The resulting circuitry is shown in Fig. 4.17.
The input and output buffers swing on the rising edge of the doubled clock, meaning
that each input/output is held for one entire +i clock cycle.
CHAPTER 4. HARDWARE DESIGN OF THE DETECTOR
Figure 4.15: Survivor rnemory unit slice.
Figure 4.16: The survivor memory unit.
CHAPTER 4. HARDWARE DESIGN OF THE DETECTOR
Figure 4.17: Clock doubling and swinging-input design.
Since the clock doubling circuit is an XOR, the chip can operate with a single clock
by holding 42 Iow and using QI as t ie only clock.
Figure 4.18 shows the timing diagram for the main inputs and outputs to the chip:
the two clock phases, & and &, the two inputs to the swinging input buffers, INi and
IN2, and the two data outputs OUTI and OUT2.
Figure 4.18: Input/output timing diagram for Viterbi detector chip.
The clock doubling circuitry should permit the chip to be tested in the IMS tester at
CHAPTER 4- HARDWARE DESIGN OF THE DETECTOR
Table 4.2: IC parameters.
Parameter 1 Value Process Core area Total area Supply voltage Total pins Packaging Taxget speed Power consump t ion
TSMC 0.35 pm CMOS, 3 metal, dual poly 0.62 mm2
' 5.413 mm2 5 v 32 68 pin PGA 104.64 Mbps approx. 100 rnW
a maximum rate of 120 MHz, which is greater than our tugeted speed.
4.4 Chip Implementation Specificat ions
The architecture presented in the previous section was implemented using the VHDL
hardware description language. Full VHDL source code can be found in Appendix C.
The resdting description was translated into hardware resources using t he Synopsys
design system, and implemented in 0.35 pm CMOS technology using the Cadence IC
design system. The Synopsys synthesized schematic was verified by cornparing it to
the C simulation output using 1 million randomly generated test vectors. The chip
is currently being fabricated by the Canadian Microelectronics Corporation (CMC) at
TSMC. A plot of the chip Layout is shown in Fig. 4.19.
The parameters of the resdting chip are summarized in Table 4.2.
The final pinouts of the packaged chip won% be known until it's returned by CMC;
instead, a list of pins and their functions is given in Table 4.3.
CHAPTER 4. HARDWARE DESIGN OF THE DETECTOR
Figure 4.19: Mask layout for Viterbi detector.
CHAPTER 4. HARDWARE DESIGN OF THE DETECTOR
Pin input [O ... 41
reset
test s e
output [O ... 41
Table 4.3: IC pin list and functions.
Description Input lines (one half of swinging input buffer). Input lines (other half of swinging input b d e r ) . Channel symbol value scan-in control. While held low, channel symbol values are scanned in through the inputs (input and input-b) and stored in the reference memory. Resets the chip to an aJl zeros state and loads default channel symbol d u e s when held low for one clock cycle. Enables serial scan-in of multiplexed flipflop test vectors generated automatically in Synopsys. Input port for serial scan-in in test mode. Primary clock port. Secondary clock port. Hold at zero for single clock operation, switch at same rate as c k p h i l but 90 degrees out-of-phase for clock doubled operation. Output lines (one half of swinging output buffer). Also doubles as the test scan output port. -
Output lines (other half of swinging output buffer).
CHAPTER 4. HARDWARE DESIGN OF THE DETECTOR
4.4.1 Test
The chip includes t e s t s e and tes ts i , scan enable and scan in pins. These interface
with built in multiplexed Bipflop automatic test circuitry (inserted by Synopsys) which
allows us to test for faults using the test vectors generated by the automatic test pattern
generation (ATPG) section of the Synopsys software. The test coverage achieved with
the ATPG vectors is greater than 95%. The scan results are received from port output.
These combined with the randomly generated test vectors used in the functional testing
of the circuit will allow us to verify the chip's operation in the IMS tester.
4.4.2 Critical Path
Using an ided clock (no uncertainty, rise and fall times of 0) the critical path of the
detector is, as expected, in the ACS loop fiom the output of the BMG to a state metric
storage register. Simulations with the ideal clock show the detector able to run a t a
maximum speed of greater than 6x (where 6x is 156.96 MHz). Adding timing delays
and clock skew reduces the maximum speed, but further simulations including these
impairments indicate the chip should operate at 4x speed (104.64 MHz).
4.5 Summary
In this chapter we:
r Discussed the architecture design decisions made in implementing the Viterbi de-
tector in hardware, including constraint length, quantization, merge dep th, survivor
rnernory management, branch metric calculation, and ovedow control.
r Described an architecture for a VLSI implementation of the architecture using the
decisions made in the previous section.
CHAPTER 4. HARDWARE DESIGN OF THE DETECTOR 73
0 Presented an implementation of the above architecture, including a layout plot for
a 0.35 pm CMOS implementation and a description of the operating parameters of
the chip.
Chapter 5
Conclusions
5.1 Summary and Conclusions
The threshold method of data detection works well for DVD drives at the reference
(lx) data rate. However, as channel bit rates increase, impairments cause the threshold
detector to produce an unacceptable nurnber of errors. Improved detection methods,
such as those employing the Viterbi dgorithm, are required.
This thesis has presented the system design of a Viterbi detector for the DVD read
channel and a VLSI implementation of that design capable of ninning at 104.64 Mbps
(4x) speeds.
Chapter 2 provided some of the background material and theory used in the thesis. A
brief introduction to the DVD format was introduced including the DVD read channel.
CVe then gave an overview of data detection methods suitable for the DVD read chrtnnel.
Next, a discussion of reduced state trellises for run-length Limited coded channels was
presented. We finished the chapter with a discussion of existing literature on Viterbi
detectors for the DVD read channel.
In chapter 3 we discussed a simulation model of the DVD read channel, including
a channel model, equalization methods, and a cornparison of our simulation to data
sampled from a DVD player.
Chapter 4 introduced the hardware architecture for the detector. We presented a
summary of the design decisions made, then desmbed the resulting architecture. This
chapter conciuded with a description of the specifications of the resulting VLSI chip being
manufactured in a 0.35 pm CMOS process.
5.2 Contributions
The contributions of this thesis are as follows:
O A read channel mode1 for the DVD system, including impulse response and channel
O A system architecture for a Viterbi detector suitable for the DVD read channel.
O A VLSI implementation of the above architecture.
5.3 Suggestions for Future Research
This thesis is simply the Çs t step in a f d DVD read channel implementation. There
are many areas that still need addressing before the design could be used in an actual
DVD player circuit. We present some of the issues here.
5.3.1 Analog Interfacing
The detector presented in this thesis was designed purely in the digital domain. The red
detector will have to operate in an analog channel receiving analog signds fiom the laser
read head. We showed that the detector performs with an acceptable error rate using a
quantization of 5 bits. However, this means that for the 4x channel we require an A/D
converter capable of operating at 104.64 Mbps. Also, circuitry such as a phase-locked
ioop (PLL) is required for timing recovery to ensure the sarnpling of the laser readout
data occurs at the correct instant. A full analog intedace, including A/D converter and
timing recovery, would be an interesting area for further study. The analog 4x read
channel IC described in [19] and [27] with an A/D converter could make an excellent
front-end for this research.
This study simply used the reference DVD equalizer in its design. However, this equal-
izer was designed for thceshoid detection at l x speeds. Further research could examine
equdizers, either analog or digital, to better match the characteristics of the chknnel
response to maximum likelihood detection.
5.3.3 Demodulation and Decoding
Detection is simply the first step in the DVD read channel. Further research could
examine the implementation of an EFMPlus demodulator and ECC decoder chip (such
as those in [12] or 1111) to combine with this work. This would complete the DVD read
channel chah and output the original user bits.
5.3.4 Higher Data Rates
In this thesis we irnplemented a detector for the 4x (104.64Mbps) data rate. However,
published designs already exist running at 4 . 5 ~ [23], and retail products exist operating
at 6x [3] [4]. Further resertrch using high speed Viterbi algorithm irnplementations (such
as those described in [30]) on the detector structure presented in this thesis or more
advaoced fabrication processes (such as 0.25 pm) could push the detection rate even
higher.
5,3,5 Soft Detection
The Viterbi detector presented here is a hard output detector. Soft output detectors
include not ody the detected bit value, but dso a measure of the reliability of that
bit. Perhaps a soft decision detector, such as the soft-output Viterbi algorithm (SOVA)
[32] [33] or the forward-bachavard aigonthm [34], could possibly be used in EFMPlus
demodulation (such as described in [35]) or be passed through the EFMPlus demodulator
to the RS-PC decoder to improve bit error rate performance.
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Appendix A
Measurement Setup
Equipment :
Akai DVP-1000 DVD player.
0 Textronix TDS 220 100 MHz digital oscilloscope (1 Gs/s).
Hewlett-Packard 1141A differential probe using HP 1142A probe control and power
module.
The equipment was configured as shown in Fig. A.l
The data taken from pins 48 & 49 of the AN862FBQ IC is the data just before slicing
occurs, as shown in the block diagram of Fig. A.2. The comection from the input bias
to the slicer is interna1 to the chip, so we had to take out. samples a t the point shown.
The data from the Textronix TDS 220 was passed over a GPiB bus interface to a
measurement workst ation, which recorded the measured values into ASCII text files-
The TDS 220 scope is capable of capturing a maximum of 2500 data points. Table A S
shows the sampling rates and amount of data captured, both in ns and bits (where bits
is calculated as wt and T is the channel bit i n t e r d &en that the channel bit rate
for the DVP-1000 is 27 Mbps; T = 37.04 ns).
Textronix TDS 220
1 Akai DVP-1000 1 /
Figure A. 1 : Measurement equipment setup.
Table A.l: Sampling rates.
Panasonic IC AN862FBQ
Sampling Periud 4 ns 10 ns 20 ns
Amount of Data Captured 10 ms 25 ms 50 rns
Bits Captured 270 675 1350
Probe here
IN-POS
IN-NEG
Figure A.2: Block diagra~ of IC read channel, including measarement point.
The three different ranges allowed us a good tradeoff between number of bits captured
and temporal resolution.
Appendix B
C Source Code for Channel Mode1
Add d o c k jlttsr to r rlgnrl by
AVMDR Urimrth Cblirrr Deparcmant of Elrctrlcsl and Univarrlty of Toronto
Copyright 1999 Urnneth Chalmrrr
Inc rd&jittrr(doublr* orrry, Int niuptr, douùlr jltcrrgccl 1
doublr jittrr~ doubla un10toli doubla delta-Ti doubla nwgolnti doublr* nou-irrryj lnt il
I* Arrry to hold now palnti * / nw-rrrry = Idoubla*)orlloclil~rolIdoublr) nwngtrli
tort1 01 1 nuiptii I**l (
I* Crlculrtr inount of jictrr to rdd to thIr runpla * / unl0tol ~(doubla)r~dm(l 1 Idoub1aIWKJU)W;ei drlt&T = ((unlOtol . 21 - 1) * jlttrri
( l* Llnmrly Intrrpolrtr to tlnd rraponia rt jlttrr polnt '1
I* Cblculrtr Intaqolrtlon prrmrtrrr ' 1 double xl, x2, yl, yl, m, bi
I * Cnlculrtr ilopr and Incercrpt for intrrpolrtlon *I m {y2 - yl) 1 lx2 - x l ) ~ b = y2 - a*irll
rrturn 01 1
I * blnrry rurdoa nuinbrr grnarator * / tlncludr <rrth.h> lincludr 'binrv.hm
ldrtlnr RAHoe 11414116~1.0 / * (1*a31)-1 * / tdnflnr BYTES 156 #drtlnr HI 1 Idrtlnr u, O @drtInr rcahrrdrr '$Harderi Igrrdr6lchrlmrri/CvSROOTlvittr1~~~rnclbInc,v 1.1 19911101 15 17132119 cbImar8 0q1 5';
lnt blnrv lunilgned Int i d , I* InltIallxrtlon ierd '1
Int rriatl I* rit CO 1 to rritrrt *I I
lnt rvi long Int rrndm (11 sxtrrn char *lnltrtrcr II, *racrtrca I I
itatlc chrr itatr(BrPESI, *prsvrtrtri rtstlc Int lligi
Il (rrrrr =a HI) (
llrg a U)I
raturn 1011 l
if (tlag == MI (
pravrtotr inititate (rred, rtoce, BYTES) i flag Hl1 rrturn tO11
1 r1ie (
prmvitrte imtrtato Istotm) 1 N rrndom 0 k Olt rrturn lrvl i
1 1
linclude <nnlloc. h> bincludr *bitget.h*
Int l bitget (long num, int rz)
/O Producrr thr rrverrrd bit atrram corrriponding to n, in an arrby.
* The valurr In thm array rra bipolar 1-1 and 1) m
num i r the nuinber to b. converted. m
( int i, *a, bi long nr
tor II 01 i art i*+l {
i t ln k il b = 11
elrm b -11
lm grusrlsn rpot intenrity profila MIncludr citdio.h> Ilncluda <nnth,h> lincludr <malloc.h> lincludr 'havrlr.h* linclude *bitgrt.hg
doublr havalm Iint aire-h, doublo *hl
The valuri are output *in order', thnt 18, thm tirrt two vrluei &a for the bruicher lesving itatm O. Thm very tirrt vrlur Ir for the cran whrn the currenc rtatr = O, and th. input - 0, ni@ ircond value Ir whrn th. current rtate O and the input in 1. Tho 3rd Md 4th vnluar in the lirt are rrlsted In the anme wiy. Thm 3rd value in for irate 1, when currrnt input ii O. Th- 4th valu. la for arate 1, when curront input in l . . . etc rtc. rll the wry to the 32nd valu* which ir tor the 16th rtntr lit mrmory 4 ) w L n the current input in 1.
hiaumrr rmoling oncs prr bit intrrvrl (l/dataRatr ni)
i1xr-h ir the nuinbof ot rlmonta in h, th. ItopuIrr rerponie. lit rniqling occure ance per bit Intervnl, 8ito-h = IrIBita in rpot.c)
h Ir th* output ot ipot,c, thm Impulrm rmiponrm ot chm channal
( double mrmrult, rua) int j. *al long i, auxil
oaxl pow (2, ilra-h)r rerult (double 0) d l o c
rrturn rrsultl
lmgat rrverrrd bit reprrirntation ot a O /
j+*l
/ * r Ir aulloc'd up in bitgat * I
FOR CHANNEL MODEL
FOR CHANNEL
APPEND~X B. C SOURCE CODE FOR CHANNEL MODEL
1' ~lahbin
a
Ornarata branch matricr tor Viterbi datrctor. Includai optional precompenrrtlon tor Z N L .
a
' AVMOR Krnnath Chalmorr bprrtmrnc of Electrlcal and Coinputar Englnaaring
* Univrrrlty of Toronto . ' COPYRIGHT
Copyright 1999 Krnnath Chalmari . lincludr aalloc.h> lincluda a i t h T h > lincludr <rtdio.h> lInc1udr <itdllb.h> linchdr 'spot-j1ttar.h' Oinclude *hvalr.hg lincluda *raaQapot, ho lincludr 'znl .hm
int mintint ac, char*. av)i int WricrBNValr(char* h t n , doubli* k a , lnt conlangthl
int mrln(int ac, charu avl (
char *sportni char* batni doubla* h a 1 double* #pot-ai doubla* rpot-ntartr int nui inc rpotrizm, i i int ovari
prlntf lgExitinu.. .'Ir axit(5lr
1
I * Calculata branch motric valurr t r m ipot profile * I k a w b<svali(nu, rpot,rtirtl r
1. Wrlto branch macric value8 to iile .I WritrBWVilaIhtn, h a , nu11
rsturn 01 1
I* * WrltrBWVali t * Sava the valurr in a branch metric array to a fila - 1
int WrltrWalr lchar8 M n , doubla* hi, int conlangthl l
tclora l k t i I
APPENDIX B. C SOURCE CODE FOR CHANNEL MODEL
S . r CL- \ -.
o....
frrrlnrrldoubls,a) j
!rrrlnrtl,i) 1 t r o r l d u l a t e ~ ~ ~ ~ frrr l input-a) i
return 01 1
/ * UrltrHRZIArrryi
Urite M rrrry O! lntogrrr to r tllr a/
lnt Mlt~ZIArriy(chir* Ln, Int* rrrry, Int len)
F I U * nrtl-fi lnt ir
toril 8 Oi 1 < lrni i**l (
lt(rrrry(1l r O) tprlntt (nrti-t, *l\n*)i
elee Iprlnttinrtf,!, 'O\n9 l r
I
tcloirlnrrl-t) r return 01
1
/ ' IntloLbublrArrry:
Convrrt an irrry O! lnttgrr vrluri to rn irrry of doubler
double* IntToDoubl.hrrryllnta irrry, int l m ) 1
doubla* doublrrrrryi lnt II
doublrrrrry = [double*)ulloc [rlrsot (doublr) lan) i If[doublerrrry 4 i NVLL) I
prlntt lWError illocrtlnp mraory for doublr rrriy\n0 ) r return HVLL~
1
raturn doublerrrryr 1
Strndi for *Llnrrr rhlft-reglitor XSI', rodri8 tha ISI ot the c h m r l urlng the lwulie rciponre rnd O linrrr ihltc rrglstrr, Shoulb be
a mordira ot mgnltudtm hitir thrn the old convolutlon uthod, *
AVMOR rn Xenneth Chrlnrri
Deprrtmant ot Elrctrlcrl rnd C w t s r Englnrerlng rn Unlvrrrlcy O! Toronto * ' COPYRIGHT * Copyright 1999 Kenneth Chrlmra *
doublrm linrrr,rhltt,iri(doubleS wrvr:ori, lnt wrvebltr, doublr tO, double drtrrrte, double lrlbl ri, double ulglitude, double jitttrgct, Int ovwruple) (
double* rhlltrrgi double* output1 lnt outbitri doublra hi lnt hbltii int 1, Ir double T, drlthT, unfOto11
/ * For Orurrirn apot prolll,. '/ hblti 8 (lmlrlbltr) 11
Ia Crlculrta 4 ot output bits [trking lnto rccount rhlft roglitar ilte) * / outblti wrvrbltr + 11 hb1tr)r
l a Crerte rhllt rrgiitrr to hold Input datr * I ihlltrrg ~doublr~)arlloclai~oo!idoub1el * hbitrlr
Io Inltlollre rhlft reglater to trror lrll -1) rcrtt ' / tor(1 Or 1 < hbical let)
ahlttrrg[l) -11
I 1 SuPpllng prrlodi drtr rate In )cbli, iriipllng rate In na * I T 1.0 / drtrrrte * le31
In Generatr thr output rerbam ' 1 lorli 01 1 a outbitrt 1.t) 1
doublr r u 0.0;
/* Colculacr amount of jirrbr to add to clock * / I* OLD: Oauniian~ delta3 gsuii((jittergct T113.0, 0, SEED, 0 1 1 ~ 1 uniOcol = (doublr) random(1 I (doublnl 1cMIEWJWWEi delta-T (lunlOrol * 11 - II * T * jitcbrgcti
I* Ornrrate Gruiiirn rpot profih * / h rpottt0, bstrrntb, iolblto, daltpT, ovrrisniplr)~ forlj w 0; j < hblcn; jt*)
h(j) * = mplitudr~
forlj Oi j 6 hblti; j+*l r u t i hljl * rhlttregljlt
/ * Shllt torward contrnta O! ihilt rogiatrr * / forlj hbitr-11 j r O[ j--)
nhiftregl jl rhiftrwlj-1) i
/* Shitt in nrw bit iped wirh zrror sftrr wrvrforml */ if (1 < wavebitrt
rhitcrbg101 wavoform[i]r elrr
#hifcrbg[O] -1;
rrturn outputt l
* Likr llnror,shilc,iri, but rrrdr *pot protlla trom A LIli inrterd of guirrating Ir.
*I
double* linbar-ihlf c-irl-il Ir(doub1r' wovefonn, int wovrbiti, chsr* ipotfnt I
doublrn rhifcrrg; doublem output) int outbicic doubla* ht inc hbitit int ihittbicrr / * Sltr of rhllt rrpirtrr *I inr hovir; / a No, not flylnp - ovrraampling factor in h '1 int 1, J i
I* Rrad spot protilr */
i rrshrpotirpotfn, kh, Lhbltr, Lhovrr)~ rhlftbitr u hbiti;
I * Calculstr # of output bltr (tiking lnto occount ahltt rrglstrr ilzsl *I outbirr Iwavrbiti * hovrrl w hbitri
I* ~llocate the iawry O /
output = Idoubli*)mblloclilxrof ldoubls) * oucbicr) i
I* Crratr ihift rrgirtrr to hold input data '1 rhiftrcq Idoubla*)inalloc(iiziof (doubla) * rhiftbitrl~
I o Initialira rhltt reglrtrr CO trrom (al1 -11 atrto '1 for(1 0; 1 < ihiftbiti; itr)
ihitt~rgli] -1)
I* Ornrrrte the output rcrrra ' 1 forli = 01 1 < outblta( 1 ~ ) l
double ruai w 0.01
Ie Oenrratr output uilng rhltr rrgirrrr torlj 01 j 6 rhiltbitr~ jeil (
ium t w hljl * 8hlttrrglj)i 1
lm Bhitr forwrrd contrntr of ahilt rrgirtrr @/ torlj ihiftbltr-A) j , 01 j--)
rhiftrog1j1 = ihittrrg(j-111
In Shitt in nbw b i t (pod with caros rttsr wrvstorm\ ' 1 if(i < w~vbbitr)
rhiftrepIO1 = wavifornlil ; elri
rhiftrep(O] = -11 1
* Md h W Co r ripsl to mkr lcta SNR match a targmt volui
' A m o n Kinnrth Chaliairr
a Drportwnt ot Elsctrical and Compuerr hginbrring * Unlverrlty of Toronto a
COPYRIOKP
elncludm sitdlo,h> Iincludo cmalloc.h> lincludr smath.h> Iincludo 'no1rify.h' lincludr *gauss. hg
#drtinr OxOD / * Sood for Cauriim nwnbor ganorator * /
I * noiiifyr
* Altor an input block to have a givon SNR *I
vold noiiity(doublo* block, int Ion, double SNRl (
double *noliai / * Arriy ot nolio valuri *I double mi~prri 1 . Simal powmr of input block *I int Ir
I* Allocrto iaemory for noirs block * / noire - ~doublo*)iaalloc(mitrot~doub~o) . hnlj it (noiro == HULL) [
printt(*Not onough i n o ~ r y for noira block\n*lr rrturni
1
I* Initlalizo randon nwnbor gonorator * / 0aur~10, O, SEED, l)r
/ * Calculato chi rignal powor OC the block * / rigpwr r iignalgowrrlblock. lrnl i Imtprintt litdorr, *tp\nm, rlqpwrl r*l
Io Oenoratr a noiro block tor thm givin signal powrr and SNR * / go~~lolro,block(nolrr, l m , rigpwr, SNR, 111
1' Apply the noiio to the input block * / torii - 04 1 < leni i**) [
blockli] *= noira[ilr 1
/ * Da-allocacr memory * / Lror (nolsol i
)
doubla ga~ol~o,block(doubl~ nolrs, int nolre-lm, doubla rlggwr, doubla rnr, double codr,rotel
Int ji doubla noi8rPowrr, rtddivi
/ * Omrratr a block of noiio * / for ( j = 01 j < noise-loni j e * )
( nolrr[j) I. pauri(l.0, 0.0, SEED, 0))
1
I* Mmarurr the noiie pcwmr *I noiiaPowrr = rignsl~worinoiso, noiic,lonlr
I * Nonnblize the noire to unit variance '/ tor ( j 01 j < nolao,leni j*+) (
noirsi j l l m rqrrlnolroPow*r) 3 1
/ * calculate the scallng factor *I rtddov a iqrt[rig,pvr/(codo-rote * pow(l0,0, rnr 1 10.0))li
/ * adjurt the nolnr varlancr to givo th* deiirrd SNR * / for (j = 01 j < noire-lrni j e t )
( noire[j) rtddrvi
1
roturn rtMovr 1
doubla rimaLpowrrîdoublr* block, Int len) I
int ii doubla pwr r 0 1
roturn pwrllrni 1
linoludr a d l o c , h > lincludr 'nrzi.hm
inc . nrzi tint rz, int 'inSici)
1' NRZI oncoder Input bltitrem. .
sr i8 th@ number ot input8 ln cho bitrurom, a
inBita 11 chi arrry of blnory input bit8 (O1# and l'il.
Roturni thm NRII rciprrnentatlon of inBita (-1'8 and +l'8\ . *I
{ int i , *a, rtator
a - (lnt * ) malloo (it rizmot îintl) I
.!!PPENDIX B- C SOURCE CODE FOR CHANNEL MODEL
SOURCE CODE FOR CHANNEL MODEL
l * Return the c r lcu l r ted output return out1
1
1' Copyright ic ) 1981 Regentr of the üniver i i ty of Cr l i forn i r ,
* Al1 r ight r rererved. The Berkeley iottwate Licenre Agrcsmsnt * ipec i f le r the termi and conditioni for r e d i i t r i h t i o n . * I
t i f def ined(L1BC-SCCS) ci& tdef inedl l in t l r t r t i c c h l r rccr id[J a@g(t)rrndom.~ 5.1 IBarkelsyl 3/9186'1 tondit In LIBC-SCCS and not l i n t *l
tinclude <rtdio.h? @include 'r8ndom.h'
1' ruidoai.~: An Improved rrndom number genaratlon prckrge, In addition t o tha rcrndard
* r ind( ) / r rand() l i k e interface, t h i r prckrge r l r o hr r r rpec i r l r t a t e info intertoce, The I n i t i t i t e O routine I r c r l led with r reed, an i r r r y of
* byte#, and r count of h w rnrny bytei i r e being pr i ied in! t h i r r r r r y I r than * i n i t i r l i z e d t o contrin I n f o m t i o n for rrndoai number generstlon wlth chat
much r t r t e i n f o m t l o n . Oood r izer for the w u n t of r t a t e infocmrtion are 11, 64, 128, and 156 byter, The i t a t e cnn ba owltched by c r l l l n g the r e t r t r t e ( ) routine with the r u a r r ray r r wri I n i t i r l l i z a d with I n l t i t r t e ( l . By d e l r u l t , the pickrge runr with 128 byter of r t r t e informntion and
* generrtar f r r bo t te r randuu nmbarr thrn r l inear congruantir1 gonerator. Xf the rmount of r t a t e I n t o m t i o n i r l e r i than 31 bytai , r nlmpIe l i n e i r congruentir1 R.N,O, ii ured. In te rn i l ly , the i t r t a informrtion i r t r e r t e d ira an r r r r y of lonvri the raroeth e l a w n t of the r r r r y i i che type of R.N.0. b i n a ured ( i u u l l integerlt the reminder of tha r r r r y I r the r t r t e Information for the R,N.O. Thur, 31 bytei of r t r t e information wi l l giva 7 longi worch of r t b t e informtion, which wi l l i l l w r degree reven p~lynomirl . (Noter the reroeth word of r t r t e infocmrtion i l r o hr r iome other Inforiaation # t o r d in I t -- r a s r r t r t r t e ( l for d i t a l l i l . The r m d m number generrtion technique in A l i n e i r faedbrck r h i f t rugircor
* ipprorch, w l o y l n g t r inaniaI r ( i inco there a re fewer termi t o ium up thnt way). In t h i r spproach, the lear t r ign i f ic rn t b i t of r l l the niuiiberr in the r t r t e t r b l e wi l l i c t r i a l inear faedbrck r h i f t r e u i i t e r , rnd wi l l have
* period 2"deg - 1 lwhera deg I r the degrea of the polynanirl b d n g uied, rrruming t h r t the polyncarisl ii irreducibls ind primitlva). The highir order b i t8 wi l l have longor periodi, r ince t h a l r virluei a re o l io lnflusnced
* by piwdo-rurdola car r ie r out of the lcuer b i t i . The t o t a l period of the * ganerrtor ii rpproximrtely deg*(l*mdeg - 11 1 thuo doubllng the mount of * r t r t a inforwt ion hrr r v r i t influence on the period of the ganerrtor.
Noter the dogm 12"deg - 1) i r rn rpproximition only good for large dag, whan the period of the r h i f t r e g i i t e r I r the dominant factor, Wlth dog equrl t o reven. the period I r ac tur l ly much longer thrn the 7*iZm*7 - II prrdictad by t h i r foraulr .
* I
For each of the c u r r ~ t l y rupportod randan number generrtori , we have a break value on the rmount of r t r t e i n f o m t i o n [you need a t len i t t h i i many bycei of i r a t e info t o iupport t h i r rrndcar nwber generrtor) , a degrea for the polynomial (ac tur l ly a tr inomirl) thot the R.N.O. I r brred on, ind the #eparrtlon betvsm the tn, lowor order coe t t ic len t r of the trinocairl,
* /
tdef ins tdef ine tdef ine tdef ine
tdef ina tdef ine tdef lns tdef lne
Idef iiie tdef ine adof ine tdef ina
(dot lne tdef lne tdefine @dot ina
@dot ine Bdet ine @de£ 1 ne Bdef ine
I*
TYPE,O BREAK-O DPO-O SEP-O
TYPE-1 B R W l Dm-1 sa~,i
TIPL2 B R W 1 OEB-2 BEP-2
TYPE-3 BREAK-3 DEO-3 sep-3
TYPE-4 BREA%-4 DEO-4 SBP,I
* Arrry veriionr of the rbove i n f o m t i o n t a mke cods run f a r t e r -- r e l i e r * on f r c t t h r t TYPE-1 r * 1. '1
tdefina WTYPES 5 1. mx nuaber of typer rbove
i t r t i c i n t iepi(HIJClVPLBJ = (SEP-O, SEPJ, sep-1, BEP-3, SEP,( 1 1
I n i t i r l l y , worythlng Ir net up r r If froa I * I n l t ~ t i t e ( 1, krrndtbl, 118 ) I
Note t h r t t h h i n i t i r l l r r t i o n t rka i rdvantige of the f r e t tha i rrrndoai() rdvincei the front and r e r r pointerr 10mranLdeg rimer, rnd henco the r e r r pointer which r t r r t i r t O wi i l r l r o end up a t arroi thur the xeroeth e l m a n t of the i t r t e Inforiaation, whlch concainr info about the current poricion o t tha r a r r pointer i a j u i t
* niuçTYPESs(rptr - # r i t e ) * TIPL3 8 8 TYPB-3, 1
r t i t l c long rrndtbllDE0-3 * 1) i n p u , Ox9r319039, Ou32d9c014, Ox9b661181, Ox5dalf342,
I ' t p t r and r p t r i r e t r o polntera ln to the r o t e inlo, r front and r r a r r pointer , Thene two pointer i r r e i lwiyr r r n é r e p plrcea aparta , a s they cycle c y c l l c r l l y t l o u g h the a t r t e ln to rmt lon . (Yea, t h l r dora oean w could ge t
* rwry with j ru t one polnter, but the code for r rndm( l l a more e f t l c i e n t t h l r @ wryl. The pointrra are l e t t poaitlonrd ir thry would be <rom the cal1
i n i t a t r t r l 1, rbndtbl, 128 1 (The po i l r ion ot t h r r r a r polntsr , r p t r , i i r e r l l y O I r r explrIn.6 rbovr i n the i n i t l r l i r r t l o n o t r rndtbl) bacruse t h r a ra t e t&le pointer i r r a t CO point t o r rnd tb l [ l l Ir8 rxp l r in td below).
' 1
mtrt lc long e I p t r m LruidtbllSIP-1 * 1 J i i t e t l c long Orptr i br ind tb l l l ] i
I o * The toliowing thingr r r r the pointer t o the r t r t r i n f o m t l o n t rb le , * the typa of th r current generr tor , t h r d w r e e o l the n i t r en t polpomlrl * k i n g uied, snd the aeprrr t lon brtwaen the two pointera. @ Note t h r t fo r etf ic iency of rrndon(l, wa r a w b e r the f i r e t iocrt lon o t * the a t i t e I n f o r u t i o n , not the arrorth. Hrnce it in v r l i d CO rccrra * m t r t r l - l ) , which ir uard t o i t o r r the type of the R.N.0. * Alao, wr rsr«rkr the l r a t locrt ion, r lnce t h l i l a more r t f l c l enc thin
indwlng evary r i s e t o f lnd the rddrear of the l r r c elemrnt t o m e i t * the f ron t and r e r r ga in te r i hava wrrpped. ' 1
r t r t i c long m a t r t e a b r i n d t b l l l ] ~
i t e t l c l n t r r a t y p e m n P g 3 l r t r t l c I n t r m é d e g DM-31 r t r t l c l n t rand-aep . SEP-31
r t r t l c long * e n Q u LrrndtbllDEO-3 * 111
/ * * srendmi * I n i c l r l i t e the rrndca nuiPbrr genirr tor br ied on the given reed. If the * type i r t he t r l v i r l n o - a t r t r - i n f o m t l o n type, juat rm&r the aeed. * O t h e n i r e , l n i t i r l i r e s i t r t e l ] h i r d on the givrn wie rd* v i i a l l n e r r * congrurnt i r l generr tor . Then, the pointera &te a r t t o knmm iocrtlona * thnt a r e u w c t l y rrnQliep plrcea i p r r t . L i i t l y , i t cyclea t h r rtrtr * l n l o m t l o n r glvtn nurbrr of tlmei t o gst rld of ony i n l t l r l dapendonclw * lntroduced ky the L.C.R.N.O. * Note ch r t the i n l t l r l l r r t l o n of r rnd tb l l ] for de f ru l t urrge r e l i e r on
v r lu r r p r d u c r d by chia roütlne. * /
void arrndom(unaigned xl (
/ * * i n l t r t r t e i 0 I n l t i r l i t e th* r t r t a inîornutlon ln the givrn r r r r y of n bytes for * t u t u r i tandom nuinber generrtlon. Brred on the nurber o t bytes in
a re glven, uid the brerk v r l u w for the d i t l e r r n t R.N.O.'r, wr chooie * the h r t ( I r rge ic ) one w crn w d a r t t h ing i up t o r i t , arrndor() l a
then c r l l e â t o i n t t l r l t r e the t t r t e inforar t ion. * Nota t h r t on r r tu rn trom arrndoa(l, wr a r t icr tel-11 t o ba t h r type * o u l t l p l w e d wlth the cu r r rn t vr lue of the r e r r po in t r r i t h l r in eo * auccrreivm c r l l a t o i n i t a t r t e l ) won't l o i r chie in lo ra r t ion ind w l l l l be able Co r e r t r r t wlth # @ t @ t b t l l ) .
Notri the t i r r t thing wr do i r i ev r the current r c r t r , i f my, juat l i k e * a e t r t r t e ( l r o t h r t i t doein ' t u t t e r when ln l tmt r t e ii c r l l ed . * Rrturna A pointer t o the 016 r t i t e . .I
c h u * l n i t a t r t e ( unrigned reed, / * fieed fo r R, N. O * * / charb brg,St&C*, / * pointsr t o r t r t r i r r r y * / i n t nl I o 1 bytei of r t r c e info * /
l r eg la t e r char Ooa t r t e ( c h u * ) ( t a t r t e ( -11 I l
l fp r ln t f [atderr , m I n i t a t r t e i not enough a t r t e Nd bytes) wlth which Co do jickr
ignored.\n0, n ) I r r t u r n Ichrr9)0t
1 r a n é t y p e TYPeOl r rnLdeg = Dm-O 8 r i n L a e p . SEP-01
1 e lee (
i t In l BiWlL.2)
el80
rrnd-type = TYPL4r r i n c d e g l Dm-41 rrnci-aap = SEP-41
l l
1 1 i t a t b l L(l(1ong *) rrg-atr tr l [ l j l i / * f i r a t loc r t ion ./ m o t r 0 C r t r t e I r a n é d e g l ~ l e m i t a i t r n h p t r bafora irrndom * / arrndom ( a i rd l i i t ~ r u i ~ t y p e == m e 0 1
a t r t r [ - 1 ) r r n A ~ y p e ; r l a e
#cite[-11 l HAX..TIPES * ( r p t r - i t r c e ) rand-typa1 re tu rn ( o r t r t r ) 1
/ * * arLat8CrI
Reatore the arace from rhr givrn acsce r r r r y . * Note; i t I r I m r t r n t thnt wr r!ao r ~ ~ r chr locrt iona o t the pointera * i n the current a t r c a intormrtion, and r a i t o r r t h r locrt iona ot chi pointers * from the o ld a t r t e information, Thia i a donr by ~ i u l t i p l a x l n g the pointer * loccrtlon i n t o ch i rrroarh nord o t the r t r t a intorrnation. * Noce t h r t dur t o t h r ordar i n vhich thingi, i r e don., i t i a 011 co c r l l * i e t a c r t r ( l with the auar # c i t a na the currant a t a t r .
Raturna l poinr r r C O the old n t r t e i n f o m t i o n . * I
i t ( r i n é t y p e == TYPE-OI atrce(-11 0 r r n h t y p s r
al80
k 19
i t s t e l - 1 ) tIAX-TïPt3 * l r p t r a ta te l * r r n é t y p o i TP awitch lcypel m ( c r i e TYPE-01
Z
came TYPE-1 i u
crae TYPL2: c rae TYPL3 i
x c r i a W P E - ~ ~ td
r a n é t y p e n typai
rand-deg l drgr r ra ( rypr j r ranci-irp 8 a .pa( typ*)~ brrrkr
cl VI
d r t r u l c t 0 t p r i n t t ( a td r r r , *ab t r r rce i a t b t r ln fo h i i b r u i oungdi not cbngrd . \nSl r C
l P
rrndornl I t rr r r a ui ing c h i c r l v i r l T Y P g O R.N.O,, juat do the o ld l i n e r r congrurn t i i l b i t . O t h r n i a r , wr do Our trncy t r inomi i l i t u t t , which ii chr i m i i n 811 t h a r othor c r i r i due t o r l l t h r globnl v i r h b l r a thit hrvr brui a i t up. Th@ b r i i c operation I i t o râd the numbrr r t t h e r r r r pointer i n t o t h r onr r t thb tronc po in tw. Than boch p o i n t e r i i r a advancd Co the nurt l o c i t i o n c y c l l c i l l y In t h r t r b l e . The vr lue retunied l a the a m grnerrtod, r d u c o d t o 31 b i t # by throwing rvny the * l r r a c ruidom* low b i t . Notai th@ coda takea rdvrntrge o t the t a c t t h r t both th0 tront and r r r r po in t r ra c rn ' t wrbp on t h r arma c r l l by not t r r t i n g the r r r r poincrr i f the tront one h r r wrippod. Rrturna r 31-bit rrndom nuinbrr,
long rrndomll (
long i l
APPENDIX B. C SOURCE CODE FOR CHANNEL MODEL
* AVTHOR l Kennith Chalmrrr l Vnivrriiry of Toronto
chr l~rn9mee~ . toronto .edu
tincluda citdio.h, tincludr cntdllb. h* #includr 'rard-spot .hg
int rrr<ipot(chrr *ipotfn, doubla** spot-a, int* rptlrn, int* overrrm) I
FILEm #pot-filri lnt ii doublr xi I* x value ot rpot rriponna - junt dincitded @/
I* Reid th* ipot lrngth rnd ovrrnqling factor * / frcrnt lapot,ti1e, '+\d\n#td*, rpotlen, overrmi I
I* Allocato nrrmory for the apot arrry *I *rpot,r (double*~mlloc(*rpotlrn l aireof (doubleil i it(*npot,r m= WLLl 1
fcloreInpot,til.t i raturn -24
1
If lfiof (rpot,filei i t
fprintt (rtdrrr, 'Primrturr end of rpot filrot 1
fclora(npot,filr) J rrturn - 3 1
1 1
rrturn 0i )
I* grunnian #pot lntrnnlty profilm ' I #include w d l o . h > @includr cmrth.h> @includr cmrl1oc.h~
double ipot [double tO, doublr dotaRata, lnt iri0lti. double delta, int ovrrnuiglmi
I* * Annuman nrnpling oncr p r bit interval (1ldrtrRnto ni)
t0 charrctrrlrrr Ilt-wldth of the gsunalui #pot profile, rprcltird in nn * .O. 150 nr l ditrRate in the dati rate ln )(bitrInrc * W. 27
1nIBiti ir thr n W r of (1-nidedt blt lntrrvrli thrt rra rttrctrd by ISI rp. 5
a
a Porwlr for Q&urrlrn #pot protllr ini a
e t(tt 12/ltOer~rt(PILiI r*p(-(Zatltb~*2) . * UODIPXEü Hiy 11, 1999 by Monnath Chrlmrrn * - Addrd drltr prruartrr to r l l w rlmlrtlng jittrr in thr drtr itrrim. * delta In r t i w otfiet rddrd to t In tha & o v e rqurtion for f (tt, uhich l rinilater jitter by offirttlng thr rrrponnr rlight1y * /
I doublr T, Ti, 't, *rarult, mltlactor, rxplrctori int nuinlirnplrii int centrri int ii
nun9unplrr ( ( 2 InlBItii) l 1) ovrrnrnplai 2 T (1 / dataRatel le31 / * &trLtr ir in Mbltnlrrc, T Ir in ni * / Ti TIldoublr)ov~rrrnpl~ I* Ovrtrunplinp frctor rrducrn iurgla prrlod * /
F !9
t (doubla *) mlloc (nucPSuaplrn rizrot (doubla) l h rriult = (doublr *) mallou Inumrlurglai rlrrof (doublr))~ '3
U crntri (ovrrnuiplr * iri8itr) i m
r tor (1 01 1 c nua!l.uplri~ itt)
tlij ((1 - centre) Ta) t drltri l e drltr rhifti thr whole rrrpnnr * /
oultPiccor 2 ' T / (CO rprt iPll11 I* T frctor infrrred *I
tr@r(tir rrturn rrrulti
Coÿglrtr ainulotion of a Vitrrbi dscrctor. wlth optional * quantization of the inpucr and al1 incarna1 data pacha. . * For qubntization, c w l l r wlth QüAKPxzhTION-ON dotinad 1i.r. * gcc -DQVAHFIZATICN-ON . . . ) I
AVPHOR Krnnrch C h r h r a
l I>rpirtmrnc ot Elrctricrl bnd Coriputrr Engineering Univrriity ot Toronto
* COPYRIOHT
Copyright 1999 Krnnrth Chalmari *
tincludr c1imlta.h~ Iincludr citd1ib.h~ bincludr catdlo. h> Oincludi ciiuth,h> tif drf inrdIqVWIUTION,OH)
Owrrning Qurntixitlon ii on dlncludr *vitarbi,q.h*
4alar Iwrrning Qurntixation Ir otf Oincludr *vitrrbi.h'
trndi f
/* Ure abrlditfl (L1 n o m ) initrrd of diftA2 In mrtric cblc. 'I ddrf in@ U 9 , D I F P
atatic BITn* aurvivori~ I * Survivor irquency m r y ' 1 atatic int aurvivor,lan~ I * Lrngth of survivor arpurncy mmry *I atatic BIT* drciaionar I* Butfrr to #torr declalon blti * I atrtlc int nul / * Longth of coda memory * l atrtic int nuiilatrtra~ / * N u h r of ititra in algorithm (2'nul *I rtbtlc SThTf' icstrl2)1 I* ûoubli-buffor for rtrtr rrcording '1 atatlc STATE* cur-atitrr / * Polntrr to currrnt itatr *I atrclc lnt nrxt,icrtri I* Indrx ot next atrci * / atatic B ~ ~ R I C * b r ~ c ~ c r i c i i I* Branch mtric viluri for rach ititr * /
I* Internai fwccion prototypri '1 int rcai INPW gl r int Ir-vrliLbrsnchlint #rat@, Inr brinchl r vold non~llxa,rtacer (voldl I vold rdvbnc4,auwivora~voidl r INPüT b r i n c ~ t r l c l l n t rrrtr, Int branch, I N W P gl I dlf detlnrdlneRQWEPTLTfST) int marge-drpthIvoldI i landif
* Initialitr Vicerbi dotrctor wirh ~ i v r n paraautorr
............. ............*.,.............................*.*........*.**.~ int rtart,vitrrbi(lnc iurvivor,lr~in, inc nuJn, BRANCtUiETRIC* branch-matricr,lnl t
/a Brrnch mrtricr * / brrnchgnrtrlcr - IBRANC~RICglcrlloc(atrtra, i i r r o f t B R A N C ~ R 1 C l ) 1 lt ( b r r n c b t r i c a == tRnL) (
fprintf (atdrrr, 'Errer allocating branch mrtric memry\n'l i exit 0) 1
1
/ * Survivor wmory * / iurvlvora l lBIT~*)cslloclatrta~, iiirot IBIT* ) ) i if (aurvivoro 8 . NULLI 1
tprlntf(rtdarr, 'Error rllocrcing ruwivor warory\n*l i rxltI5It
I
fprlntf(icdarr, *Ercor rllocrcing rurvivor mrmory bcray\n*)i rxlt(5I 1
I I
ID Daclrlon bit auwiry dacirioni 0 ~fllT*)crlloc(~trtri, airrot IBIT) 1 1 it Ideciaian8 -- Wl 1
fprlntt (atdrrr, W r o r rllocrting drciilon mrmory\n0) I
I * * Initlrlixa rurvivor aeqdmce mwry */
torii 01 i c atatrrr i *r) 1
/ * Hnrd-codrd Inicirl $urvlvor atitr vrlura * /
/ * Cleir thn reat ot rhr iurvlvor m w r y * / tor(j = 11 j c iurvlvor,leni jt*l
rurvivorr[l~[jl . 01
1 * Copy brrnch merrlcr
* / ~ ( b r i n c ~ t r l c i , brrnch-prtrlcr-ln, iireot l B R A N C l U E i R I C ~ rc~terl i
/ * Mile. P U M @ C W l ' / n w t r t e i - itateit l * N w h r of tre1111 itrtii * / nu = niclni / * Conitraint length * / curgtrtr - itrte[Ol; I * Current rtrtr itorrgr lvhlch butfrr) * / nutc~icrcr - 11 / * Nixt rtrte bu!tsr * /
rrtum li 1
vold tlnlr~vltrrbl0 (
int I I
1 * * iirnory drillocrtlon * I
I* mciiion bit itaoty '1 trerldrciiio~l i drcliloni r 01
/ * Currrntlnw rtrtr rcorrge @ I torli 01 1 < I I le*) I
free(itetr[l~l i rtrtelil rn 01
l
BIT viterbl lINPUT g) t
Int ihorteit; )If d a t l n t d l m o ~ e P T H - m l
P I U * fl Bendit
/ * Pwtora rdû-ccrnprre-ialact oprrrtion lor rrch rtrrr @ / ihortart = aci(gli
/ * ùitput final bit rrlrctlon * I return rurvivorr (ahortoit] [eurvivor,len-111
1
Inc rcr(1NPUT g)
mhTE pl, pl, pqiini int ihorcrit, II rtstlc int t - 0 i
I n Md bruch mtrlc to itrtr œrtric to git prth oatrlc * I l t ~ l i ~ v r l l ~ r r n c h l l ~ ~ ~ , LUI 1 (
pl - cus~trtr(l~b1l 4
b r e n c ~ t r l c i l ~ j l , 1\2, q ) 1 1 d i e
/ * If noc a vrlid brrnch, iet It to -1nflnlty @ / pl = 2000000~
I * Ai rbove, for th* comprtlng prth * I If llr,vrildJxonchl litnuqicatrr)b>I, LIll l i
bit &et ined(De8WI) 1
C-r
int brrnchvrlld fi,vrllQgrrnchll>>l, I U ) ) ( Ii,vrll~ruich((I*nuqicrcrr)>~l, O Cn
1 if lbranchvalidl (
tlt drtlnrdlQUANTIZATIONWONJ prlnttlg\2d it5dl t U O d U 0 d 1 U 0 d \10d *,
Irlir prlnttIbb2d (t5gli t10,dg blO.4g I t10.Q~ U0.4g * ,
Lendit inc ii,vallQPranch(int atrto, int brsnchl I
la Usa -9999 tlag to indicatm an Invalid brsnch - HOT SAPE in gsneral, but worki for thlr opplicrtion '1
raturn b r a n c ~ r t r i c i (itata] .matrlc,valuo(branch] 0 -99991 l
lm Selact operation: dotamina wliich pach rurvivrr '1 ltlpl < p2)
Im Record rtata irlrction tor thla rtatr 'I etatb[nrxt,icatr][i] = pli dbcialonn[i] - 01 il (pl < p A n ) (
p ~ i n pli ahortort . i l
1 1 rlrr 1
rtstelnrxc,atatal [i) = p2i drcisionr[I] 11 itlp2 4 pain1 (
p ~ l n p21 rhortrrc 11
) )
1
XNPVT brbncbitrfc(lnç itoca, fnt branch, I N W T el 1 #lt d e t i n o d l ~ S 9 I P P l
rrturn (INPVP)(tabr(g - brmc~trlc~[itrt.).~~tric,valua(bruich~Il~ #rlie lm N o m l bruich iiucrlc crlculrtion '1
rrturn (INPVF) [iqrlg . branch.~nacrici[rtatr] ,matrlc,valul(branch] I l i lendit 1
Statr nomlirrtion, to provent ovartlow m m m m m m m m m o m m o o m m o m ~ m m m m o e m m m m e m m m m o m o m ~ o m m a m m s ~ ~ m e m m m o e ~ m o o m m m m m m a m m m ~ m m o ~
void normalizr,rCatrilJ 1
STATE pjini lit drtinrdlINTE~SIZpiTEST)
1. And WB rtylr nornuliration * I
i**J I o Switch to n w otata * I cur-etate . rtato[nrxt,statel i nixt-rtato ^- 11
fprlnttlecdrrr, 'Warnlngl l
h l i r Im Plnd tha minimum itatb value p d l n cur~trte(0) j
C SOURCE CODE FOR CHANNEL MODEL
* ThIr progrm taksr In the brrnch mrtrlc valuri and chsnnil dota srrian * froa the DM rend c h r ~ e l rimlation, uid uiri r Vitrrbl drcodrr
rimulrcion to rr-gcinerrta thr orlglnrl chU'UI81 Input In th# preaance of * a umr-controllrd range of AHQI SNRa. nie rrrulti ara cwparad to D
retrrencr tlla and the tinal BER 18 output *
puentiracion Ir turned on/olf by havlng the QUANUUTIOH,ON inscro * drtlnd at ICOYPILE TIYEl * * AVrliOR * Krnnmth Chrlnrrr
üepartornt 01 elactricrl uid Coagutrr Englnrarlng * ünivrriity 01 Toronto * COPYRIGHT
Copyright 1999 Kenneth Chrlnrri I
#If drtInodlguANTIUTI~ûN) hrrnlng Guuitlraclon Ir on IIncludr 'vltrrb1-q.h' Ilncludr ' Q W I ~ ~ Z ~ . ha Idrtine &Uln 1 4 I* -1,O for 1 #tata '1 (drtlnr QJllGH (-(QJUf)) / * Synrnrtrlc rbout x u<Ii * / Int LBITSr
lelre twrning Quuiciritlon Ir olf lincludr 'v1trrbl.h'
land11
lincludr *noIrIfy.hg Oincluda *pruno,trillir.h* lincludr .rddJItcer.h*
ldetine SLICB(x1 ((x) ? O 7 1 I 01 / *ldetlne UTüîCY~TBT*/ I*DdetIne OaiJZPsI I* Gonerate rat los ictutl WD dath lllr ' 1 /*(deilne N O , P M 1' No trrllir pninlng ' 1 tdet lnr JITI5t-OH / * Timing j1ttrr lnolir rourca) * /
I * Functlon proCotyper *I Int uinllnr rc, char*' rvIi Int VltTrrt(chu* M n , chrr* datrln, char* rriultrfn, char* l m l g h , doubla SHRStrp, doublr jittrrsct, int qbltr)i Int GatBrrncN(atrlci(chir. bah, BPANCHJ1L?RIC** ba)r double inr-crlcldouble* norunl, double' nolay, Inc lrnli
* naln encry point * /
Int ~ialnlint oc, charh rvl (
int pblcrt
Int chi
prInrf('HirnIng1 Output filanine rnmr rr an input file lbrrnch artrlc or dacri ,\ne
return VltTtrtlrvlll, rvll), rvll), rvl4J, rtollrv(S)l, rtof lrv(6]), rtotliv(7l), itof IavIaI I, qb1tiI I
rrlfn, doublr SHRLcw, doubl )
/ * VltTert~
* Vitrrbl critbad. Runi Vltrrbi dacodtr on a drtr lllr irvrr rerulti. * /
Int VitTrit(chrr* b f n , chrrb drtnfn, chars rrrultrln, char* rrltn, doublr SNRLow, doubla SHRnigh, double W c e p , doubla ~ittergct, int qblta)
( PILEa d s t ~ t t
f a P l u b ~biultb-tj PILea rd-fi BRAHCHJ@TRICa bi doublrm d a t ~ s l doublr* noisy-data- doublr trur-inrj int* rrt-il Int nuiurt~ int nuutitrri rltr-t numrrrdr INRJT inditri int outdrtii int vlt-lrtrncyj lnt rlicclrtrncyi int orrcount 0i Int ilicrrrr = Oi
I* int rrtvrl~*/ Int drtr~irri doublr inri Int count = 08 lnt ii lnt nui Int iurvlvor,lrn:
I * Input data tor Vltrrbi '1 Output tile !or rriultr *I Ib Rrtrrbncr t11r lorlginsl dstr itrraml for compsrlron '1 / * Brrnch srtrlc rrrry a / 1' Arrry ot lnput drtr for Vitrrbi *I
.ri I* Arrry with nolry vrrnlon ot datpr *I 1' Cslculacrd ÇNR rttrr rll imprirnrnti rppllrd ' 1 la hrrry ot rrfrrbncr loriglnrl data) vrlurr *I In Count of I ot vrluri In rrf,r * / le W r r of rntrlri ln brmch metrlc rrrry */ I* Nuber of datr itou rotually rrrd ltllo iirr chrckl *I In Input to Vltrrbl drcodrr -1 I* Output t r m Vitrrbi drcodrr *I 1' tcitrncy ot Vitrrbl drcodrr Ilor compiriroru) '1 1' Lntrncy toc rllcrr *I Ib Error count ot rrrultr va, rbtrrbncr tilr '1 /* Error count for riwlo ilicrr * /
la Rrtrrrnci vrlur rrad lron rit. tilr '1 Io Slar ot drtr tllr *I I* Currant SHR in loop *I In Count ot I ot comprrlsoni (output vs. rot) donr '1
1' Conrtr.int lrngch of Vitrrbi drcodrr In hngth of rrsvivor abpuonce mrmory *I
* rriultr-t = (PILEal fopon(rrrultrIn, 'wt'l i * I f (rriultr-t == N W L ) * [ l prlntt('Errori could not open output drtr tllr '$s'\ne, risultatnli a rrturn 51
* J *I
#1t drtinbdlQiJAHFI7ATIOK.ON~ I* Strrt pumtlrrr Inuit br rtrrtd brtori rradlng brinch artrlcrll) */ quant-rriit (qbltr, PJXnI, QJllOHI J
rrndit
In Rrrd branch mrtrlc fila
*I
It((nu OrtBrancMrtricr(btaln, Lh)l =- -1) roturn 51 In -1 rrturn by O N sirni brror */
In C~lculrtr thr n-r ot strtir, 2 % ~ * / n w t r t r b 1 *< nui
In Crlculitr mrrgr dopth rnd lrtrncy brrrd on conrtrrlnt lrngth * / iwitch(nu)
crrr 21 rurvivor-lrn 151 vit-lrtmcy = 121 la Por 10 bitr ot input data ISI *I rllci,htoncy vit-lrtoncy-111 /* For 10 bitr ot input date ISI
brrrki
Cr80 31 rurvivor-lrn = 25; vit-lrtrncy 221 lm For 10 bitr of input drta 191 '1 i~lcr,lstmcy vit-lstbncy-111 I* Por 10 bits of input data ISI
brerki
corr 4: la For 10 bits of input drta ISI '1
l e Note changd valurr tor trrcobrckl Won't m r k with rrgbxch any sorrl *I if Ir- == TWIBACK) (
suffivor,lon r 271 I* a litrncy (2kIlk-1) a rurvivor-lrn II * I
I* For k = 3 *I Iavit,latrncy ilaru~lvor-lrnl t 111/
la Por k 4 '1 vlt,lrtbncy l8*ru~lvor~lrn)II 131
la Originhl data uroâ to dlrcovrr rbovr tomulrr *I I a v t 1 t n l a Im For k Il ru~Ivor,lon 16 '1 I*vlt,lrtrncy 77ia1 / a For k 4, iurvivor-Lon 24 'I Iavlt,lrtrncy 851*/ In For k 4, iurvlvor,lrn 17 */ I*vlt,lrtrncy 91i*/ /a Por k 4, rurvlvor,lbn IO
1 Ilicr-latrncy = vit-lrtoncy-111 l e For 10 bitr ot lnput drtr ISI
brrrki
cria 51 crsr 61
iurvlvor,lrn 101 vlt,lrtincy 171 I* For 10 bitr ot lnput drtr 191 al rllc~lrtrncy vit,lrtrncy-111 I* For 10 bltr ot lnput drtr ISI
brreki
Cbib 7 1 ChIl 81
rurvivor,lrn = 301 vlt-litrncy 271 la For 10 bitr ot lnput data ISI '1 rlic~lrtuicy 8 vit-lrtrncy-lli / * For 10 bltr ot input data 1.91 '1
brriki
crrr 91 rurvlvor-lrn = 401 vit-lrtoncy = 341 ilicr,lrtrncy vlt,lrtincy-118 I* For 10 bite of Input dita ISI
brrrki
cri. 101 iu~lvor,lrn = 501 vit-lstrncy 441 illcoJrtuicy vit,lrtrncy-lli I* for 10 bitr ot lnput ditr ISI
briiki
casa 11i cria llt
rurvivor-lrn = 501 vlt-litrncy 431 rlicr,lrtrncy vit-litrncy-111 In For 10 bit1 ot input drta 191 -1
briakt
CBiO 13: csar id:
rurvlvor,lrn = 601 vlt-latrncy 52) ilicr-latrncy - vit-latsncy-114
brraki
ditault~ tprlntt(itdrrr, 'Unknown # of stotar ad, no latency data, aborting\nm,
nwmtataal r rrturn 51
1
Iit Idrtlnrd(N0,PRUNE) / * Prune the trrllle for run-length lliait violation8 * I prunr,trrllli~bm, nu, 211
Iindit
tprintt(rtdarr, 'nu a td\n*, nu) I tprintt(itderr, *numrtatri = td\n*, numitatrsli
ait drtined(QUAHTIUTION,ONl tor(i Or i + numitatrir
tprlnttlitdrrr, * # b d ~ 111li h l r a
torii 01 i nunutateai tprlntt(rtdrrr, ' @ td:
1 trndit
Raad ritarencr data tllr * /
( printf('Error~ could not open reference tile '@il\n', rrttn)~ rrturn 51
I
/' Allocata dalault rifarance tilr riz* ' 1 rat-a iint*)~lloc~ilxrot(lnc) 100011
/ * It wa'va tillrd mrmory, raallocata with m r r spacr * / Itlnumrrt t 1000 -i 0)
ref-a (int*)reallocIrat-a, iiraot(intl * 1000 (numrat11000 1111
/ * Clone ratrrince tcloialrrt,f)~
/ ' Rend input data
* /
tlla * /
tlle
1' Rrad in channe). data - note blnnry fila rend * / data,< = IPILE*] topanidatafn, *rb*l i lt(data,f -= iiULL) 1
printt loError; could not open lnput data fila 'ts*\nmi datatnl i raturn 51
1
1' Allocata arrry tor input data '1 date& (doubla*~mlloc (elziot (double) dataritr) i It (data-a =- WLLl 1
printt('Not anouph mamary Cor input array\n*)l raturn -11
1
/ * Read rrray * / numard - trrad(dat~a, iixrot(doublal, dataiira, datn3l i itlnumrrrd I= dataairal 1
printt('Errorl Data tilr truncstrd.\na) i rrturn 51
1
1 * * Start actual Vltrrbi tait ' /
1' Allocatr mamory tor noiry copy ot input dnta * / nolsy-datca (doublr*)~lloc Iriiaof ldoublo) dataairi) r lt (noiry-data-a m- NüLLI 1
prlnttI0No mrmory tor noiiy drta\n*)l raturn -1,
1
I * Prlnt the currrnt SNR to atdarr (ilmgle action diiployl * / tprintt Irtdarr, 'Im\n*, rnr) r
I* Hakr a copy ot the input array * / msmcpy(noisy,dat~a, data-a, airrolldoubirl . dstsilrm)~
I* Nolilty the copy accordlng to the currant 9NR ./ noioltylnolry,dat~a, datarira, s n r ) ~
/ = Calculsta trur SNR * / crue-anr inr,cnlc(dat~a, nolry,dnta,a, dataslxrli
1. PEBUOI Print out firit 5 dstalnoiry valuai * / I ' . torll = 0) 1 4 51 i**)
APPENDIX B. C SOURCE CODE FOR CHANNEL MODEL
- U LIU - - . Y 4 4 5 ..i.YY
U , Y . e r Y U - . C C L i -- P
1 A
O Y
3- V I
O U I O U I O . Y
fclocr ( W f J rstum -1i
1
f o r U 8 01 1 nuaatrtrri it*l (
it ( i 0 0 ~ l ~ t ~ l l
printf I'Error: brurch artric tilr ii truncrtad\n*l i frra(*h)r tc1oir ( k t ) i rrturn -11
1
I * Clona the bruich matric fil* *I Iclor.(Lqtli
raturn nui / * Succaratul w i t * / 1
doublr rnr,calcldoubla* normal, doubla* noiiy, int lrnl l
doubla noiir, rig,tocrl, noirr,totrl~ int ii
rrturn 10 ,O * l ~ 1 0 ( e i g , t o t a ~ l n o i i r ~ t o r r l ) i 1
1 * * zn1.c * * A trro-rnmory nonllnrrrity (WLI functlon uird to inrroducr nonlinerr
diatortion inta thr DVD chbnnrl niaulrtion. b
REPeREHCES Huang, 1 ,s . and Lee, Y.H., 'Partial R~sponsr Quolirrtion with
* N~nlinbrrity CoqFImrtlng Signal hiyniatry in Wü Storrge*, in Opticrl OIra Storrgr ' 98 , Shigao Kubotr, Tom D. Hiltcrr, Paul J.
* Wrhrenbrrg, Edltorr, Prociadingr of SPIE vol. 1401, pp. 96-102, 1990. * ' A W O R
Krnnath Chalnbri Dapartmant of BlrctrIc&l and Coiqpurrr Englnriring Univrriicy of Toronto .
COPïRIOIFF * Copyright 1999 Krnnrth Chlirrr * * /
I* Slaulation pbrmatari * / tdrtinr ûNK41 0.597 IdifIn@ WMA2 -0.456 tdrtlna Hl 1.313 4dbiInr Hl 0,642
doubla tnl (doubla val)
roturn ALPHhl * (ALPHA2 * vrl) t BETAi*l Ji(vrl - W 1 ) * BETM*lbbslval 1
Appendix C
VHDL Source Code
APPENDIX C. VHDL SOURCE
----- C E P C -
---- - d C I Y I 0 P ---- c c c c a -.-.4-.
d d d d k m . . . V V V V I
-- Architecture declsrstion architecture hap-atruc O! ixng in
c m o n a n t taq-block port ( b, input r in INPVT-VeCPaRi clk, rraat I in rtdJogici rriult t out INPUTeVFvE(.roR
) 1 and coPponrntj
-- rimrl bolaigi -Yi rimil input-iigi I N P ~ T J E C ~ D R I -- iignrl outputa,rig~ B R U I C ~ l C J R R h Y i
k g i n SEQI procrir(olk, rraetl k g i n
it rriat = '1' thon input-slg <= conv~itdJoglc~vector(0, INPUT-SIZE) 1 . - for i in O to NUN-BH-1 loop - - outputa-alg(il <= conv,ithlogic,vrctor la, INPUT-BIZE) 1
a - haig(ll <a c o n v ~ ~ t & ~ ~ l c ~ v i c t o r ~ O , INWT,SIZL) I -- and loop~ elrif riaing,dgr(clk) than - * imL1ig <= hi
input-rig c= Input I -- Raglater outputa .. - output8 <* outputa,rig~ and if1
ond procraij
bQQi tug-block port cnap IhlO), input-rig, clk, rrart, outpucii0)) 1 b O 1 1 iang_block port cnip (kP(lI, input-rig, clk, raiet, outputsll)) I bdli hgJ110ck port m p (hll), input-dg, clk, rraet, outputalll) I W l t bmg..block port mip Lbrnll), Input-aig, clk, rrirt, outputa O l ) I M O I hsg..block port m p Ih(4), input-aig, clk, rrrrt, outputi(4)) i hm31 I img-block port m p Ibin(5), input-rig. clk, rrrrt, outputr ( 5 ) 1 I ha401 bm((,block port mrp lbin(61, input-rig, clk, rrirt, outputal6)lj bai411 iang-block port mrp l W 7 ) , input-aig, clk, reart, outputil7)l I ha501 Lxrg-block port m p lha(61, input-rip, clk, rrart, outputr(6)) j b60i bmp-block part m p (tai(91, input-aig, clk, rrirt, outputa (91 I bu1101 hqJlock port m p Iha(lO), Input-iig, clk, rrrrt, outputi(l0))i Wl: ImgJAock port m p (bs(ll), input-rig, clk, reiat, outputi(l1)lr
and hrg,itruc~
contigurrtion bnip-config ot h g la Car brag,rtcuc - - for rlli bmg-block uia configurstion work.bmgb,conflg~ and tord end torr
a d bmp-contigj
-- Biiic building block (one Inpucl of the brinch mrtric grnarotor * - -- ArnOR - - Kennith Chalmrra -- üopirtment ot electticrl and Couputec bginrering -- Unlvaralty ot Toronto - - -- COPYRIOi[T -- Copyright 1999 Kannath Chrlmarr. - - -- REVISION HISTORY .- Pnb 03, 19991 - Crrrted tila a Hrr 18, 19991 - Chrnpod to rdâ on8 axtri bit CO prrvrnt ovmrtlow, - - Circuit prriad taitbanch trac. - - Apr 07, 19991 - Ranimi trom h g b l o c k co hag-block -. (ihowi hslrarchy battrr ind ririor to typa) -- Apr 17, 19991 - Chwgad output trom IHPeRNA4,MCIOR to INPUT-WCIY)R -. to flx Crdanca cynthrair problom - - b y 24, 19991 - Md04 coda to regiatrr outputr, rr par Synoplya
auggratlodr (blua bindrr p. 4-13). Notr chic t h h a- inarariar thm lrtrncy of thm antirr circuit by l.
usa work.globilr ,rllj usa irra,rthlogic,ll64 .fil11 Ur@ ierr,rt&logic,srith.~ urr lrre, nthlogic,rignod.rllr
-- Entity declrrition entity ixagblock Ir
port
bmv, input I in INPVT,VECTORI clk, riart I In atdJogic~ rriult r out I N W T , W R
I r and tug-blockl
- - ArchitecturL drclnrrc ion nrchicmccure boipb-bohrv ot tug..block ir
iignrl Lmvgig, inputbig. raault~lgr at&logic~vector~IN~~9IZe downto 01 i bagin
SEO: procrirlclk, rriat) M i n it rrirt '1' then
rrrult <= c o n v , i t ~ l o g i c ~ v r c t o r ( ' 0 ' , INWT,SIZE) i alrit rirlng,rdgm(clk) thmn
rriult <= rrault-bipiINWT,SIZE-1 domto O) 1 end Iti
ond procriai
rmrult-big <= rbrltauv-big - input-big) 4 -- rriult <= rraultJig(1NPVF-SIOR-1 downto 0 ) ~ end bmgb-bahovj
-- Contiguration daclaration configuration bmgb-contig ot bmgJlock Ir
for &ngbJmhav and Lori and Wb-canfigi
-- hmi * - - - Branch mitric storego unit for WD Viterbi director. This unit hsndlri -- the raiat and SCM-in ot branch mtric comprrison valuar. It lordi -- a rat of drfaulti on rriar, and allowr s c m in if rcarLbh ir high during -- normal oparacion (I1d prrfer rcanning ln during crier behaviour, but thii - - han cauird ifma problmmn, A t i x w u i d ba lovaly). - - -- M r m O R -- Kennath ChiilfMrr -- Drpirtmrnt ot Elrcrricrl and Cmiputrr mginrrrlng -- Univrriity ot Toronto - - -- C O P Y R I W - - Copyright 1999 Ainneth Chalmrrr. -- -- RKVIBION HISlVRY - - M y 17, 19991 - Crsatrd fila library ireri
uis work.globali.allr uir Irrr.rc~logic,ll6(.alli
-- Entity declaration rntity kar Ir
port (
input I In I N P W E C M R i icnn-bm. -- Plagi 1 w icbn ln brinch marrici, O a normal op.rstIon clk, rriit I in rtLlwici h o u t IOUtBKARRAY
J end h i 1
architrcturr knrjtl ot brPi Ir iignrl b ~ v a l i t U U î U U Y i iignsl c1)tscuit rt<loglci
bbgin -- If rrirt Ir high, rcan ln branch mrtricr rhrough the input porc 81i9CAN; procrrr (clk-ican. raaitl h a i n
if reiat m '1' thon -- ast ditsuit braneh lartrica lm-val8 <m branchmetricii
elrif Ir1ring~rcîgslol)tscrnl) thon
-- Scsn in a nm branch mrtric value, ripplr tha rost d o m the chiin for 1 in NUICBII-1 downto 1 laop
~ v a l r l i ~ 2= bipvalrli-111 and loopj bq,valr(O) <= inputi
and Itr end proceirl
-- Contigurrtion deciaracion configuration bmr-contlg ot kai Ir
for tua-rcl and fort and bmr-conf igi
Clock doubler. Rquirrr two out-ot-phare clocki ai input
AUTUOR Kenneth Chrlrtars Dapartaunt of Eloctrical and Ccmputrr Enginaering Univrrrity of Toronto
COPYRIrn Copyright 1999 Aenneth Chalmrrr,
REVIBION HISTORY M y 24, 19991 - Crercad tila
-- entity drclsration rntity clkdbl ir
Oor c
iel, olkghil, clkphi2; in stàJogici c l k o u t ~ out rtd-loglc
1 1 end c l w l r
architicture cllt-dùl,rtl of clkdbl ii b w i n with #al rrlrct
clkout e= Icli~&~hil xor clkphi2) whrn 'l', c l b h i l whan otherrr
end clldbl-rtll
-- Contiguration drclaratlon
configuration clk-dbl-contig of clkdbl 1s for clk-dbl-rtl end torr
and cl)Cdbl,conflgr
Olobal constants for urr In th. Vitarbl drcodmr
AVIHOR Renneth Chrlwri Dopartmant of Elactrical and Cornputer Enginorring Unlvmrslty of Toronto
COPYRIUKP Copyrlghc 1999 K r ~ a c h Chalmrrr.
REVISION HIGTOAY Feb 03, 19991 - Crertod fila Mar 16, 19991 - M d r d iubcypoar
INrn_VECIDR, IUrERWM,VECTOR )crr 17, 1999: - M d o d typma~
INWPJRRAY, WUJIRAY, BRAHCKHfTRI CARRIIY, DK!1SIûh'JFMY, PATHMTRICJMOAY
Uar 2 4 , 1999: - hddrd conatantri NVKBX, NVKDEC, NUICPH, SHUBEPTH - M d r d typrrlnubtypasi SIIU-VEfTOR, SWU-WTJRRAY - M d r d BIUNCIL)[LTRICS
Apr 27, 19991 - Changed type of B R A N C i U ï ~ R I C ~ Y Co INPWT,\IECPOR f rem Itfl'ERNhL-VECPOR - M d e d typa BiiA-IWeRNM. qulvalrnt ro old B R M C H - n L T R I C r n Y typo
librrry Irari uir Iera.rtdJoglc,ll64,011~
pnckagr global6 11 -- B i t wibthi of inpuci snd incornsl linma conitanc INPüF-SIZEI intbgir :* 51 conitsnc I N T ~ - 8 I Z E i Incogrr I = 61
-- Uirful rlro counti constant ~~: integrr I = 121 -- Numb.r ot idgbr In crrllir conrcanc -D IX: lntogar r u 41 - - Numb.r of drclrion bits rcquired conitrnt NV)CPnl incrgrr 1 - 81 -- HuaJHr ot strtra in trrllir -- Survlvor umory conatrnt W - D E m : lntngrr I - 2 5 1
-- Vrccori uiing abovo wldthi rubtypr INtWWrvw.pOR Ir rt~logic,vrccor (XNPVT,SlZE-1 downto O)#
aubtypa IwERN&-M:C~K)R Ir sc&loglc,v~ccor I I ~ E R W A L S I Z P - 1 d o m t o 01 1 rubtypr Sm-VECTOR in oc~logic~vrctor(O to HVICPII-1) 1
-- Uarful typer for lnput and lntarnal buiei typo INPVT-ARfIAY la nrray (O to W K P n - l I of INPUT-VECPORi typa B).CARRAY i6 arrny (O ta NUtUW-ll of INPUT-VECToRi typo BRANCliJETRICfiMY ir nrray 10 to NIRCBI(-1) of INWT-MCPORi type RJfLIttTERNAL ir array (0 CO NVKBI(-1) of fKFERNAL,MCMR; iubcypr DeClSIcalNWY la rtLlogic,vrccor (O ta W E C - 1 1 i typa PhTîWZRICJWORY Ir array 10 to NUILPN-1) ot IKTERNAL-VRTORI typa S W - W M Y in rrrry (O CO m - ~ ~ r n - t l of s W - ~ R I
-- Actual rxprctrd valuri for cnlculatlng brrnch metrici conicanc branch-mrtricii BMJRRhY I = I
*00001*, -- Btata O, branch O *OOlOO*, -- scnto O, branch 1 0 1 0 1 1 -- Stace 1, branch 1 *1010Om, - - BCatb 2, brrnch 1 'l100Om, - - S t a t r 3 , b r a n c h O 1 0 1 1 -- Btnts 1, brrnch 1 *0010Og, -- Btacr 4, branch O 0Ollle, -- Stara 4, brinch 1 Ol0lle, -- Scnto 5, brrnch O *10100~, -- Btata 6, branch O 1 1 0 1 1 -- 8tnce 7, branch O 1 1 1 0 - - Iitatr 7, brrnch 1
I t
-- Survlvor mrmory unlt. 8ror.s individurl bit declrions for a11 -- pathn, rllovlng output ot daeodod path. -- -- AüTHOR -- K o ~ r t h Chrlmrrs -- Ikpsrtmant of Elrocrlcal and Comguter Enginerrlng - Univaraity o t Toronto - - -- COPYRIOHT -- Copyright 1999 Konnoth Chrlmora, -. -- RINISION HISTORY -- Hsr 23, 19991 -- Crratod tllr -- Mrr 25, 19991 -- (Hopoiullyl tixrd init vrctor. R d l y nrad to trstl
urr work,globnli.rllr Ur0 i o e r , a t L ~ ~ i c ~ ~ l 6 4 . r l l ~ urr irro,rtLlogic,arith,rll~ urr irro,ic~logic,~ignrd,alli
-- mtity dsclrrrclon
P 'CI 'CI
ontlty rmu Ir port t
drclnionr t in DECISIONMRAYl clk I in itCloglci out-bit :outitdJogic
I l end 1mu1
-- Architecture drclsration archltwturr r m ~ r t r u c of imu in
cmponont na\cslIca port
inputr t ~~SI(U,VECPORI docliionst in DECISIONNMYi clk r In rtClogict outputa I out s n u - m ~
I l end componrnt~
8 lgnrl out-rig I ~ , O U T J R R A Y ~ rlgnal Inici S)(U-VEÇMRI
W i n init <= *01110001~~ -- Bpaclal vector, Iiighly drpendrnt on pruned trrllii rmur01 mu-elica port mnp [init, drcirionr, clk, out,rig(O))i
QEHI for i in 1 to SI(VJEi7H-1 grnaratr rmuri rmu,rlico port mp lout-ilgli-l), drcirlonr, clk, out,rig(i))l
end grnaratai
conflguratlon 8-confie of .mu Ir for r m ~ r t n i c -- for a111 m i ~ i l i c r uae configuration work.imur-contigi and lori end torr
end ra~contlgt
- - Onr rlice ot th0 iurvivor m w r y unit. Prrforms multiplaxlng input - - to roglrtrri tor thora wlth multiplr inputr. -. -- A m D R - - Kbnnrch Chrlmeri, Univrrrity ot Toronto - - -- RWISION HIS'NRY - - U r 17, 19991 - Crrated file - - Mar 23, 19991 - Updatrd rntlty vrctor nitr8 to urr nrw conrtsntr - - tram globalr.vhd1 - - )Irr 24, 19991 - Rmmovod Of f-iiaii componrnt, now jurt uns Interna1 . . procair (rhould luprova a u t m t i c rynthirli) ,
- - Apr 06. 1999 i - R m v 8 d mun-smur componant, jurt inllnr al1 the with - - rtstbawnti (cutr d o m on # of componrntr, rhould - pinkr rynthrrir fritarlrsrler) -- Apr 07, 19991 - Rsnambd trom rmu-ilicr to r m ~ r l i c r - - Irhowr hrlrsrchy bettrr nnd rri1.r co type)
ure tmrk.globalr.olll uib irrr.rt~loglc,116b.a11~ ura irrr.st~loqic,arithha11 I une i~re.rthl~lc,~ignrd.all~
-- Pntity declarition ancity rmu-rlicr 11
port I
inputr : in Swu,VEClorii daclrionr t in D E C I S ~ O ~ ~ Y I clk I in rtQlogiol outputr i out BIU-VPCPOR
I l end rmu-ilicai
-- Archlcrctura drclrration
with docislonrlll rslrct muxl-out s- inputrl0) when 'Oe,
Inputr(0 whan othrrii
wich drclrionr(2) rrlict anutl-out <= inputii3) whan ' O * ,
Inputi (7) whan otharr 1
with drcirionr(3) rrlect mwt3,out <= Inputr(3~ whrn 'Ot,
InpuCa (7) whrn othbrr r
S W I procori(c1k) brgln it riiing,rdga(clk~ than
outputs(0) <= RUXO,OU~~ outputrll) <= ~iuxl-out/ OutputalPl <a lnputrlll I outputr 131 <= lnputr (2) I output~14) <w inputr(5)i output8 [SI <a iriputr 16) 1 outputi(6) s r inix2,outl outputr (7) cm ~w3-outi
and If! and procoiri
-- Contiguration drclsrncion
configuration emue,config of cimu-elica ia for mus-etruc end for$
and mnua-configr
-- viterbi - - - - Tho Vitarbi detector. Actually jumt a design connecting al1 the - - various piecei, defined elsawhere, togerher. - - -- AUI'HOR - - Kenneth chalmers -- Department of Elactrical and Computer Engineering -- University of Toronto - - -- coPyRIam -- Copyright 1999 Kennath Chalmari. - - -- REVISION HISTORY - - mr 24, 1999; - -- Apr 05, 1999: - -- May 04, 1999: - - - )(sy 23, 19991 - -- Hay 24, 1999r - - -
-. - - - - Jun 01, 19994 - - -
Created fils Due to re-rhuttling, uie AC8 initead OC ACSU Added acan nignal inputritoutputa Added clock doubler Hoved clock doubler to new filea Ines clk-dbl.vhd1 and vlterbi,cd,vhdl). Cleans up thin demign a bit and airnplifies Gynopsys iyntheeis (mynth thim, ist,dont,touch, synth vitorbi-cd).
hdded reginters and scan-in for branch metric - allows dynamic chanying of branch matrici. Ramoved output test-no - inteprate mcan out with output. Created component h s , and movad matric acan in thora, Rmoved test-mi and toit-so - they were meising Synopiyi up whan the acan c h a h waa addad ai part of a larger derign (i.0. viterbi-swlng.vhd1). Check out viterbi-standalono.vhd1 Cor one rhat can by aynthasizad by itaalf
library ieeel
use ieee. itctlogic-ii64.ailt uae ieee,mt&lwic-arith,alli use ieee.st~logic,un~ignad.allj
-- Entity declsration entlty viterbi 1s
port (
input I in INPUP-VE€TORr rcanJsn, -- Plagi 1 - scan in branch mstrici, O r normal operation clk, resst 1 in atd-logici outputt out etdJogic
) i end vicerbii
-- Architectura daclaration architecture viterbi-atruc of vitarbi is
cornponant ùnn port (
input 1 in1NPüT-VecIoR1 ic~,bm, clk, rerrt 1 in stdJogicr h o u t 1 out BHARRAY
i r end componenti
component hnp port
input ; ln INPüT,VEC?QRi ba I in BCLARRAYl
olk, ronat I in sthlogicj outputs I out BiIANCHJieTRIC-ARRAY
) I end component i
coaponant &Cl port (
ba olk, rosat decimionci
l and componenti
cornponant m u port (
decioionm olk out-bi t
) 1 end componentt
i in etdJogici I out DECISIONJRRM
signal k v a l m : B W R A Y i mignal hg-out; BRANClIJETRICJRIurYi miqnal acs-out; DECXBION-ARRAYi
bsgin -- Branch metric utorage mnoger (allowm ican in etc.) la11801 bms port map(input, s c a ~ h , clk, resnt, &vals)
-- Branch rnatric genarator h g 0 1 bmg port nicip(input, km-valn, clk, resat, bmg,out)
-- Add-compare-select unit acio~ acn port map(ha,out. clk, remet, acs-out) i
-- Survivor rnemory unit m u 0 1 #mu port map(aai-out, clk, out put)^
end viterbl,itruci
-- Configuration declaracion
configuration vitirbi-contig of vlterbi La for vitarbi~truc
-- for allr birq uae contigurrtion work.hag,contlgi end tori -- for rll: rci uar contigurition nirk.rci,configj end fort - - for 811: mu uir contiguratlon work.imicconfigl uid tort end fori
end vitrrbl-contigi
-- viterbl-cd - - -- Thr Vltrrbi drtactor wlth clock doubling. - - -- A m o R - - K m e t h Chrlmrr - - Doprrment ot Eloctrlcrl and Couputrr Enginnoring - - Univrtaity ot Toronto - - -- COPYRIaHT - - Copyright 1999 - - -- WISION HISKlRY .. Ury 24, 19991 - - May 11, 1999; - - Ury 31, 19991
- Crrrtd film - nodifieâ to rrflsct chrngor in viterbi.vM1 - Addrd rwinglng lnputlwtput buttbr. - novod awinglng II0 to vitrrbl,rwlng.vhdl
ua. uaa uae
bntity vltrrbl-cd ir port
Input i input.& I in INPUT-VECrORi -- For awinging butter acrilbm, t , -- Scrn enabla a -- Scrn Ln clltphil, clkphi2, -- Out-ot-phrab clockr for doubllng rrart r In i t ~ l o g i c ~ output, outputg I out rthlogic -- For awlnging butter -- Totil: 10 pina
rnd vitrrb1,cdi
-- Architrcturs daclrratlon rrchitscturr vltrrbi,c~atruc of vitrrbi-cd lm
cmponent vltrrbi,rw port (
Input, inputb : In INPüT,VEfX'ORi -- For awlnplng buftor a c n n h , t e t a -- Scan snablr a i -- 9crn ln clk, r w e t I In rtélogict output, output.& r out atdJoglc - - For awinglng butfrr -- Totalt 17 pina
Il and compcnmntf
iignrl clkr atLlogiot a ignal input-r ig i INPW,VECMRt
begin -- clock doublrr clk <= clhphil xor clkphllt
-- Vitsrbi bmtoctor vrw0; vitrrb1,rw port naplinput, input>, rcrn-ûri, tait-ir, tbrt-ai,
clk, rrabt, output, o u t p u t g ) ~ ond vitirbi,c~atnici
-- Contiguricion dbclrrrti~n configurrtion vltorbi,cécontig of vltrrbi-cd Ir
for vltbrb1,c~~tnic and tori end vitrrbl,c~cant igl
-- Thr Vitorbi detrctor wlth 2-lnputloutput awlnging butïrrr
-- A m o n - - Kbnnbth Chrlmrrr -- Dfipirtarnt ot elrctrlcrl and Comgutar Enginsrring - - Unlvbraity ot Toronto - - -- COPYRIGHT - - Copyright 1999 Kenneth Chalmara, - - -- RNISION HISTûRY -. Ury 24, 1999; - Crartrd file - - Hry 27, 1999, - Uodltled to rrflrct chrngra in vitrrbi.vhd1 -- Uiy 31, 19991 - M d t d awlnging Inputloutput butfrt - - - Renrmd to vitarbI,iw,vMl, niovbd clock doublbr outridr - - lmtybs now I cin iinally crarte tha dam tant vrceoral
entity viterbi-sw in port (
input, inputb I in INPVP-VECTORI -- Por swlnging butter icarLkn, test-ri, -- Scsn enable teat-al, -- Scsn in clk, rerot 1 in stLloglci output, output3 I out atdJoglo -- Por iwlnging butfer -- Total! 17 plna
1 1 end vitorbi,swi
-- Archltecture declaration architactura vitarbi,sw-atrua o t viterbi-su in
coaponent viterbl Oort I
input I in INWP,VECMRt r c s a , -- plagi 1 = m a n in b r ~ c h ~utrlco, O n o m 1 operatlon clk, raiet I In atdJogicr output i out atélogio
I i end coaponentr
mlgnal input-aigi INPüT,VBCK)Ri iignal whlch-butterr rtClogici rignsl vit-out, output-dg, outputb,eigi sthlwlci
begin -- Vicarbi docector vit01 vitmrbi port anplinput-aig, icar&n, clk, rmiat, vlt-out) 1
-- Swinging butfari handle 2 input1 over 2 cyclea SBUPi proceni (clk, remet) begln
it raeot = '1' then input-dg <= conv,at~logic,vector('O1, INPUP-SZZE) 1 whlch-butfir += '0'1
aliit riming-mdga{clkl thon It which)autter = '0, then
inputglg < m input1 output,aig <= vit-out1 which-butter <- 'L'i
el.. inpuc-sig +- inputJi autput,,iIQ 2- v1t,outi uhlchJutCer <= 'O1i
and iti and itr
end proceair
-- configuration declaration contiguration vLterbi,n,conflg of vlterblgw 10
Cor viterbi,iw~truo end Cori end vlterbi-sw,conti~;