6914 errata final website - pearsoncmg.comptgmedia.pearsoncmg.com/images/9780132826914/...247 7th...
TRANSCRIPT
The first printing of this book was produced with a few minor printing errors. We apologize for any confusion this might cause you.
Page Correction
16 Sentence added before Figure 2.3: "Rout is typically big for the current-mode case. The termination on the receiver side is not shown in the figure."
17
Endnote reference [16] added after the sentence, "Figure 2.4(a) is a commonly used single-ended current-mode driver, also called a high-common mode (HCM) driver [16]." 16. H. Hatamkhani and C.-K. K. Yang, "Power analysis for high-speed I/O transmitters," in Proceedings of International Symposium on VLSI Circuits, Jun. 17-19, 2004, pp. 142–145.
24 Synchronous bullet corrected to "Every component gets the same clock frequency and known phase."
26 Paragraph after Equation 2.4, e–yz changed to e–γz 35 2nd line of Section 2.3.1.3, removed the word "term"
40 Endnote 16 added: H. Hatamkhani and C.-K. K. Yang, "Power analysis for high-speed I/O transmitters," in Proceedings of International Symposium on VLSI Circuits, Jun. 17-19, 2004, pp. 142–145.
47 5th bullet corrected to "Controller package layer count: 2-2-2 or 3-2-3 build up package for DQ traces"
56 2nd paragraph of Section 3.4.2, 50-50–60Ω corrected to 50–60Ω 59 1st paragraph, "(shown in Figure 3.11)" corrected to "(shown in Figure 3.12)" 62 1st paragraph, second line, 300 corrected to 30" 63 1st paragraph, 8th line, 100 corrected to 10". 9th line, 1.10 corrected to 1.1"
69
Equations 4.5c and 4.6 corrected:
1 2 2
1 2 2
v v vi i i⎡ ⎤ ⎡ ⎤ ⎡ ⎤⎡ ⎤
= =⎢ ⎥ ⎢ ⎥ ⎢ ⎥⎢ ⎥− −⎣ ⎦⎣ ⎦ ⎣ ⎦ ⎣ ⎦
A BABCD
C D
(4.5c)
3 31(1,3) (1,2) (2,3)
3 31
.v vvi ii
⎡ ⎤ ⎡ ⎤⎡ ⎤= = ⋅⎢ ⎥ ⎢ ⎥⎢ ⎥ − −⎣ ⎦ ⎣ ⎦ ⎣ ⎦ABCD ABCD ABCD
(4.6)
70 Table 4.1's bottom right cell corrected to1 2
1 2
v vi i⎡ ⎤ ⎡ ⎤⎡ ⎤
=⎢ ⎥ ⎢ ⎥⎢ ⎥ −⎣ ⎦⎣ ⎦ ⎣ ⎦
A BC D
1st paragraph of Section 4.1.3 and in Equation 4.7a, the arrows should be aligned over v. 72 Equations 4.11a and 4.11b, the arrows should be aligned over v.
76 Alignment of Table 4.4 corrected. Please see corrected version on the Updates tab at www.informit.com/title/9780132826914.
92 Removed closing brace on this page in Equation 4.42b 105 Table 5.1, first row in Z column, "coch" changed to "csch"
117 Equation 5.28 corrected to:
ˆ 1.d dmj je eω ωτ τ
− − −=τ τM M
133 Paragraph after Equation 5.46, "1, 2ns" changed to "1.2ns"
156 Table 6.1, 10e-1 deleted in the column heading. "e" deleted from all superscripts. Please see corrected version at www.informit.com/title/9780132826914.
165 1st line of the page, comma inserted in "RX,Deadband" and "RX,RJ" 176 Equation 7.2 corrected to: 0 0 1 .N Ny C C F C F ε= + + + +
201 Paragraph after Equation 8.5, Pn changed to P0 202 "BER(vREF) = " added to the beginning of Equation 8.8 210 At the top of the page, bn changed to b0 212 Equation 8.14, "HTXT" changed to "HTX
T"
215 Equation 8.19 corrected to:
( ) ( )( )2( ) ( )TRX RX T RX RX T RX RX T T RX
aE n E a H a H V V H Hεε ε= =W W W W
218 1st paragraph, 60 changed to 6" 243 5th line, "Figure 9.23" changed to "It"; 7th line, "This" changed to "Figure 9.23"
247 7th line on the page, 30 changed to 3" 250 Paragraph after Equation 9.13, "&infini;" changed to the infinity symbol, ∞ 252 1st paragraph after Table 9.2 and in Figure 9.29 caption, 70 changed to 7"
260 Equation 10.3b corrected to: ( ) .TX TX TX Ref1Mn a ζ ε= WH J
265 Paragraph after Equation 10.9, H Clk changed to ClkH
277 Figure 10.19 caption corrected to "Comparison of JIF (Jitter Impulse Response) with Transient Simulation"
304 Equation 12.1 updated to:
1 .1 1 1net
pin pin pin
L
L L L
=+ + +
353 Table 13.7, shading in last column corrected to light gray. Please see corrected version at www.informit.com/title/9780132826914.
356 1st paragraph, "½" changed to "1/2"
367
The two equations in the first paragraph corrected to: 7( ) 25mV cos(2π 5 10 90 )V t t °= ⋅ ⋅ ⋅ ⋅ −
7( ) 10.96ps cos(2π 5 10 57 )J t t °= ⋅ ⋅ ⋅ ⋅ −
383 1st paragraph of Section 15.2.1, Ωcm changed to Ω⋅cm in 2 places
400 Additional sentence added to the start of 2nd paragraph: "The chapter first discusses the substrate modeling methodology, including both DC and high-frequency approaches."
428 The word "and" deleted from the following sentence: "The relative size of the ISI cancellation pulse, and to the main pulse, is determined by the equalizer coefficients, which are, in turn, determined by the channel characteristics."
429 Equation 17.1a changed to:
1 2(1 / 2)1 1, , .( ) ( )
m sz p p
s s D L s s
g RR C R C R Cω ω ω += = =
432 Line before Equation 17.2, "tc.q" changed to "tc,q" (changing period to comma)
435 Equation 17.6 corrected to:
2 2( ) 2 2 ( )nw n w n n n
eE e e e e u n
w∂
∇ ≈ ∇ = = −∂
1st paragraph of Section 17.3.2, "Stojanović" changed to "Stojanovic" 440 3rd line, "SNR" changed to "BER"
442 Equation 17.16 corrected to:
0 1' '0 1 1 1( ) ( )i i i i i i
i m i me e w e e w e e
−
− − − −=− =−
− = − = −∑ ∑
451 References 22 and 24, "Stojanović" changed to "Stojanovic" Figures 9.4, 9.15, 9.25, 14.4, 17.4, 17.6, 17.8, 17.17, 17.18, 18.25, and 18.27 were revised. See the revised versions on the Updates tab at www.informit.com/title/9780132826914.
Table 4.4 Transform Matrices to Convert Single-Ended Variables to Mixed-Mode Variable andVice Versa
Single-Ended to Mixed-Mode Mixed-Mode to Single-Ended
i: single-ended positive index
j: single-ended negative index
m: differential-mode index
n: common-mode index
i: differential-mode index
j: common-mode index
m: single-ended positive index
n: single-ended negative index
v�m
n B 1
i-1j
1>2 1>2R1M
v
SM m
n B 1>2
i1j
-1>2 1R1M
v
MS =Mv
SM - 1
i�m
n B1>2
i-1>2j
1 1R1Mi
SM m
n B 1
i1>2j
-1 1>2R1Mi
MS=MiSM - 1
a�,b�
m
n
Di j1
22-
1
221
22
1
22
T 1 Ma,bSM
m
n
Di j1
22
1
22
-1
22
1
22
T 1 Ma,bMS = Ma,b
SMT
Table 6.1 Target BER vs. QBER
BER -110 10-2 10-3 10-4 10-5
QBER 1.28155 2.32635 3.09023 3.71902 4.26489
BER 10-6 10-7 10-8 10-9 10-10
QBER 4.75342 5.19934 5.61200 5.99781 6.36134
BER 10-11 10-12 10-13 10-14 10-15
QBER 6.70602 7.03448 7.34880 7.65063 7.94135
BER 10-16 10-17 10-18 10-19 10-20
QBER 8.22208 8.49379 8.75729 9.01327 9.26234
BER 10-21 10-22 10-23 10-24 10-25
QBER 9.50502 9.74179 9.97305 10.19916 10.42045
BER 10-26 10-27 10-28 10-29 10-30
QBER 10.63722 10.84974 11.05823 11.26293 11.46402
Falling Edge
Rising Edge Rout = y for transition = z for high state = x for low state
z
Single Bit
x xyy
Figure 9-4
MB Trace, 0.8”POD Single-EndDriver
PackageProbing Point
90
Zo = 60
Figure 9-15
Volt
age
(mV
)
Volt
age
(mV
)
1400 1400
1200 1200
1000 1000
800
600
800
600
1600
Random DataFinal Noise PDF
DBI-DC CodedFinal Noise PDF
BE
R
BE
R
0
-5
-10
-15
20
-5
-10
-15
20-40 -20 20 40 60 80 100 120 1400 -40 -20 20 40 60 80 100 120 1400
Time (ps) Time (ps)
Figure 9-25
Table 13.7 Encoding and Decoding for 6-Wire Vector Signaling with Simplified Receiver Design
Symbol
Transmitter Receiver
1 2 3 4 5 6 1 2 3 4 5 6 7
U V W X Y Z U-V U-W W-U X-Y Y-Z Z-X (U+V+W)-(X+Y+Z)
A 1 1 1 0 0 0 δ δ 1 1 1 δ 1
B 1 1 0 1 0 0 δ 1 δ 1 1 1 1
C 1 1 0 0 1 0 δ 1 1 δ 1 1 1
D 1 1 0 0 0 1 δ 1 1 1 δ 1 1
E 1 0 1 1 0 0 1 δ δ 1 1 -1 1
F 1 0 1 0 1 0 1 δ 1 δ 1 -1 1
G 1 0 1 0 0 1 1 δ 1 1 δ -1 1
H 1 0 0 1 1 0 1 1 δ δ 1 δ -1
I 1 0 0 1 0 1 1 1 δ 1 δ δ -1
J 1 0 0 0 1 1 1 1 1 δ δ δ -1
K 0 1 1 1 0 0 -1 -1 -1 δ δ δ 1
L 0 1 1 0 1 0 -1 -1 δ -1 δ δ 1
M 0 1 1 0 0 1 -1 -1 δ δ -1 δ 1
RVRM LVRM LPCB LPKGRPCB RPKG Ron-chip
C
RdecapRshunt
RPCBdecap
L PCBdecap
CPCBdecap
RPKGdecap
L PKGdecap
CPKGdecap
On-Chip PDNOff-Chip PDN Current Profile
VVRM
decap
fb
Figure 14-4
(a)
ts -T t
s +T t
s+ 2Tt
s
Channel SingleBit Response
(b)
(dfe1+ dfe
2)2
dfe1
dfe2
dfe1/2 (dfe
2+dfe
3)2
Offset
RX Clock
Feedback Equalizer
0,1,1,...
Analog Comparator
HDFE
[n]
DigitalAnalog
_
DAC
Figure 17-4
Channel P wEqualizer x(n)
u(n),e(n)
u(n) e(n)x(n)ˆ
x (n– ∆)
wn+1 = wn – μ ∆
ww E(en )
2
2
–
Figure 17-6
0.5
0.4
0.3
0.2
0.1
0
-0.1
0.4
0.3
0.2
0.10
-0.1
0.6 0.8 1 1.2 1.4 1.6 1.8
X 10-9
Volt
age
(V)
Volt
age
(V)
Time (sec)(a)
0.6 0.8 1 1.2 1.4 1.6 1.8
X 10-9Time (sec)(b)
Data-Based Tx Equalization
Edge-Based Tx Equalization
No EQData Tx EQData SamplesEdge Samples
No EQEdge Tx EQ
Data SamplesEdge Samples
Figure 17-8
(a)
0,1,1,...
HDFE [n]
DSP
ADC
DigitalAnalog
(b)
HDFE [n]
y[n]
q[n]
d[n]Quantization Noise
Offset[n]
Decision Slicer
Figure 17-17
Binary Data
comb.logic
DN[K]
D2[K]
D1[K]
(a)
(c)(b)
X[K
-M]
X[K
-2]
X[K
-1]
X[K
-M]
X[K
-2]
X[K
-1]
X [K] DN [k]
D1 [k]
DN [k]
D1 [k]
N:1 D[k]
F[k]
X[k]
X[k] +
TM
T1
T2
X[k
-1]
X[k
-2]
X[k
-M]
Combinational Deterministic
Decision Logic
- Thermometer to binary
Y[k+1]
Figure 17-18
VREF
Controller PHY DRAM PHY
READ data READ data
WRITE data WRITEdata
PLL
DLLCA
CLK
Strobe
Data
1010 pattern
90°
90°
1010 pattern
Figure 18-25
I/OSignaling
[20%]
DRAMCore[40%]
SystemClocking
[40%]
Mem
ory
Sys
tem
Pow
er
DRAMController
ODT_VSS
ODT_VDDIO
VREF
VDDIO (1.5V)
Ext
erna
l Reg
ulat
or
Figure 18-27