3. 12-pulse series-type diode rectifier

EE 8407 Power Converter Systems 1

EE8407 Power Converter Systems

Project 1 12-pulse Series-type Diode Rectifier

• Objectives

To investigate the performance of series-type 12-pulse diode rectifier • Exercise (3%)

Verify the waveforms and THD of a six-pulse diode rectifier shown in Fig. 3.2-7.

• System Parameters Rated Supply Voltage: 4160V (rms, line-to-line) Rated DC Output Power: 1MW

Diode Rectifiers: Ideal (no power losses, no voltage drop) DC Filter Capacitor: ∞=dC (dc voltage is ripple free)

Line Inductance: 0.05pu (Between the transformer and supply) • Phase Shifting Transformer Magnetising Inductance: Very High ( ∞=mL ) Winding Resistance: Negligible Primary Leakage Inductance: 0.03pu Leakage Inductance of Each Secondary Winding: 0.03pu (Hint: Use a per unit system for the secondary windings) • Project Requirements (12%)

1) Calculate the base values of the rectifier system, and the values of all inductances (in mH); 2) Find the line current THD of the rectifier with the fundamental line current 1AI (rms) from

0.1pu to 1.0pu (10 sets of data); 3) Represent your results obtained from 2) with a graph (similar to Fig. 3.3-5); and 4) Include a set of current waveforms ( Aaaad iiiii and,,, ~′′ ) at puI A 5.01 = and their harmonic

spectrum (0 – 2kHz). • Project Report 1) Cover page (including course/lab title, your name, student ID, date) 2) Abstract (a paragraph of about 200 words) 3) Introduction 4) Theoretical analysis 5) Calculations, simulation results and discussions/explanations. 6) Conclusions (about 300 words) 7) Appendix: Simulink models

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Project 2 Space Vector Modulation Schemes for Two-Level

Voltage Source Inverter

• Objectives 1) To understand the principle of space vector modulation; and 2) To investigate the harmonic performance of the two-level voltage source inverter.

• Suggested Simulation Software

Matlab/Simulink • System Specifications

Inverter Topology: Two-level voltage source inverter as shown in Fig. 6.1-1 Rated Inverter Output Power: 1MVA Rated Inverter Output Voltage: 4160V (fundamental line-to-line voltage, rms) Rated Inverter Output Current: 138.8A (fundamental, rms) Rated dc Input Voltage: Constant dc (to be determined) Load: RL load with a per-phase resistance of 0.95pu and inductance of

0.31pu, which gives the load impedance of 1.0pu with a lagging power factor of 0.95. Note that the RL load is fixed for the inverter operating under various conditions.

Switching Devices: Ideal switch (no power losses or forward voltage drops) • Project Requirements

Part A A.1 Determine the dc input voltage dV that can produce a fundamental line-to-line voltage of

4160V (rms) at the modulation index of 0.1=am . A.2 Determine the value of load resistance (Ω ) and inductance (mH). Part B Develop a simulation program for the conventional SVM scheme using the seven-segment switching sequence given in Table 6.3-4. Run your simulation program for the tasks given in the Table 1.

B.1 For each of the above tasks, draw waveforms (two cycles each) for the inverter line-to-line voltage ABv (V) and inverter output current Ai (A).

B.2 Plot the harmonic spectrum (0 to 60th harmonics) of ABv normalized to the dc voltage dV and

Ai normalized to its rated fundamental component RTDAI ,1 (138.8A). Find the THD of ABv and

Ai , and complete Table 1.


B.3 Analyze your simulation results and draw conclusions.

Table 1 Simulation tasks for the conventional SVM scheme Simulation

Task )Hz(1f am

THD (%)

ABv THD (%)

Ai

T.1 30 0.4 146% 16%

T.2 30 0.8 77% 10%

T.3 60 0.4 152% 17%

T.4 60 0.8 81% 11%

Sampling Period: sec720/1=sT

Part C Modify your simulation program developed in Part B such that even-order harmonics in ABv can be eliminated. Use the switching sequence given in Table 6.3-5. Run your simulation program for the tasks given in Table 2.

Table 2 Simulation tasks for the modified SVM scheme with even-order harmonic elimination

Simulation Task

)Hz(1f am THD (%)

ABv THD (%)

Ai

T.5 30 0.8 77% 10%

T.6 60 0.8 81% 11%

Sampling period: sec720/1=sT

C.1 For each of the above tasks, draw the waveforms for ABv and Ai . C.2 Calculate harmonic spectrum and THD of ABv and Ai , and complete Table 2. C.3 Find harmonic content of ABv versus am for the inverter operating at Hz601 =f and

sec720/1=sT . C.4 Analyze your simulation results and draw conclusions.

• Project Report See instructions given in Project 1.


Project 3 Control of Multilevel Cascaded H-Bridge Inverters

• Objectives

To investigate carrier based PWM schemes for multilevel cascaded H-bridge inverters.

• Inverter Specifications Inverter Configuration: Seven-level cascaded H-bridge inverter Rated Inverter Output Voltage: 2300V (rms fundamental line-to-line voltage) Rated Inverter Output Power: 2MVA (three phase) Rated Inverter Output Frequency: 60Hz DC link voltage of H-bridges: Constant, ripple free. DC voltage: To be determined. Inverter load: Three-phase balanced RL load with a lagging power factor of 0.9 at the rated frequency of 60Hz. Note: once the load impedance is determined, it is fixed for the inverter operating at various frequencies or modulation indices.

• Project Requirements 1) Determine the value of dc link voltage E of each H-bridge such that the fundamental line-to-line voltage (rms) of the seven-level cascaded inverter is 2300V at 0.1=am 2) Use phase-shifted PWM scheme for the seven-level CHB inverter under the following operating conditions: HzfHzf crm 720,60 == and 99.0=am . Show voltage waveforms ( ANHHH vvvv ,,, 321 and ABv ) and their harmonic spectrum. Refer to Fig. 7.4-2 in the textbook as an example for your plots. 3) Repeat Item 2) with 25.0=am . 4) Use level-shifted PWM scheme (IPD) for the seven-level CHB inverter under the following conditions: HzfHzf crm 4320,60 == and 99.0=am . Show voltage waveforms ( ANHHH vvvv ,,, 321 and ABv ) and their harmonic spectrum. Refer to Fig. 7.4-6 in the textbook as an example for your plots. 5) Repeat Item 4) with 25.0=am . 6) Compare the results by both modulation schemes and make your conclusions.



Project 4

IPD and APOD Modulation Schemes for Multilevel Diode Clamped Inverters

• Objectives To investigate the performance of multilevel diode clamped inverters with carrier based modulation schemes.

• Inverter Specifications Inverter Configuration: Three- and four-level diode clamped inverters Rated Inverter Output Voltage: 6.6KV (rms fundamental line-to-line voltage) Rated Inverter Output Power: 5MVA (three-phase) Rated Inverter Output Frequency: 60Hz dc link voltage: Constant, ripple free. Total dc link voltage: To be determined. Use two identical dc voltage sources for the three-level inverter and three identical dc voltage sources for the four level inverter. Inverter load: Three-phase balanced RL load with a lagging power factor of 0.9 at the rated frequency of 60Hz. Note: once the load impedance is determined, it is fixed for the inverter operating at various frequencies or modulation indices.

• Project Requirements 1) Determine the value of total dc link voltage such that the fundamental line-to-line voltage (rms) of the inverter is 6.6KV at 0.1=am 2) Design switching pattern for the three-level inverter Use in-phase disposition (IPD) modulation scheme to control the inverter under the following operating conditions: 2.1) HzfHzf crm 900,60 == and 1=am .0 2.2) HzfHzf crm 900,20 == and 3.0=am

Show simulated waveforms ( ,,,, 21 ABANgg vvvv and Ai ) and the harmonic spectra of ABv and Ai . Arrange your waveforms and harmonic spectra in a same format as that of Fig. 8.6-2 in textbook. 3) Repeat 2) with alternative phase opposition disposition (APOD) modulation scheme. Compare your simulation results and make conclusions.

4) Design switching pattern for the four-level inverter Use IPD scheme to control the inverter operating at HzfHzf crm 900,60 == and 1=am . Show

simulated waveforms ( ABv and Ai ) and their harmonic spectra. Compare your simulation results with those in 2.1) and make conclusions.



Project 5

PWM Current Source Converters • Objectives

To investigate the operation and performance of current source inverter and rectifier modulated by SHE schemes.

Part A Single-bridge Current Source Inverter (CSI)

• Inverter Specifications Inverter Configuration: Single-bridge current source inverter (refer to Fig. 5-1). Assumption: ideal inverter, no power loss. Inverter dc Link Current: AId 200= Inverter Output Frequency: 70Hz Output Filter Capacitor: 66 Fμ Inverter load: Three-phase balanced RL load, Ω=15loadR with mHLload 6= in series per phase.

1S

2S

3S 5S

4S 6S

dI

wi

ci

oi

fC

4g 6g 2g

1g 3g 5g

A

B

C

fC fC

Z

LOAD

O

Fig. 5-1 Single-bridge current source inverter.

• Project Requirements 1) Build Simulink model for the single-bridge CSI. 2) Develop SHE switching pattern with 5th, 7th and 11th harmonic elimination (no bypass pulses). 3) Show waveforms of )(Aiw , )(Aio and )(VvAB . 4) Determine harmonic content by 1) completing Table 5-1 and plotting the spectrum of 1/ wwn II

and 1/ oon II up to the 47th harmonic. Make your conclusions.

Table 5-1 Fundamental and dominant harmonics in wI , oI and AOV

Fundamental (rms)

13th (rms)

17th (rms)

19th (rms)

23rd (rms)

THD (%)

wI

oI

ABV


Part B Dual-Bridge Current Source Rectifier (CSR) • Rectifier Specifications

Rectifier Configuration: Dual-bridge current source rectifier as shown in Fig. 5-2. Assumption: Ideal rectifier, no power loss. Rated DC Output Power: 1.5MW (total power of the two single-bridge rectifiers) Rated Utility Voltage: 3000V (rms, line-to-line), 60Hz Phase-shifting Transformer: Represented by leakage inductances, no power loss.

Rated Secondary Voltage: 1500V (rms, line-to-line) Total Leakage Inductance lkL : 0.07pu (primary and secondary leakages, both referred to the secondary side) Filter Capacitor fC : 0.4pu

Base Values for lkL and fC : Use the rated values of each secondary winding for the calculation of lkL and fC .

Line (source) inductance sL : mH8.0 (0.05pu) DC Choke dL : mH48 (3pu. In practice, dL is in the range of 0.5 to 1pu. The high value of 3pu is used here to reduce the dc current ripple, which will increase the accuracy of the line/PWM current THD analysis. DC Load Resistance: Ω16

dL

si wilkL

lkL

fC

fC

°= 0δ

°= 30δ

si~ wi~

di

ssA iii ~+=

Av

Cv

Bv

sL

Fig. 5-2 Dual-bridge current source rectifier.

• Project Requirements 1) Build Simulink model for the dual-bridge CSR. 2) Develop SHE switching pattern with 11th and 13th harmonic elimination at 0.1=am (refer

to Table 2 on Page 248 of the textbook). 3) Use delay angle of °= 0α (with respect to the transformer secondary voltage instead of

capacitor voltage). 4) Show waveforms of )(Aiw , )(Ais and )(AiA .


5) Determine harmonic content by 1) completing Table 5-2 and plotting the spectrum of 1/ wwn II , 1/ ssn II and 1/ AAn II up to the 47th harmonic. Make your conclusions.

Table 5-2 Fundamental and dominant harmonics in wI , sI and AI

Fundamental (rms)

5th (rms)

7th (rms)

11th (rms)

13th (rms)

17th (rms)

19th (rms)

THD (%)

wI

sI

AI

Note: In case of LC resonances, add a three-phase damping resistance in parallel with fC . You should select your damping resistance such that the LC resonance can be effectively damped out and in the meantime the power loss on the damping resistor is minimized. Give the value of the damping resistance.


3. 12-pulse series-type diode rectifier

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