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200711

LAB808NCTU

Lab808: Power Electronic Systems & Chips, NCTU, TAIWAN

808DSP/FPGA

http://pemclab.cn.nctu.edu.tw/Lab-808: Power Electronic Systems & Chips Lab., NCTU, Taiwan

PCB

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Contents

1. Introduction2. Introduction to EMI/EMC3. EMI Regulations4. Review of Basic Theory 5. Electromagnetic Interference6. EMI Reduction Techniques7. Fundamentals of PCB Design8. Guide Lines for PCB Design for EMC Compliance

Power Distribution and Grounding Techniques PCB Design for High-Frequency Signal Traces Techniques Analog and Digital Signal TracesBack Plane and Terminals

9. PCB Design Procedure

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Power Electronic Systems & Chips Lab., NCTU, Taiwan

Introduction

Power Electronic Systems & Chips Lab.

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1. Introduction

(Giga Hertz Microelectronics) IC(Mixed-Signal IC) (Mega Hertz Power Electronics) On-Board AC-DC and DC-DC Converters Development of High-Density Packaging Technology Development of Multi-Chip IC Modules PCB PCB

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PCB Design: EMI & SI? What is the Problem?

PCB

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From Schematics to PCB Layout

Where is the fastest current changing loop?

Where is the fastest voltage changing node?

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Hierarchical Structure of an Electronic System

L/S = 100m

BGA, CSP, MCM

L/S = 25m

L/S = 0.18m

IC IC

IC

LSI

FCWBTAB

CSP

MCM()

FCWBTAB(BGAPGAQFP

SOP)()

()

(Back Board)

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Interconnection of Electronic Systems

PowerSupply

Interconnections CAN NOT be neglected! The characteristics of the current flowing through the

interconnection is a major concerned in the design of the interconnection!

PCB design is an art of connections!

(a) IC (b) PCB (c)

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Architecture of a PCB System

System Topology: Needs to be converted into an equivalent electrical circuit model

signals

de-coupling capat edge of package

chipset ASICI/O card

de-coupling capaway from pkg

power plane outlinesMicroprocessor

I/O #1

I/O #2

Core

PCB Design Rule No. 1: Top-Down Systematic Architecture Design

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Construction of an Electronic System

Conducted emissions of a SPS without EMI filter UBP

UPSFE

UDR

JINF

UHVG

UFEUTE

UHVD

Temp. m

eas.

HV

Power/Data

Data

Control bus

Power

SPS

UPC CAN bus

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Development of High-Speed Digital Systems

DIP QFP PGA BGA COB/FC OLGA

Package Technology

1985 1987 1990 1995 2000

8Mhz

25Mhz

90Mhz

166Mhz

500Mhz

1980

4.77Mhz

5V

3.3V

2.5V

1.8V

0.1A0.5A

1A

4A

12AOperating Voltage Dynamic Current, ICC

Clock Frequency

0.9V

3.2 GHz

2005

30A

2010

Multi-Core

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Development Trend of IC Packaging Technology

1980 1990 2000

Den

sity

QFP

BGA

ConventionalCSP

Wafer LevelCSP

1970

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PCB Design Flow

Problem causesat evaluation stage

Design Prototype Evaluation

No careabout art

work

A handful of technical people

work for EMC

Limited counter-measures after completion of

design/prototype

Schematicdesign

Layoutdesign

PCBpatterndesign

Manufactureof PCB Packaging

Massproduction

Reiteration

Long TAT

Problem causes

Turn back as problem causes

Estimation Systemverification

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Improvement of PCB Design Flow

Design Prototype Evaluation

Schematicdesign

Layoutdesign

PCBpatterndesign

Manufactureof PCB Packaging

MassproductionEstimation

Systemverification

Execute fundamental counter measures and solve all problems

at schematic/layout stage

Solve the problem at design step All steps can be proceed smoothly

Complete design without any reiteration

Floor planning

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Improvement Opportunity to Cost

Schematicdesign

Layoutdesign

PCBpatterndesign

Manufactureof PCB Packaging

MassproductionEstimation

Systemverification

Most importantdesign process

EMI measurement at first design stage can realize better effect with low cost.

Cost

Improvementopportunity

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EMC & SI: Driving Force to the Future

Smaller

More Efficient

CheaperFaster

Technology

Signal IntegrityRegulations

Time to Market

EMC&

SI & PI

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PCB Layout Concept for EMC Compliance Design

Analog circuits rarely work correctly unless engineering effort is expended to solve EMI and layout problems.

Sooner or later (or now!), the engineer needs to learn to deal with EMIPractical engineering approaches:

figure out where are the significant EMI sourcesfigure out where the EMI is going (EMI victim)figure out where the EMI is coupling (Coupling path)engineer the circuit layout to mitigate EMI problems

Build a layout that can be understood and analyzed!

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Power Electronic Systems & Chips Lab., NCTU, Taiwan

Fundamentals of PCB Design

Power Electronic Systems & Chips Lab.

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PCB Design for EMC Compliance

Differential mode emissions

Common mode emissions

Common mode currents

Differential mode currents

Interplanecapacitance

Mark I. Montrose, Printed Circuit Board Design for EMC Compliance: A Handbook for Designers, IEEE Press, 1996.

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Fundamental Concepts for PCB Layout

1. EMC considerations for PCB design2. Hidden characteristics of passive components3. How and why RF energy is developed within the PCB4. Magnetic flux and cancellation requirements5. Routing topology configurations6. Layer stackup assignment7. Radial migration8. Grounding methodologies9. The need for an optimal return path for RF current10. Aspect ratios11. Image planes12. Partitioning13. PCB Design to Reduce DM and CM Noises

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Component Characteristic at RF Frequencies

f

f

f

f

f

Wire

Resistor

Capacitor

Inductor

Transformer

Low Frequency BehaviorComponent

High Frequency Behavior

Frequencyresponse

Solid line is low frequency behavior

Dashed line is high frequency behavior

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Hidden Characteristics of Passive Components

PCB

PCB

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How and Why RF Energy is Developed within the PCB

NOTE:

1. For frequencies greater than a few kHz, the value of inductive reactance typically exceeds R. Current takes the path of least impedance, Z. Below a few kHz, the path of least impedance is resistive; above a few kHz, the path of least reactance is dominant. Because most circuits operate at frequencies above a few kHz, the belief that current takes the path of least resistance provides an incorrect concept of how RF current flow occurs within a transmission line structure or PCB trace.

2. Each trace has a finite impedance value. Trace inductance is one major reason that RF energy is developed within a PCB.

3. The impedance of free space is 377 ohm. When the impedance of the return path is greater than 377 ohm, free space becomes the return path and is observed as radiated EMI.

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Characteristic Impedance of Free Space

The characteristic impedance of free space, also called the Zo of free space, is an expression of the relationship between the electric-field and magnetic-field intensities in an electromagnetic field (EM field) propagating through a vacuum.

The Zo of free space, like characteristic impedance in general, is expressed in ohms, and is theoretically independent of wavelength. It is considered a physical constant.

Ohm Z

0

0o )120(377

0 = 4 x 10-7 [H/m]; permeability of free space (Henrys/m)0 = 8.85 x 10-12 [F/m]; permittivity of free space (Farads/m)

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Frequency Representation of a Closed-Loop Circuit

If a low-impedance, direct line path from load to source does not exist, such as a slot in a ground plane, RF currents cannot return to the source to satisfy the circuit in an optimal manner. This RF return path will be forced to return through an alternative return path, causing EMI to occur.

E

Complete circuit with a ground return path. Circuit works as designed.

Equivalent circuit with a poor RF return current structure.

EHigh frequency representation

Low frequency representation

RF current return pathAC or DC current return path

Break in the RF return path

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Magnetic Flux and Cancellation Requirements

Using proper stackup assignment and impedance control for multilayer boards to allow for a RF return image or ground path to exist.

Routing a clock trace (high frequency in nature) adjacent to a RF return path, ground plane (multilayer PCB), ground grid, or ground/guard trace (single- and double-sided boards).

Capturing magnetic flux created internal to a component's plastic package into the 0V-reference system to reduce component radiation.

Reducing RF currents (energy) within traces by reducing the RF drive voltage from clock or frequency generation circuits, for example, Transistor-Transistor Logic (TTL) versus Complimentary Metal Oxide Semiconductor (CMOS).