15 jan, 2014
DESCRIPTION
CLB: Current status and development. IFIC (CSIC – Universidad de Valencia). 15 Jan, 2014. l. CLBV2 PROTOYPES. SPI Flash Memory replaced N25Q00AA (1Gbit) is not supported by Xilinx Replaced by S25FL256 (256 Mbit) . ZED BOARD. CLBV2. N25Q. S25FL256. l. - PowerPoint PPT PresentationTRANSCRIPT
15 Jan, 2014
IFIC (CSIC – Universidad de Valencia)
CLB: Current status and development
lCLBV2 PROTOYPES
SPI Flash Memory replaced
• N25Q00AA (1Gbit) is not supported by Xilinx
• Replaced by S25FL256 (256 Mbit)
2
ZED BOARD CLBV2
S25FL256
N25Q
l2nd LM32 INTEGRATION (FIRMWARE)
TDC, AES, State Machine UART, Multiboot, GPIO, 3XI2C, SPI
SVN: CLBv2\trunk\fw\TestDesigns\test_tdc_hydro_stmach (K7-325T)
3
Problems porting firmware to CLBV2 Prototype (K7-160T)
Processing BMM file "fpga.bmm" ...ERROR:NgdBuild:989 - Failed to process BMM information fpga.bmm
Checking expanded design ...
INTERNAL_ERROR::45 - Memory allocation leak of 60 bytes at 0x04497AE4 for a 'AddressMappingType' record. Total memory in use at allocation was 12766 bytes. Source file "BmmUtils.c", line number 3054.
INTERNAL_ERROR::45 - Memory allocation leak of 25 bytes at 0x040E6BBC for a StrNew. Total memory in use at allocation was 12826 bytes. Source file "BmmUtils.c", line number 3059.
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lTEST 2nd LM32 INTEGRATION IN PROTOTYPE
Serial Com.
FMC DebugBoard
31Ch
V6
PSEUDO OCTOPUSINFN-Bologna
5
l2nd LM32 INTEGRATION (SOFTWARE)Shell commands, drivers and libraries for wishbone slaves implemented and included in:
SVN: CLBv2\trunk\sw\embedded\TestDesigns\test_tdc_hydro_stmach
TDC:Core ON/OFFChannels OF/OFF
MultibootMultiboot Addresstrigger ON
State MachineDOM idnº bytes of time sliceRun number
Start Time SliceDuration in ms or us
6
lNext steps
• To finish the integration in K7-160T
• Test TDC readout FMC and Pseudo Octopus
• Test TDC+Hydro using the 2nd UART (FMC board)
• IPMUX interface
THANKS FOR YOUR ATTENTION!