10v single channel programmable load …10v single channel programmable load switch description...

AP22850 Document number: DS36540 Rev. 2 - 2

1 of 14 www.diodes.com

March 2015 © Diodes Incorporated

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10V SINGLE CHANNEL PROGRAMMABLE LOAD SWITCH

Description

AP22850 is an integrated P-Channel load switch, which features an

adjustable ramp-up and discharge rate that can be set via an external

capacitor and a resistor, respectively. In addition, it incorporates a

“power good” output to flag when the switch is fully enhanced. The P-

Channel switch has a typical RDS(ON) of 21mΩ, enabling a current

handling capability of up to 8A.

AP22850 is designed to operate from 4.5V to 11V. The near-zero

quiescent supply current makes it ideal for use in battery powered

distribution systems where power consumption is a concern.

Even as a P-Channel load switch, AP22850 does not require an

external gate pull-up resistor, and consequently, stays true to its

headlining feature of near-zero quiescent current specification. It also

features circuitry to suppress fast input transients (with EN low) from

coupling to VOUT.

Feature

Near-Zero Quiescent Current

No External Gate Pull-Up Resistor Required

Suppresses Fast Transients on VIN

4.5V to 11V Input Voltage Range

Low Typical RDS(ON) of 21mΩ

Adjustable Start-Up and Discharge Rate

Small Form Factor Package W-DFN2020-8

– Footprint of just 4mm2

Thermally Efficient Package with an Exposed Pad

Case Material: Molded Plastic, “Green” Molding Compound.

UL Flammability Classification Rating 94V-0

Moisture Sensitivity: Level 1 per J-STD-020

Lead-Free Plating (NiPdAu Finish over Copper Leadframe).

Terminals: Solderable per MIL-STD-202, Method 208

Weight: TBD grams (Approximate)

Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)

Halogen and Antimony Free. “Green” Device (Note 3)

Pin Assignments

8

7

6

1

2

3

VOUT

1

2

3

8

7

6

VOUT

Top View Bottom View

W-DFN2020-8

5 44 5

SS

EN

VIN

VIN

SS

EN

VIN

VIN

DIS

PG

VBIAS

GND

Applications

Integrated Load Switches in Ultrabook PCs

Power Up/Down Sequencing in Ultrabook PCs

Tablets

Notebooks / Netbooks

E-Readers

Consumer Electronics

Set-Top Boxes

Industrial Systems

Telecom Systems

Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant. 2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds.

e4

http://www.diodes.com

http://www.diodes.com/quality/lead_free.html




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Typical Applications Circuit

VIN

SSEN

GND

VOUT

DIS

PG

CL RLRDIS

ON

OFF

RPULL-UP

CSS

VBIAS

AP22850

Pin Descriptions

Pin Name Pin Number Function

SS 1 Soft-Start Adjust

An external capacitor connected between this pin and VOUT sets the ramp-up time of VOUT

EN 2 Enable Input

Active high

VIN 3, 4 Input Voltage

Connects to the Source of the P-channel MOSFET

GND 5 Ground

VBIAS 6 Supply Voltage

Recommended range: 2.5V ≤ VBIAS ≤ 5.5V

PG 7 Power Good

Open-drain output to indicate when the P-channel pass switch is fully enhanced

DIS 8 Output Discharge

An external resistor between DIS and VOUT sets the discharge rate of VOUT

VOUT PAD Output Voltage

PAD connects to the Drain of the P-channel MOSFET





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Functional Block Diagram

DIS

SS

EN

GND

VIN VOUT

PG

Power

Good

VBIAS

Gate Drive

Absolute Maximum Ratings (@TA = +25°C, unless otherwise specified.) (Note 4)

Symbol Parameter Ratings Units

VIN Input Voltage 12.0 V

VOUT Output Voltage 12.0 V

VEN Enable Voltage 6.0 V

VBIAS Bias Voltage 6.0 V

IL Load Current

8.0 A

TJ(max) Maximum Junction Temperature 125 °C

TST Storage Temperature −55 to +150 °C

PD Power Dissipation (Note 5) 0.35 W

(Note 6) 1.8 W

RθJA Thermal Resistance, Junction to Ambient (Note 5) 300

°C/W (Note 6) 60

RθJC Thermal Resistance, Junction to Case - 5 °C/W

Notes: 4. Stresses greater than the 'Absolute Maximum Ratings' specified above may cause permanent damage to the device. These are stress ratings only;

functional operation of the device at these or any other conditions exceeding those indicated in this specification is not implied. Device reliability may be affected by exposure to absolute maximum rating conditions for extended periods of time.

5. For a device surface mounted on minimum recommended pad layout, in still air conditions; the device is measured when operating in a steady state condition.

6. For a device surface mounted on 25mm by 25mm by 1.6mm FR4 PCB with high coverage of single sided 2oz copper, in still air conditions; the device is measured when operating in a steady state condition.





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Recommended Operating Conditions (@TA = +25°C, unless otherwise specified.)

Symbol Parameter Min Max Units

VIN Input Voltage 4.5 11.0 V

VBIAS Bias Voltage 2.5 5.5 V

VEN Enable Voltage 0 5.5 V

VPG Power Good Voltage Range 0 11.0 V

TA Operating Ambient Temperature −40 +85 °C

Electrical Characteristics (@TA = +25°C, VBIAS = 2.5V – 5.5V, CIN = 1µF, CL = 100nF, unless otherwise specified.)

Symbol Parameters Conditions Min Typ Max Unit

IVIN_Q VIN Quiescent Current IOUT = 0A

VIN = 10.0V - 5.0 200

nA VIN = 8.4V - 3.0 200

VIN = 5.0V - 1.0 200

IVBIAS_Q VBIAS Quiescent Current VIN = 12.0V, IOUT = 0A - 1.0 200 nA

IVIN_SD VIN Shutdown Current VIN = 12.0V, VEN = 0V - 2.0 200 nA

IVBIAS_SD VBIAS Shutdown Current VIN = 12.0V, VEN = 0V - 2.0 200 nA

RDS(ON) Load Switch On-Resistance IOUT = −1A

VIN = 10.0V - 21 31

mΩ VIN = 8.4V - 21 31

VIN = 5.0V - 23 33

VIH_EN EN Input Logic High Voltage - 1.0 - - V

VIL_EN EN Input Logic Low Voltage - - - 0.5 V

ILEAK_EN EN Input Leakage VEN = VBIAS - - 100 nA

RDS_DIS Discharge FET On-Resistance VEN = 0V, IDIS = 10mA VBIAS = 5.0V - 8 11 Ω

VBIAS = 2.5V - 11 16 Ω

VOL_PG Power Good Output Low Level IOL_PG = 100µA, VEN = 0V - - 0.2 V

IOZ_PG Power Good High-Impedance Current VPG = VBIAS, VEN = VBIAS - - 0.05 µA





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Switching Characteristics (@TA = +25°C, VBIAS = 2.5V – 5.5V, CIN = 1µF, CL = 100nF, unless otherwise specified)

Symbol Parameters Conditions Min Typ Max Unit

tRISE Output Rise Time RL = 10Ω, CSS = 10nF

VIN = 10.0V

-

100

- µs VIN = 8.4V 102

VIN = 5.0V 104

tON Output Turn-ON Delay Time RL = 10Ω, CSS = 10nF

VIN = 10.0V

-

70

- µs VIN = 8.4V 75

VIN = 5.0V 82

tFALL Output Fall Time RL = Open, RDIS = 240Ω,

CSS = 10nF

VIN = 10.0V

-

70

- µs VIN = 8.4V 71

VIN = 5.0V 75

tOFF Output Turn-OFF Delay Time RL = Open, RDIS = 240Ω,

CSS = 10nF

VIN = 10.0V

-

41

- µs VIN = 8.4V 45

VIN = 5.0V 60

tD Output Start Delay Time RL = 10Ω, CSS = 10nF

VIN = 10.0V

-

12

- µs VIN = 8.4V 16

VIN = 5.0V 22

tPG Power Good Delay Time RL = 10Ω, CSS = 10nF

VIN = 10.0V

-

250

- µs VIN = 8.4V 230

VIN = 5.0V 205

tON/tOFF Waveforms

50%

50%

50%

50%

VEN

VOUT

50%

VPG

10%

90% 90%

10%VOUT

tRISE tFALL

tOFFtON

tD

tPG





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Typical Performance Characteristics (@TA = +25°C, VBIAS = 5V, unless otherwise specified.)





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Typical Performance Characteristics (cont.) (@TA = +25°C, VBIAS = 5V, unless otherwise specified.)





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Application Information

Theory of Operation

The AP22850 is a load switch that can be used to isolate or power-down part of a system in order to reduce power consumption, particularly in

battery-powered devices. The PMOS pass element in AP22850 is turned on when the EN pin is pulled high. This provides a controlled current

source to decrease the voltage on the SS pin to GND, effectively turning on the PMOS pass switch and connecting VOUT to VIN.

During the turn-on phase, once the SS voltage reaches close to GND, the PMOS pass switch is fully enhanced with maximum available

overdrive. Power is deemed to be good and the Power Good (PG) output is pulled high via an external pull-up resistor. The rise-time on VOUT is

controlled by the value of the external capacitor between the SS and VOUT pin.

When EN is pulled low, the switch turns off and isolates VOUT from VIN. In addition, PG is pulled to indicate that the power is no longer good.

The discharge pin keeps VOUT grounded while EN is low. The fall time on VOUT is largely controlled by the value of the discharge resistor and

the capacitance on the output.

Input and Output Voltage

The Input Voltage (VIN) should be between 4.5V and 11V. With the switch is activated, the Output Voltage (VOUT) will be the input voltage

minus the voltage drop across the device.

Enable

The GPIO compatible EN input allows the output current to be switched on and off. A high signal (switch on) should be at least 1V, and the low

signal (switch off) no higher than 0.5V.

This pin should not be left floating. It is advisable to hold EN low when applying or removing power.

VBIAS

The VBIAS input provides a positive power supply to the controller circuitry. It should be set in the range of 2.5V to 5.5V. VBIAS signal is

essential for the device to power up and should be set before the switch is enabled.

Power Good

Power Good is an open-drain output that indicates when the pass switch is enhanced enough to deliver current to the load. PG is high (open-

drain high impedance) when power is deemed good, and low when the power is deemed to not be good.

PG can be pulled up to any voltage to a maximum of 11V, although it is recommended to pull it up to VOUT with a resistor greater than 20kΩ.

The advantage of pulling up PG to VOUT is that when EN is low, VOUT is also grounded. Thus, no power is wasted in the pull-up resistor.

If this feature is not required, then PG pin can be left floating

Input and Output Capacitors

AP22850 does not require any capacitor on VIN for successful operation. In addition, this device has no input-to-output capacitor ratio stipulation

to account for current through the body diode. However, to minimize voltage dip on VIN due to inrush current at start-up, a capacitor can be

place on VIN.

For heavier loads, it is recommended that the VIN and VOUT trace lengths be kept to a minimum. In addition, a bulk capacitor (≥ 10μF) may also

be placed close to the VOUT pin. If using a bulk capacitor on VOUT, it is important to control the inrush current by choosing an appropriate soft-

start time in order to minimize the droop on the input supply.





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Application Information (cont.)

Adjustable Slew Rate/Soft-Start

SS pin allows the output ramp time of the switch to be controlled using an external capacitor (CSS). This timing capacitor is connected between the

SS and VOUT pin. Rise times (in µs) for different values of CSS and VIN are shown in the table below with VBIAS = 5.5V.

Rise Time (in μs)

Measured at +25°C using 0805 X7R 10% 50V capacitors, CL = 100nF, RDIS = 1K, RL = 10Ω

VIN

CSS

4.5V 7.0V 9.0V 11.0V

1nF 13.6 12.4 12.0 11.4

10nF 97.2 99.2 98.8 97.9

100nF 955 1,075 1,154 1253

Table 1 Timing Capacitors and Rise Times

Adjustable Discharge

When EN goes low, VOUT is discharged to ground through the discharge resistor (RDIS) on the DIS pin. A value greater than 240Ω is

recommended for RDIS.

While the discharge/fall-time on VOUT can be controlled using RDIS, capacitors on VOUT and SS also contribute to the timing. Higher discharge

resistance increases the RC time constant and hence, the discharge time. Fall times (in µs) for different values of RDIS and VIN are shown in the

table below with VBIAS = 5.5V.

1,206 250mW 1%

Discharge resistor (Ω)

Fall Time (in µs)

Measured at +25°C, CL = 100nF, CSS = 1nF, RL = open

5V 11V

240 71.8 69.5

1,000 264.2 276.7

3,900 1,029 1,078

Table 2 Discharge Resistors and Output Voltage Fall Time





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Board Layout and Thermal Considerations

Due to the high current capacity of the load switch, PCB layout needs to ensure good thermal distribution during operation. The top and bottom of

AP22850EV1, (the evaluation board for AP22850), can be seen below.

Figure 3 PCB Copper Layout & Silk Screen – Top

Figure 4 PCB Copper Layout & Silk Screen – Bottom

Thermal vias are used directly underneath the chip to help distribute the heat from the device. The ground plane on the underside of the board

effectively acts as a large heatsink. The widths of the tracks carrying VIN and VOUT are kept wide. Vias are also distributed around the board to

aid thermal conduction and to ensure a consistent potential, particularly around the ground connections of the capacitors. All capacitors used are

located as close as possible to the AP22850 to minimize any parasitic effects.

The maximum junction temperature of the AP22850 is +125°C. To ensure that this is not exceeded, the following equation can be used to give an

approximation of junction temperature. Temperature readings taken with a thermal camera can also give a good approximation of power

dissipation with the use of this equation. The board layout has a major influence on the parameter .

Where, = Junction Temperature (°C)

= Ambient Temperature (°C) = Junction to Ambient Thermal Impedance (°C/W)

= Power Dissipation (voltage drop across device output current) (W)





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Ordering Information

AP22850 XYZ-7

PackingPackage

SH8 : W-DFN2020-8 -7 : Tape and Reel

Part Number Package

Code

Packaging

(Note 7)

7” Tape and Reel

Quantity Part Number Suffix

AP22850SH8-7 SH8 W-DFN2020-8 3,000/Tape & Reel -7

Note: 7. Pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which can be found on our website at

http://www.diodes.com/datasheets/ap02001.pdf.

Marking Information

W-DFN2020-8

( Top View )

XX : Identification code

W : Week : A~Z : 1~26 week;

X : A~Z : Internal Code

Y : Year 0~9

a~z : 27~52 week; z represents52 and 53 week

Y W X

XX

Device Package Identification Code

AP22850SH8-7 W-DFN2020-8 WC


http://www.diodes.com/datasheets/ap02001.pdf




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Package Outline Dimensions (All dimensions in mm)

Please see AP02002 at http://www.diodes.com/datasheets/ap02002.pdf for the latest version.

Suggested Pad Layout

Please see AP02001 at http://www.diodes.com/datasheets/ap02001.pdf for the latest version.

W-DFN2020-8 Type C

Dim Min Max Typ

A 0.770 0.830 0.800

A1 0 0.05 0.02

A3 - - 0.152

b 0.20 0.30 0.25

D 1.950 2.075 2.000

D2 1.50 1.70 1.60

E 1.950 2.075 2.000

E2 0.80 1.00 0.90

e - - 0.50

K - - 0.125

L 0.240 0.340 0.290

All Dimensions in mm

Dimensions Value (in mm)

C 0.500

G 0.200

G1 0.210

X 0.300

X1 1.600

X2 1.750

Y 0.490

Y1 0.900

Y2 2.300

A A1

A3Seating Plane

D

D2

E

e b

L

E2

Pin #1 ID

K

D2/2

E2/2R0.200

X C

Y1

G1

Y

Y2

X2

G

X1







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IMPORTANT NOTICE DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or trademark rights, nor the rights of others. Any Customer or user of this document or products described herein in such applications shall assume all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on Diodes Incorporated website, harmless against all damages. Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel. Should Customers purchase or use Diodes Incorporated products for any unintended or unauthorized application, Customers shall indemnify and hold Diodes Incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized application. Products described herein may be covered by one or more United States, international or foreign patents pending. Product names and markings noted herein may also be covered by one or more United States, international or foreign trademarks. This document is written in English but may be translated into multiple languages for reference. Only the English version of this document is the final and determinative format released by Diodes Incorporated.

LIFE SUPPORT Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express written approval of the Chief Executive Officer of Diodes Incorporated. As used herein: A. Life support devices or systems are devices or systems which: 1. are intended to implant into the body, or

2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in significant injury to the user.

B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or to affect its safety or effectiveness. Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems. Copyright © 2015, Diodes Incorporated www.diodes.com



10v single channel programmable load …10v single channel programmable load switch description...

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