1 the use of microcontrollers using atmel’s atmega168 as an example

1

The Use of Microcontrollers

Using ATMEL’s ATmega168 as an example

2

Programming a MicrocontrollerWhat’s Needed?

Computer•Software

•Write Code•Simulate•AVR Studio 4

•Port•Serial•Parallel•USB

Programmer•Development Board

•JTAG/ICE•ISP

•Programmer•Bit-Bang

•ADAFruit•ISP•AVRISP Mk II

Microcontroller•Connection

•DIP•SOIC•QFN

•Capability•ADC/DAC•PWM•USB

$7.50

$34.00

3

Why Atmel’s AVR Microcontroller?

1. RISC architecture with mostly fixed-length instruction, load-store memory access, and 32 general-purpose registers.

2. A two-stage instruction pipeline that speeds up execution.

3. Majority of instructions take one clock cycle

4. Up to 20-MHz clock operation

5. Wide variety of on-chip peripherals, including digital I/O, ADC, EEPROM, Timer, UART, RTC timer, pulse width modulator (PWM), etc

6. Internal program and data memory

7. In-system programmable

8. Available in 8-pin to 64-pin package size to suit wide variety of applications

9. Up to 12 times performance speedup over conventional CISC controllers.

10. Wide operating voltage from 2.7 V to 6.0 V.

11. A simple architecture offers a small learning curve to the uninitated.

4

Scalability

5

ATtiny25 Block Diagram

6

ATtiny2313 Block Diagram

7

ATmega168 Block diagram

8

ATmega16 Block diagram

9

Different Types of AVR Controllers

10

ATmega168 Pins

PDIP

PC5

PC4

PC3

PC2

PC1

PC0

GND

AREF

AVCC

PB5

PB4

PB3

PB2

PB1

PC6

PD0

PD1

PD2

PD3

PD4

VCC

GND

PB6

PB7

PD5

PD6

PD7

PB0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

(ADC5/SCL/PCINT13)

(ADC4/SDA/PCINT12)

(ADC3/PCINT11)

(ADC2/PCINT10)

(ADC1/PCINT9)

(ADC0/PCINT8)

(SCK/PCINT5)

(MISO/PCINT4)

(MOSI/OC2A/PCINT3)

(OC1A/PCINT1)(SS/OC1B/PCINT2)

(PCINT16/RXT)

(PCINT17/TXD)

(PCINT18/INT0)

(PCINT19/OC2B/INT1)

(PCINT20/XCK/T0)

(PCINT6/XTAL1/TOSC1)

(PCINT7/XTAL2/TOSC2)

(PCINT21/OC0B/T1)

(PCINT23/AIN1)

PCINT0/CLK0/ICP1)

(PCINT22/OC0A/AIN0)

(PCINT14/RESET)

11

Memory• Flash Code Memory

– 16-bit words starting at 0x0000

– Size dependent on AVR microcontroller

– Non-volatile

– Read-only memory (writing is external to code)

• Data Memory– General Purpose Registers

• 32 8-bit registers

– I/O Registers• Two 8-bit registers for each I/O line

– SRAM• 8-bit memory with size dependent on AVR microcontroller

• EEPROM Memory– Typically reserved for variables that must retain their value in the event of a

shutdown (e.g., system calibration data unique to each board)• Slow speed writing (1 millisecond for 1 byte of memory)

• Limited number of write cycles

12

AVR Risk Architecture

• The Register File– 32 8-bit registers

13

I/O Memory Registers

• SREG: Status Register

• SP: Stack Pointer Register

• GIMSK: General Interrupt Mask Register

• GIFR: General Interrupt Flag Register

• MCUCR: MCU General Control Register

• MCUSR: MCU Status Register

• TCNTO: Timer/Counter 0 Register

• TCCR0A: Timer/Counter 0 Control Register A

• TCCR0B: Timer/Counter 0 Control Register B

• OCR0A: Timer/Counter 0 Output Compare Register A

• OCR0B: Timer/Counter 0 Output Compare Register B

• TIMSK0: Timer/Counter 0 Interrupt Mask Register

• TIFR0: Timer/Counter 0 Interrupt Flag Register

• EEAR: EEPROM Address Register

• EEDR: EEPROM Data Register

• EECR: EEPROM Control Register

• PORTB: PortB Data Register

• DDRB: PortB Data Direction Register

• PINB: Input Pins on PortB

• PORTD: PortD Data Register

• DDRD: PortD Data Direction Register

• PIND: Input Pins on PortD

• SPI I/O Data Register

• SPI Status Register

• SPI Control Register

• UART I/O Data Register

• UART Status Register

• UART Control Register

• UART Baud Rate Register

• ACSR: Analog Comparator Control and Status Register

14

Port Registers

PORTB: PortB Data Register

DDRB: PortB Data Direction Register

PINB: Input Pins on PortB

Bit 7 6 5 4 3 2 1 0

Bit 7 6 5 4 3 2 1 0

Bit 7 6 5 4 3 2 1 0

Similar for Ports C and D.

15

Parallel I/O Ports• Most general-purpose I/O devices• Each I/O Port has 3 associated registers

1. DDRx (where “x” is A, B, C…)• Data Direction Register Port x• Determines which bits of the port are input and which are outputDDRB = 0x02; /* sets the second lowest of port B to output” */

2. PORTx• Port Driver RegisterPORTB = 0x02; /* sets the second bit of port B and clears the others */

3. PINx• Port Pins Registers• Returns the status of all 8 port B pins.unsigned int x;x = PINB; /* Places the status of port B into variable x */

16

Input/Output Ports

• All ports initially set to input

• Must declare all output pins using DDRx (Data Direction Registry Port x)

• The default for input port pins is floating. Can supply a pull-up resistor by writing logic 1 to the corresponding bit of the port driver register

DDRA = 0xC0; /* upper 2 bits are output, lower 6 bits are input*/

PORTA = 0x03; /enable internal pull-ups on lowest 2 bits*/

• Port pins in output mode are typically capable of sinking 20 mA, but source much less.

17

BytesDecimal Binary Hexadecimal

0 0000 0x0

1 0001 0x1

2 0010 0x2

3 0011 0x3

4 0100 0x4

5 0101 0x5

6 0110 0x6

7 0111 0x7

8 1000 0x8

9 1001 0x9

10 1010 0xA

11 1011 0xB

12 1100 0xC

13 1101 0xD

14 1110 0xE

15 1111 0xF

18

Output PortSink vs Source

Sink

5V5V

5V5V

5V

5V

PO

RT

Bx

set

to 0

PO

RT

Bx

set

to 1

PO

RT

Bx

set

to 0

PO

RT

Bx

set

to 1

Source

• When does the LED light for the Sink? Source?

• Which gives the brighter light?

19

To Drive an LED#include <avr/io.h>#include <avr/delay.h>

int main(void){

DDRB = (1<<DDRB4);PORTB = (1<<PORTB4);while(1){

_delay_ms( 3000);PORTB = 0b00000000; _delay_ms( 3000);PORTB = 0b00010000;

}}

VCC

GND

VCC

(PCINT4/XTAL2) PB4

VCC

Is LED on when PB4 is zero or one?

*To find definitions like PORTB4, open the m168def.inc file underC:\Program Files\Atmel\AVR Tools\AvrAssembler\Appnotes

20

m168def.inc

*C:\Program Files\Atmel\AVR Tools\AvrAssembler\Appnotes

;***** SPECIFY DEVICE ******************************************************.device ATmega168

;***** MEMORY MAPPED I/O REGISTER DEFINITIONS (&FF-$60) ********************.equ TCNT1H =$85.equ TCNT1L =$84.equ TCCR1C =$82.equ TCCR1B =$81.equ TCCR1A =$80.equ DIDR1 =$7F.equ DIDR0 =$7E

.equ TIMSK1 =$6F

.equ TIMSK0 =$6E

.equ PCMSK2 =$6D

.equ PCMSK1 =$6C

.equ PCMSK0 =$6B

;***** I/O REGISTER DEFINITIONS ($3F-$00) **********************************.equ SREG =$3F.equ SPH =$3E.equ SPL =$3D.equ SPCR =$2c.equ GPIOR2 =$2B.equ GPIOR1 =$2A.equ OCR0B =$28.equ OCR0A =$27.equ TCNT0 =$26.equ TCCR0B =$25.equ TCCR0A =$24.equ PORTD =$0B.equ DDRD =$0A.equ PIND =$09.equ PORTC =$08.equ DDRC =$07.equ PINC =$06.equ PORTB =$05.equ DDRB =$04.equ PINB =$03

;*****************************************************************************; Bit Definitions;*****************************************************************************; - Port B -.equ PORTB7 = 7 ; PORTB.equ PORTB6 = 6 .equ PORTB5 = 5 .equ PORTB4 = 4.equ PORTB3 = 3.equ PORTB2 = 2.equ PORTB1 = 1.equ PORTB0 = 0

.equ DDB7 = 7 ; DDRB

.equ DDB6 = 6

.equ DDB5 = 5

.equ DDB4 = 4

.equ DDB3 = 3

.equ DDB2 = 2

.equ DDB1 = 1

.equ DDB0 = 0

.equ PINB7 = 7 ; PINB

.equ PINB6 = 6

.equ PINB5 = 5

.equ PINB4 = 4

.equ PINB3 = 3

.equ PINB2 = 2

.equ PINB1 = 1

.equ PINB0 = 0

;**********TIMER_COUNTER_0************;TCCR0A:.equ COM0A1 =7.equ COM0A0 =6.equ COM0B1 =5.equ COM0B0 =4.equ WGM01 =1.equ WGM00 =0

21

Limited Agenda for Microprocessor

• External Interrupts– INT (Not covered)– PCINT (24 different interrupts)

• Internal Interrupts

• Timers / Counters (8-bit)– Timer (sec)– Pulse Width Modulation

• Setup of Software / Hardware Tools

22

Interrupts• Interrupts vs Polling

• Interrupts may lead to serious problems– Disable interrupts before reading variables

• External Interrupts – External Interrupt Request (INT0)

– Pin Change Interrupt (PCINT0)

• Internal Interrupts

23

Key Registers: PCINT external interrupts

1. PCMSK# (were # is either 0, 1 or 2)

2. PCICR

3. SREG

Bit 7 6 5 4 3 2 1 0

PCMSK2 PCINT 23 PCINT22 PCINT21 PCINT20 PCINT19 PCINT18 PCINT17 PCINT16

PCMSK1 - PCINT14 PCINT13 PCINT12 PCINT11 PCINT10 PCINT9 PCINT8

PCMSK0 PCINT7 PCINT6 PCINT5 PCINT4 PCINT3 PCINT2 PCINT1 PCINT0

Bit 7 6 5 4 3 2 1 0

0x68 - - - - - PCIE2 PCIE1 PCIE0

Bit 7 6 5 4 3 2 1 0

0x3f I T H S V N Z C

24

ATmega168 Pins

PDIP

PC5

PC4

PC3

PC2

PC1

PC0

GND

AREF

AVCC

PB5

PB4

PB3

PB2

PB1

PC6

PD0

PD1

PD2

PD3

PD4

VCC

GND

PB6

PB7

PD5

PD6

PD7

PB0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

(PCINT13)

(PCINT12)

(PCINT11)

(PCINT10)

(PCINT9)

(PCINT8)

(PCINT5)

(PCINT4)

(PCINT3)

(PCINT1)

(PCINT2)

(PCINT16)

(PCINT17)

(PCINT18)

(PCINT19)

(PCINT20)

(PCINT6)

(PCINT7)

(PCINT21)

(PCINT23)

(PCINT0)

(PCINT22)

(PCINT14)

25

1. PCMSK# – Pin Change Mask Register #

Bit 7 – 0: Pin Change Enable Mask• Each PCINT# bit selects whether pin change interrupt is enabled on the corresponding

I/O pin. If PCINT# is cleared, the pin change interrupt on the corresponding I/O pin is disabled.

Bit 7 6 5 4 3 2 1 0

PCMSK2 PCINT 23 PCINT22 PCINT21 PCINT20 PCINT19 PCINT18 PCINT17 PCINT16

PCMSK1 - PCINT14 PCINT13 PCINT12 PCINT11 PCINT10 PCINT9 PCINT8

PCMSK0 PCINT7 PCINT6 PCINT5 PCINT4 PCINT3 PCINT2 PCINT1 PCINT0

Read/Write R/W R/W R/W R/W R/W R/W R/W R/W

Initial Value 0 0 0 0 0 0 0 0

PCMSK2 = 1<<PCINT16 ;

If you decided to test for a change on Pin 2, the first thing to do is check the Pin Layout to determine what PCINT# corresponds to that pin – PCINT16 in this case. Checking the list of registers above, note that PCINT16 falls on the PCMSK2 register. Enabling a Pin Change interrupt on Pin 2 would consist of:

26

2. PCICR – Pin Change Interrupt Control Register

Bit # – PCIE#: Pin Change Interrupt Enable # where (# is 2, 1, or 0)• Whet the PCIE# bit is set (one) and the I-bit in the Status Register (SEG) is set (one), pin change

interrupt # is enabled.• Any change on any enabled pin will cause an interrupt. • The corresponding interrupt on Pin Change Interrupt Request is executed from the PCI1 interrupt

Vector.– PCIE2 enables PCINT 23 .. 16 pins and are enabled individually by the PCMSK2 register– PCIE1 enables PCINT 14 .. 8 pins and are enabled individually by the PCMSK1 register– PCIE0 enables PCINT 7 .. 0 pins and are enabled individually by the PCMSK0 register

Bit 7 6 5 4 3 2 1 0

0x68 - - - - - PCIE2 PCIE1 PCIE0

Read/Write R R R R R R/W R/W R/W


PCICR = 1<<PCIE2;

Since you just set register PCMSK2, you now have to enable that register by setting PCIE2 to 1.

27

3. SREG – AVR Status Register

Bit 7 – I: Global Interrupt Enable• The Global Interrupt Enable bit must be set for the interrupts to be enabled. • The individual interrupt enable control is then performed in separate control registers. • If the Global Interrupt Enable Register is cleared, none of the interrupts are enabled

independent of the individual interrupt enable settings.

Bit 7 6 5 4 3 2 1 0

0x3f I T H S V N Z C

Read/Write R/W R/W R/W R/W R/W R/W R/W R/W


SREG = 1<<SREG_I ;

Finally, you must set the I bit in SREG enabling internal and external interrupts that have been set to operate. To stop all interrupts, just set SREG_I to 0.

28

Enabling External Interrupts

The following code enables interrupts on the PCINT16 pin (e.g., pin 2)

SREG = 1<<SREG_I ;PCICR = 1<<PCIE2;PCMSK2 = 1<<PCINT16 ;

What do you want to happen after an interrupt is detected?

29In AVR Studio, select Help -> avr-libc Reference Manual

30

Vector name Description Applicable for device

PCINT0_vect Pin Change Interrupt Request 0

ATmega162, ATmega165, ATmega165P, ATmega168P, ATmega169, ATmega169P, ATmega325, ATmega3250, ATmega3250P, ATmega328P, ATmega329, ATmega3290, ATmega3290P, ATmega32HVB, ATmega406, ATmega48P, ATmega645, ATmega6450, ATmega649, ATmega6490, ATmega88P, ATmega168, ATmega48, ATmega88, ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega324P, ATmega164P, ATmega644P, ATmega644, ATtiny13, ATtiny43U, ATtiny48, ATtiny24, ATtiny44, ATtiny84, ATtiny45, ATtiny25, ATtiny85, AT90USB162, AT90USB82, AT90USB1287, AT90USB1286, AT90USB647, AT90USB646


ATmega162, ATmega165, ATmega165P, ATmega168P, ATmega169, ATmega169P, ATmega325, ATmega3250, ATmega3250P, ATmega328P, ATmega329, ATmega3290, ATmega3290P, ATmega32HVB, ATmega406, ATmega48P, ATmega645, ATmega6450, ATmega649, ATmega6490, ATmega88P, ATmega168, ATmega48, ATmega88, ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega324P, ATmega164P, ATmega644P, ATmega644, ATtiny43U, ATtiny48, ATtiny24, ATtiny44, ATtiny84, AT90USB162, AT90USB82


ATmega3250, ATmega3250P, ATmega328P, ATmega3290, ATmega3290P, ATmega48P, ATmega6450, ATmega6490, ATmega88P, ATmega168, ATmega48, ATmega88, ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega324P, ATmega164P, ATmega644P, ATmega644, ATtiny48

Defining an Interrupt Routines

ISR(PCINT2_vect) {

... // Code to handle the event.

}

Note that this routine is called whenever pins PCINT23..16 have logical changes. How do you determine which pin actually changed? (Harder than you would think!)

31

Example of External Interrupt#include <avr/io.h>#include <avr/interrupt.h>

ISR( PCINT2_vect ) /* Code to execute when external interrupt on PCINT23 .. 16 is triggered by a logic change*/{

PORTB = PORTB ^ 0x02;}

int main(void){

// Setup for External Interrupt PCINT16 (uses pin 2 or PD0)SREG = ( 1<<SREG_I ); // Enables global interruptsPCICR = ( 1<<PCIE2 ); // Enables vector interrupts on PCINT23 .. 16 PCMSK2 = ( 1<<PCINT16 ); // Enables individual interrupt PCINT16 only

DDRB = 1 << PORTB1;

while(1);

}

32

Internal Interrupts VectorNo. Program Address(2) Source Interrupt Definition

1 0x0000(1) RESET External Pin, Power-on Reset, Brown-out Reset and Watchdog System Reset

2 0x0002 INT0 Externa l Interrupt Request 0

3 0x0004 INT1 Externa l Interrupt Request 1

4 0x0006 PCINT0 Pin Change Interrupt Request 0

5 0x0008 PCINT1 Pin Change Interrupt Request 1

6 0x000A PCINT2 Pin Change Interrupt Request 2

7 0x000C WDT Watchdog Time-out Interrupt

8 0x000E TIMER2 COMPA Timer/Counter2 Compare Match A

9 0x0010 TIMER2 COMPB Timer/Counter2 Compare Match B

10 0x0012 TIMER2 OVF Timer/Counter2 Overfl ow

11 0x0014 TIMER1 CAPT Timer/Counter1 Capture Event

12 0x0016 TIMER1 COMPA Timer/Counter1 Compare Match A

13 0x0018 TIMER1 COMPB Timer/Coutner1 Compare Match B

14 0x001A TIMER1 OVF Timer/Counter1 Overfl ow

15 0x001C TIMER0 COMPA Timer/Counter0 Compare Match A

16 0x001E TIMER0 COMPB Timer/Counter0 Compare Match B

17 0x0020 TIMER0 OVF Timer/Counter0 Overflow

18 0x0022 SPI, STC SPI Seria l Transfer Complete

19 0x0024 USART, RX USART Rx Complete

20 0x0026 USART, UDRE USART, Data Regis ter Empty

21 0x0028 USART, TX USART, Tx Complete

22 0x002A ADC ADC Convers ion Complete

23 0x002C EE READY EEPROM Ready

24 0x002E ANALOG COMP Analog Comparator

25 0x0030 TWI 2-wire Seria l Interface

26 0x0032 SPM READY Store Program Memory Ready

33

Timers/Counter

• Most commonly used complex peripherals• Think of them as binary up-counters

– In timing mode, count time periods– In counting mode, counting events or pulses

• 8-bit and 16-bit Timers available– ATmega168

• Timer/Counter 0– 8-bit Timer/Counter with Prescaler – Two PWM Channels

• Timer/Counter 1– 16-bit High Speed Timer/Counter with Separate Prescaler– 2 High Frequency PWM Outputs

• Timer/Counter 2– 8-bit Timer/Counter with Prescaler – Two PWM Channels

34

Normal Mode

• High Frequency• Single Slope

• Counter Counts only from Bottom to Top

Timer/Counter Register n(TCNTn)

Top (0xFF)

Bottom (0x00)

Trips Timer/Counter Overflow Flag

35

Key Registers to enable Timer1. TCCR0A – Timer/Counter0 Control Register A

2. TCCR0B – Timer/Counter0 Control Register B

3. TIMSK0 – Timer/Counter Interrupt Mask Register

4. TIFR0 – Timer/Counter Interrupt Flag Register

Bit 7 6 5 4 3 2 1 0

0x24 COM0A1 COM0A0 COM0B1 COM0B0 - - WGM01 WGM00

Bit 7 6 5 4 3 2 1 0

0x25 FOC0A FOC0B - - WGM02 CS02 CS01 CS00

Bit 7 6 5 4 3 2 1 0


Bit 7 6 5 4 3 2 1 0

0x25 - - - - - OCF0B OCF0A TOV0

36

1. TCCR0A RegisterBit 7 6 5 4 3 2 1 0


Bit 1-0 : Waveform Generation Mode• Combined with the WGM02 bit found in the TCCR0B Register, these bits control the counting

sequence of the counter, the source of the maximum (TOP) counter value, and what type of waveform generation to be used.

Set for Normal Mode (Note we still have to set WGM02 in the TCCR0B Register.)

TCCR0A = (0<<WGM00);

Mode WGM02 WGM01 WGM00 Timer/Counter

Mode of Operation TOP Update of OCRx at

TOV Flag

Set on(1)(2)

0 0 0 0 Normal 0xFF Immediate MAX

1 0 0 1 PWM, Phase Correct 0xFF TOP BOTTOM

2 0 1 0 CTC OCRA Immediate MAX

3 0 1 1 Fast PWM 0xFF BOTTOM MAX

5 1 0 1 PWM, Phase Correct OCRA TOP BOTTOM

7 1 1 1 Fast PWM OCRA BOTTOM TOP

37

2. TCCR0B RegisterBit 7 6 5 4 3 2 1 0


Bit 3 : Waveform Generation Mode• Use table from previous slide

Setting for Phase Correct PWM

TCCR0B = (0<<WGM02);



TOV Flag

Set on(1)(2)


1 0 0 1 PWM, Phase Correct 0xFF TOP BOTTOM





38

2. TCCR0B Register (Continued)Bit 7 6 5 4 3 2 1 0


Bit 2:0 : Clock Select• These bits select the clock source to be used by the Timer/Counter

Depends on the Frequency needed. We’ll choose no prescaler.

TCCR0B = (0<<WGM02) | (1<<CS00);

CS02 CS01 CS00 Description

0 0 0 No clock source (Timer/Counter stopped)

0 0 1 clkI/O/(No prescaling)

0 1 0 clkI/O/8 (From prescaler)




1 1 0 External clock source on T0 pin. Clock on falling edge.

1 1 1 External clock source on T0 pin. Clock on rising edge.

39

3. TIMSK0 RegisterBit 7 6 5 4 3 2 1 0

0x25 - - - - - OCIE0B OCIE0A TOIE0

Bit 0 - TOIE0: Timer/Counter0 Overflow Interrupt Enable• When the TOIE0 bit is written to one, and the I-bit in the Status Register is set, the Timer/Counter0

Overflow interrupt is enabled. The corresponding interrupt is executed if an overflow in Timer/Counter0 occurs, i.e., when the TOV0 bit is set in the Timer/Counter 0 Interrupt Flag Register – TIFR0.

Enabling Timer/Counter Overflow Interrupt

TIMSK0= (1<<TOIE0);

40

4. TIFR0 RegisterBit 7 6 5 4 3 2 1 0

0x25 - - - - - OCF0B OCF0A TOV0

Bit 0 - TOV0: Timer/Counter0 Overflow Flag• The bit TOV0 is set when an overflow occurs in Timer/Counter0. TOV0 is cleared by hardware when

executing the corresponding interrupt handling vector. Alternatively, TOV0 is cleared by writing a logic one to the flag. When the SREG I-bit, TOIE0, and TOV0 are set, the Timer/Counter0 Overflow interrupt is executed.

(The setting of this flag is dependent on the WGM02:0 bit settings. Refer to the previous table)

Clear the Timer/Counter Overflow flag (e.g., initiate the overflow counter)

TIFR0 = (1<<TOV0);

41

Internal Interrupt Timer/Counter0 Overflow

1. Select avr-libc Reference Manual2. Choose Library Reference3. Identify Module to include in code4. Click on Module

42

Internal Interrupt (Continued)

ISR ( ?_vect){ //place code to be executed on this interrupt}

5. Find Correct InterruptVector

6. Write Code to be executed upon theinterrupt

43

PWM Modes

1 2 3 4 5 6 7

Timer/Counter Register n(TCNTn)

Top (0xFF)

Bottom (0x00)

OCROx Value

OCn

OCn

Period

1 2 3

TCNTn

OCn

OCn

Period

Top (0xFF)

Bottom (0x00)

OCROx Value

Fast PWM Mode• High Frequency• Single Slope

•Counter Counts only from Bottom to Top

• Suited for power regulation, rectification, and DAC application

Phase Correct PWM Mode• Lower Frequency• Dual Slope

•Counter Counts up the down

• Suited for motor control applications

44

Phase Correct PWM Timer/Counter 0 (8-bit)

• Set Frequency– Prescaler

• Determine Bit Resolution

• Set Duty Cycle– Determined by OCR0x

log( 1)

log 2PCPWM

TOPR

_ / N is prescaler divider (1, 8, 64, 256 or 1024)(1 )clk I O

OCnxPWM

ff

N TOP

45

ATmega168 Pins

PDIP

PC5

PC4

PC3

PC2

PC1

PC0

GND

AREF

AVCC

PB5

PB4

PB3

PB2

PB1

PC6

PD0

PD1

PD2

PD3

PD4

VCC

GND

PB6

PB7

PD5

PD6

PD7

PB0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

(OC2A)

(OC1A)

(OC2B)

(OC0B)

(OC0A)(OC1B)

46

Key Registers to enable Phase Correct PWM

1. TCCR0A – Timer/Counter0 Control Register A

2. TCCR0B – Timer/Counter0 Control Register B

3. OCR0x – Output Compare Register x

An 8-bit Register where x stands for either A or B.

e.g., Timer 0 has Output on PD6 (Pin 12) for OC0A and PD5 (Pin 11) for OC0B

We’ll use A for our example.

Bit 7 6 5 4 3 2 1 0


Bit 7 6 5 4 3 2 1 0


47

1. TCCR0A RegisterBit 7 6 5 4 3 2 1 0


Read/Write R/W R/W R/W R/W R R R/W R/W


Bit 7- 6 : Compare match Output A Mode• These bits control the Output Compare pin (OC0A) behavior. If one or both of the COM0A0:1 bits

are set, the 0C0A output overrides the normal port functionality of the I/0 pin it is connected to.• Note, however, that the Data Direction Register (DDR) bit corresponding to the OC0A pin must be

set to enable the output driver

We’ll set COMOA to 3. TCCR0A = (3<<COMOA0);

COM0A1 COM0A0 Description

0 0 Normal port operation, OC0A disconnected.

0 1WGM02 = 0: Normal Port Operation, OC0A Disconnected. WGM02 = 1: Toggle OC0A on Compare Match.

1 0Clear OC0A on Compare Match when up-counting. Set OC0A on Compare Match when down-counting.

1 1Set OC0A on Compare Match when up-counting. Clear OC0A on Compare Match when down-counting.

48

1. TCCR0A Register (Continued)Bit 7 6 5 4 3 2 1 0


Bit 1-0 : Waveform Generation Mode• Combined with the WGM02 bit found in the TCCR0B Register, these bits control the counting

sequence of the counter, the source of the maximum (TOP) counter value, and what type of waveform generation to be used.

Set for Phase Correct PWM (Note we still have to set WGM02 in the TCCR0B Register.)

TCCR0A = (3<<COMOA0) | (1<<WGM00);



TOV Flag

Set on(1)(2)


1 0 0 1PWM, Phase Correct 0xFF TOP BOTTOM





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2. TCCR0B RegisterBit 7 6 5 4 3 2 1 0


Bit 3 : Waveform Generation Mode• Use table from previous slide

Setting for Phase Correct PWM

TCCR0B = (0<<WGM02);



TOV Flag

Set on(1)(2)


1 0 0 1PWM, Phase Correct 0xFF TOP BOTTOM





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2. TCCR0B Register (Continued)Bit 7 6 5 4 3 2 1 0


Bit 2:0 : Clock Select• These bits select the clock source to be used by the Timer/Counter

Depends on the Frequency needed. We’ll choose a prescaler of 8.

TCCR0B = (0<<WGM02) | (2<<CS00);

CS02 CS01 CS00 Description

0 0 0 No clock source (Timer/Counter stopped)

0 0 1 clkI/O/(No prescaling)





1 1 0 External clock source on T0 pin. Clock on falling edge.

1 1 1 External clock source on T0 pin. Clock on rising edge.

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3. OCR0A Register

The Output Compare Register A contains an 8-bit value that is continuously compared with the counter value (TCNT0). A match can be used to generate an Output Compare Interrupt, or to generate a waveform output on the OC0A pin.

For PWM, this will be how you set the duty cycle by setting it equal to the duty cycle times to TOP value. For example, to set this to a 50% duty cycle for our example,

Or, we can let the computer do the math!

TCCR0A = (3<<COMOA0) | (1<<WGM00); TCCR0B = (0<<WGM02) | (2<<CS00); OC0A = (unsigned int) 0.50 * 255;

OC0A 0.50*255

128

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Arithmetic Operators

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Data Access and Size Operators

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Miscellaneous Operators

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Relational & Logical Operators

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Bitwise Operators

AND OR XOR

0 & 0 = 0 0 | 0 = 0 0 ^ 0 = 0

0 & 1 = 0 0 | 1 = 1 0 ^ 1 = 1

1 & 0 = 0 1 | 0 = 1 1 ^ 0 = 1

1 & 1 = 1 1 | 1 = 1 1 ^ 1 = 0

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Steps to Programming

1. Write Program (AVR Studio)a) Write Code (One module at a time!)b) Debug in Simulator mode*c) Create .hex code

2. Transfer code to Chipa) Connect USB Programmer (AVRISP MKII)

to computer and breadboardb) Use AVR Studio to download program

3. Place chip in final position and run*Turn off the compiler's optimization for debugging.

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AVR Studio 4.13

Select New Project

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Create a new Project

1. Select AVR GCC for programming in C2. Select Project Name (no spaces)3. Set Location to your folder4. Click “Next”

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1. Use “AVR Simulator”2. Select “ATmega168”3. Click “Finish”

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Create the Code

1. Enter Code2. Select “Build”3. Choose “Debug”

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Debug Program

Walk through code,watch settings forPORTB, DDRB, and PINB in lowerright pane.

Note: LED lights up when PB4 is “off”

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Setup Breadboard for Programming ATmega168

Connect USB Programmer to computer and 6-pin header to breadboard

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Atmel’s AVRISP mkIIUSB ISP

LED Color Description

Red Idle – No target power

Green Idle – With target power

Orange Busy – Programming

Orange blinkingReversed target cable connection, or not correct pull-up on the reset line.

Red blinking Short-circuit on target

Red-Orange blinking

Upgrade mode

There is also a green LED inside the AVRISP mkII enclosure next to the USB connector. This LED indicates USB traffic

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Make Connection to AVRISP mkII

Click “Connect”

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Make Connection to AVRISP mkII

Select “AVRISP mkII” and click “Connect…”

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Verify Parameters (1/3)

1. Correct Device2. Select ISP Frequency > 5K

(Caution: too high and it won’t transfer)

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Be sure to select theInternal clock as selectingan external may lock-up thedevice until you connectan oscillator.

De-select CKDIV8 (divides clock by 8)

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Set Path to HEX file

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Download Program

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Structure of Code

//Definitions#define THRESHOLD 125 /* Light Threshold */

//Global Variablesint speed

//Functionsvoid motor (int mtr, int speed){

…}

//Behaviorsvoid behaviors(){

…}

//Mainvoid main (){

…}

In th

is O

rder

!

1 the use of microcontrollers using atmel’s atmega168 as an example

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