07_chiu

7/24/2019 07_chiu

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Illinois Center for

Wireless Systems

Integrated-Circuits Research forWireless Communications

Prof. Yun Chiu

Coordinated Science Laboratory

Electrical and Computer EngineeringUniversity of Illinois at Urbana-Champaign

Email: [email protected]

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Executive Team

g Faculty: Deming Chen, Yun Chiu, Milton Feng, Ada

Poon, Elyse Rosenbaum, Naresh Shanbhag, TimothyTrick, Martin Wong

g 30 graduate students

g Analog/MMRF Integrated Circuits: (Chiu, Feng, Poon,

Rosenbaum, Trick)

g VLSI for DSP and Communications: (Shanbhag)

g Integrated Circuits Reliability: (Rosenbaum)

g CAD for VLSI: (Chen, Wong, Trick)

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VLSI in Communications (Shanbhag) Applied Communication &

Digital Signal Processing Theory

VLSI Architectures

Integrated Circuit Design

Communication ICs

Communications-

inspired SOC

AT&T:LAN

AT&T:VDSL

Intersymbol:EDC

UIUC:LDPC

UIUC:MAP

UIUC:ANT

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VLSI in Communications (Shanbhag)

g Communication IC design

iFEC-based high-speed serial links (w/ Rosenbaum)

iLow-power turbo and LDPC decoders

g Communications-Inspired Design

iStochastic sensor network-on-a-chip (w/ Doug Jones)

iSystem level power optimization of low-power links (w/ AndySinger)

iError-resilient high-data rate 4G Viterbi decoders

iRobust SRAM design

iJoint equalization and coding for on-chip busses

iLow-power media kernels

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IC Reliability (Rosenbaum)

g Electrostatic discharge (ESD) events are unavoidable

during IC shipping, system assembly, and productuse

g ESD causes catastrophic damage to CMOS ICs

g On-chip ESD protection circuits are required

g Protection circuits load high-frequency I/O pins,

degrading gain, impedance matching and noise

figure

iDevelop protection circuits with minimal capacitance

iCo-design for performance and reliability

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Co-Design Example: UWB LNA (Rosenbaum)

g Transistor gm controls input

match

i gm selection depends onCESD

g Common-base topology has

power and area advantages

over the more typically used

common-emitter

g A second LNA with no inductor

was also designed.

i Transistor size was halved

to maintain BW.i Increased base resistance

increases NF.

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UWB LNA Measurement Results (Rosenbaum)

0.18μm SiGe

BiCMOS

0.18μm SiGe

BiCMOS

0.18μm SiGe

BiCMOS

Technology

0> 1.5 kV> 1.5 kVESD Protection

27 mW3.65 mW3.65 mWPower dissipation

2.7 V2.7 V2.7 VVCC

IIP3 = 0dBm-1dBCP = -16.8dBm-1dbCP = -17.1dBmLinearity

< -10dB< -10dB< -10dBS11

4.5dB @ 10GHz5.65dB @ 10GHz4.7dB @ 10 GHzNoise Figure

2 – 10 GHzDC – 17 GHzDC – 10 GHz-3dB BW

21 dB16.1 dB17.0 dB @ 2GHz19.1 dB at 7GHz

S21

CE cascode*

[Ismail, ISSCC04]

Zero-inductor CBOne-inductor CB

*3 inductors, largest area

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RF MOS Research for Wireless ommunication

F MOS Research for Wireless ommunication

Professor Milton FengProfessor Milton Feng--HSIC Group at UIUCHSIC Group at UIUC

Power Ampl ifier for Wimax

Low Noise Amplif ier for UWB

4Gs/s Track & Hold Amplifier

PA LNA 900

ADC

ADC

900

DAC

DAC

VCO PLL

IQ Modulator IQ Demodulator DSP DSPRF FRONT END

PA LNA 900

ADC

ADC

900

DAC

DAC

VCO PLL

IQ Modulator IQ Demodulator DSP DSPRF FRONT END

HS

C

DeviceModel

CircuitDesign

CMOS Transceiver Design Research at HSIC

Noise Characterization and Model

for Submicron MOSFET

Test Key Layout

Characterization System

0

2

4

6

8

10

0 5 10 15 20 25

Frequency (GHz)

N F m i n ( d B )

0

5

10

15

20

25

A s s o c

i a t e d G ai n G a ( d B )

Model vs Data of a 130nm MOSFET

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Analog/MMRF Integrated Circuits (Chiu)

g Adaptive Digital Calibration of Data Converters

iLow-power pipeline ADC (10-14 b, ≥100 MS/s) for WiMAX,

SDR

iLow-power interleaved ADC arrays (6 b, 1-10 GS/s) for

UWB, SONET

g

Digitally Enhanced RF CircuitsiDigital adaptive equalization of WiMAX RF transmitter

iCMOS MIMO beamforming receiver for 802.11n (w/ Prof. A.

Poon)

g Comm. IC Building Blocks (Clock, P/DLL, CDR)iLow-power dual-loop digital DLL for multi-phase clock

generation

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† In collaboration with UC Berkeley (P. Gray, R. Brodersen, and B. Nikolic)

• Wiener filter-based adaptive digital background calibration

• Analog speed and accuracy decoupled into two separate paths

12b 400MS/s Pipeline ADC for SDR (Chiu)†

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Proposed solution ADI 12401

ADC Architecture Pipeline Interleaving

Calibration method LMS Dig. Bkgd. Filter bank DSP

Resolution 12 bits 12 bits

SNR 65 dB 64 dB

Sample rate 400 MS/s 400 MS/s

Supply voltage 1.2 V 3.7/3.5/1.5 V

Reference voltage 1 V (diff. p-p) ?

Power consumption ≤ 500 mW (analog) 6.8 W

Technology 0.13-μm CMOS 0.35-μm?

12b 400MS/s Pipeline ADC for SDR (Chiu)

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Adaptive Digital Filter compensates PA nonlinearities (am-am, am-pm)

Prototype Design in 0.13-μm CMOS

Digitally Equalized WiMAX RF Transmitter (Chiu)

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64QAM OFDM Modulation (WiMAX)

Ideal output spectrum Distorted spectrum Compensated spectrum

EVMRMS= 4.2%

ACPR = 67 dB

EVMRMS= 92%

ACPR = 54 dB

Digitally Equalized WiMAX RF Transmitter (Chiu)

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1 - m

D E M U X

m

- 1 M U X

• Prototype implemented in 0.13-µm digital CMOS w/ 1.2-V supply

• Projected analog power consumption is 20 mW

Chip layout (2×2 mm2)

1GS/s 6b Low-Power ADC for UWB (Chiu)

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