CDE3 P

Nano Tech Co., Ltd.

D DIFFUSION

1-1 FURNACE 1-2 WET STATION

1. ROADMAP

2-1 FURNACE2-2 WET STATION

2.

3-1 ISOLATION3-2 GATE OXIDATION3-3 DIELECTRICS3-4 TOOLS3-5 CLEANING

3. ROADMAP

4-1 OXIDATION4-2 DIFFUSION4-3 CLEANING

4.

5-1 NOx GATE5-2 HSG(SAES)5-3 Ta2O55-4 CLUSTER TECHNOLOGY5-5 MARANGONI DRYER TECHNOLOGY

5.

CDE3 P

Nano Tech Co., Ltd.

1 ROADMAP1995 1996 1997 1998 1999 2000 2001 2002 2003

DRAM(bits)Design Rule

FURNACE

Furnace

RTP (single)

FTPS

Batch Batch or Single Mini-batch or Single

64M 256M 1G

0.35um 0.25um 0.18um

16M

WET STATION

1-bath type

Single process type

Mini-batch

Single process

Wet Station

Through-put BIG

Uniformity GOOD

Thermal damage SMALL

Uniformity GOOD

Wet STATION Single/

Through-put BIG

Uniformity GOOD

Furnace Single /

CDE3 P

Nano Tech Co., Ltd.

1-1FURNACE ROADMAP

1995 1996 1997 1998 1999 2000 2001 2002 2003

DRAM(bits)Design Rule

FURNACE

64M 256M 1G

0.35um 0.25um 0.18um

16M

1 boat boat cooling,W/F handling time

Furnace

FTPSfurnace

SINGLEPROCESS

L/Lfurnace

dual boatfurnace

dual chamberfurnace

through-put * processing time W/F handler

through-put * W/F handling time reactor

natural oxide control* W/F loading area L/L N2 loading

thermal damage * REACTOR up/down time throughput up

thermal budget * , cluster

1 chamber , processing W/F handler

ch-amber boat-in W/F N2

reactor up/down stan-dby processtime

W/F up/down thermal budget, through-put

CDE3 P

Nano Tech Co., Ltd.

1-2WET STATION ROADMAP

1995 1996 1997 1998 1999 2000 2001 2002 2003

DRAM(bits)Design Rule

WETcleaning

64M 256M 1G

0.35um 0.25um 0.18um

16M

WETSTATION

SGL PROCESSCLEANER

WET STATION

1-BATHCLEANER

through-put * BATH 1-step:1-bath

footprint * bath step:1-bath

quality * cluster

- throughput - bath -

- ,

- footprint - - cross contamination

- footprint - -

- W/S through-put - / -

- cluster - W/F count conta-

mination - - through-put - water mark

CDE3 P

Nano Tech Co., Ltd.

2

Furnace WET Station

Controledfactor

1) : 2) : GAS

1) T/C(Thermocouple)2) gas MFC3) Pirani

1) : , Megasonic2) : CHEMICAL, DIW

factor

1) T/C, Pt 2)CHEMICAL Level 3)DIW Resistivity

1),,2)//

1)Diffusion 2)Metal 3)PR/Si3N4 film strip

1)DEPO rate & ETCH rate2) calibration 3)MFC calibration 4)Contamination Lifetime, C-V plot5) particle & reaction particle6)Q'tz & SiC cleaning 7)Base pressure & leak rate (LPCVD)8)O2 concentration (LoadLock)9) 10)MTTR & MTBF11)PART

1)ETCH rate2)Chemical & DIW 3)DIW Resistivity4)Chemical concentration5)Contamination Lifetime, DIW 6) particle 7)DIW 8)9)MTTR & MTBF10)PART

CDE3 P

Nano Tech Co., Ltd.

FURNACE 2-1

GAS /

GASJUNGLEBOX

GASIN EXHAUST

boat cap

boat

wafer

O-ring

elevator

TRANSFER

HeatingchamberGAS IN

CDE3 P

Nano Tech Co., Ltd.

FURNACE 2-1

DUAL BOATFURNACE

: boat process backup boatcooling & W/F loading/unloading , time loss

GASJUNGLEBOX

H2O2N2

EXHAUST

burningbox

boat cap

boat

wafer

O-ring

elevator

H2OH2,O2

TRANSFER

EXHAUST

boat cap

boat

wafer

O-ring

elevator

boat cap

boat

boatexchanger

backupboat

CDE3 P

Nano Tech Co., Ltd.

FURNACE 2-1

DUAL CHAMBERFURNACE

: 1 2 chamber , process time boatcooling W/F handling time , conventional type2 capa-up

chamber-2

GASJUNGLEBOX

H2O2N2

EXHAUST

burningbox

boat cap

boat

wafer

O-ring

elevator

H2OH2,O2

TRANSFER

chamber-1

boat cap

boat

elevator

boat cap

boat

elevator

CDE3 P

Nano Tech Co., Ltd.

FURNACE 2-1

: boat up/down reactor O2 , sealing gas N2

EXHAUST

boat cap

boat

wafer

elevator

LoadLock room

GASJUNGLEBOX

SiH2Cl2NH3N2

EXHAUST

TRANSFER

boat cap

boat

wafer

O-ringelevator

vacuumpump

pressurecontrolmodule

vacuumpump

N2input

LOADLOCKFURNACE

CDE3 P

Nano Tech Co., Ltd.

2-1FURNACE

GASJUNGLEBOX

H2O2N2

EXHAUST

burningbox

boat cap

boat

wafer

O-ring

elevator

H2OH2,O2

TRANSFER

boat cap

boat

elevator

: heating chamber process tube cooling N2 chamber

cooler

coolingN2

EXHAUST

heatingchamber

heating chamber /

FTPS(Fast Temperature

Process System)

CDE3 P

Nano Tech Co., Ltd.

2-2 WET STATION

DEVICE

Wafer , New Concept Dryer

COST

High Throughput

SPIN

IPA V/D IPA

Water Mark

Chemical

NEW

NEW

NEW CONCEPT

- MARANGONI DRYER

- TEL NEW DRYER

- ION FILTERING

: Wafer

CDE3 P

Nano Tech Co., Ltd.

2-2WET STATION

WETSTATION

: 200mm WAFER ,

SPM

QDR

APM

QDR

DHF

OFR

HPM

QDR

FR

LOADER UNLOADER ROBOT TRACK

CLEANING BATHS

3. 1)2)Foot print3)Cross contamination 4)Flexibility

2. 1)Throughput2) BATH3)4)Knowhow 5)6)

1. BATH, WAFER.

CDE3 P

Nano Tech Co., Ltd.

2-2WET STATION

1-BATHCLEANER

: WET STATION 300mm , BATH

1-BATH 1

1-BATH 2

1-BATH 3

1. 1) 1-BATH type : BATH

2) 2-BATH type : , BATH 1-BATH

Loader / Unloader 2. 1)2)Foot print3)Cross contamination 4)Flexibility 5)

2-BATH 1

2-BATH 2

2-BATH 33.

1)Throughput2) BATH,

3)4)New type Knowhow 5)6),

Loader / Unloader

CDE3 P

Nano Tech Co., Ltd.

2-2WET STATION

SINGLE PROCESSCLEANER

: ,Cluster

Chamber

PVD Chamber

CVD Chamber-1

CVD Chamber-2

1. , Cluster , Chamber

2. 1) Cluster,

Time delay2) 3)Batch type batch wafer Count contamination

4)

3. 1)Throughput2)Water mark 3)Knowhow 4) Cluster 1,

CDE3 P

Nano Tech Co., Ltd.

2-2 WET STATION

: Wafer

CONVENTIONAL WET-STATION Chemical Bath Mecha Wafer System

L C/CSC1

(C,M)QDR

DHF(C)

OF FRIPAV/D

Me

Me

Me : Mecha L : Load UL : Unload C/C : Chuck Clean SC1(APM,U) : NH4OH+H2O2+DIW C : Circulation M : Megasonic QDR : Quick Dump Rinse DHF : Dilute HF OF : Over Flow FR : Final Rinse V/D : Vapor Dry

TWIN BATH SYSTEM(SUGAI)

L/ULDHFOFDRY

SC1(C,M)RINSE

C/C

UL

REDUCED BATH SYSTEM(TEL)

Me

APM

QDR

DHF

OF

IPAV/D

C/C

MeMe

SINGLE BATH SYSTEM(CFM)

CHEMICAL

DI BYPASS

N2IPA

DI/IPA DRAIN

DI

CDE3 P

Nano Tech Co., Ltd.

2-2 WET STATION

:

MULTY BATH SYSTEM (PRE CLEANING)

L C/CSC1

(C,M)QDR

DHF(C)

OF FRIPAV/D

Me

UL

MeMe

PROCESS : SC1 -> RINSE -> HF -> RINSE -> DRY

SC1:NH4OH+H2O2+DIW- Organic, I,II Metal

DHF:HF+DIW- , Metal

QDR BATH- DIW() - HOT/COOL Shower

OF BATH:QDR FR BATH: IPA V/D: IPA

OUTER BATH

INNER BATH

FILTER

PUMP

HEATER

DAMPER

Circulation

Outer Bath Chemical

Pump

Damper

Heater

Filter

Inner Bath

CIRCULATION SYSTEM

PROCESS

CHEMICAL ->

PUMPING ->

DAMPERING ->

HEATING ->

FILTERING ->

INNER BATH

CDE3 P

Nano Tech Co., Ltd.

3 ROADMAP1995 1996 1997 1998 1999 2000 2001 2002 2003

DRAM(bits)Design Rule

64M 256M 1G

0.35um 0.25um 0.18um

16M

Dielectric

Isolation

M-LOCOS - Transition period- Not scalable

C-LOCOS - Bird"s beak - Field thinning effect- Boron

* * Thermal burget (1000)

* Etch damage * Plug stress

Tools

DTI, SEG - Bird's beak free- High latch-up imunity- Perpect planarity- Low RC delay- Scalable

Gate Thickness > 65- PLANAR GATE- STACK

Thickness ~ 50- DUAL GATE - THIN OX

Thickness ~ 40- METAL GATE-

* Gox* Channel *

NO, HSG(SAES) Ta2Ox-MIM- TiN

Ta2Ox-MIS- TiN

BST-MIM, STO- Stack

* .* UV-O2 *

Vertical furnace- Large batch- Hot Wall

V/F, FTPS, RTP- Large & Mini batch,Single type

- Cold & Hot Wall

Single processor

-- Cluster

* * Cluster

Cleaning Wet cleaning- Cassette type

Wet & Dry cleaning- Carrierless, Single process

* Dry cleaning * New dry * Cluster

New cleaning- Cluster

CDE3 P

Nano Tech Co., Ltd.

3-1ISOLATION ROADMAP

1995 1996 1997 1998 1999 2000 2001 2002 2003

DRAM(bits) 64M 256M 1GDesign rule 0.35um 0.25um 0.18um

16M

Structure

- Transition period- Not Scalable

- Bird"s beak - Field Thinning Effect- Boron - Not Scalable

*

* Masking Layer(NiT/Ox)

* Trench Formation(Etch)

* Liner Formation(ThermalOx)

* Side-Wall I/I(Angle I/I)

* Trench Filling(O3-TEOS)

* Planarization(CMP/RIE)

- Bird's Beak Free- High latch-up imunity- Perpect Planarity- Low RC Delay- Scalable

Scheme C-LOCOS PTI (M-LOCOS) PTI+(DTI)

Remarks

Cell pitch 1.2 ~ 0.9um 0.9 ~ 0.6um 0.6 ~ 0.4um

Coventional LOCOSModified-LOCOSSTI(Shallow Trench Isolation)PTI(Profiled Trench Isolation)PBL(Poly Buffered LOCOS)PSL(Poly Sidewall LOCOS)OSELO(OffSEt nitride LOcos)

DTI(Deep Trench Isolation)SEG(Seleective Epitaxial

Growth)

* Thermal burget

* Etch damage

* Plug stress

Isolation pitch

Cross section

CDE3 P

Nano Tech Co., Ltd.

3-1 TRENCH IN ISOLATION TECHNILOGY

Limitation

1. B/B2. Stress & Defect3. Field Oxide Thinning4. Narrow width effect5. Junction Leakage6. Punchthrough7. Field Inversion

Modified LOCOSModified LOCOSPBL (Poly Buffered LOCOS)

- Nitride / Poly / Oxide- Oxidation Stress Relief- Shallow Isolation Depth

PSL (Poly Sidewall LOCOS)- Decrease of Oxide Thinning Effect- Planarization Problem

OSELO / OSELO II- Reduction of Encroachment- Stress Problem- Complex Process

Shallow Trench IsolationShallow Trench Isolation

- Minimized Isolation Width- Latch-up Prevention- Complex Process

SiNPoly

SiN Poly

Oxide

Conventional- LOCOS

* Idealized Isolation Structure

1. W = 0 (Zero B/B)2. Isolation Depth > 0.253. Planarity

IsolationDepth

PlanarityW

B/B = Bird's Beak LOCOS = LOCal Oxidation of Silicon OSELO = OffSEt nitride LOcos

CDE3 P

Nano Tech Co., Ltd.

3-1PROFILED TRENCH ISOLATION TECHNOLOGY

Profiled Trench Isolation ( PTI )Profiled Trench Isolation ( PTI )

- Minimized Isolation Width- Higher Latch-up Immunity- Neary Perfect Planarity- Complex Process

CVDSiO2

ITEM

Pad Masking Layer

Trench Si Etch

Coner Rounding

Trench Gap-Fill

Planarization

Process Integration

DIRECTIONS

Effective masking for Si-etch, CMP planarization

By simple thermal oxidation

No void, crack, defect on Si-sub

Single CMP with min, dishing effect

Minimum oxide recess at edges

Tapered angle with minimum surface damage

Narrowing space opening

REMARKS

Affeccted from light source

Difficult filling < 0.20um

Time -> EOP polishing

Tapered top coner etch

Bird's beak free

CDE3 P

Nano Tech Co., Ltd.

3-1 FUTURE ISOLATION TECHNOLOGY

Deep Trench Isolation ( DTI )Deep Trench Isolation ( DTI )+ Burried Layer

- Wel to Well Isolation for Latch-up Free

- Large Layout Shrinkage in LOGIC

- Gap Fill Difficulty

PW

N-Shield

Burried Layer

NW PW

Peri Cell

SelectiveSelective EpitaxialEpitaxial Growth ( SEG )Growth ( SEG )

- Advanced Epitaxial Technilogy

- No Gap Fill Limitation

- Perfect PlanaritySi-Sub

SiO2

Si-Sub

SiO2Epi Epi

CDE3 P

Nano Tech Co., Ltd.

3-1GATE DIELECTRIC

1995 1996 1997 1998 1999 2000 2001 2002 2003

DRAM(bits) 64M 256M 1G

Design rule 0.35um 0.25um 0.18um16M

Gate > 6.5nm ~ 5.0nm ~ 4.0nm Oxide thickness

Gate film SiO2 SiON/SiO2 Ta2O5/SiO2

Gate node W Policide Ti Salicide Co or Ni Salicide

S/D node Si Ti Salicide Co or Ni Salicide

Capa. insulator Si3N4 Ta2O5 Insulator

S/D Node

Node

Film

Shallow JN Gox SiO2 Film SiO2 Film Limit

Gate Line d-poly Si Si3N4 Film

CDE3 P

Nano Tech Co., Ltd.

3-2GATE OXIDATION

1995 1996 1997 1998 1999 2000 2001 2002 2003

DRAM(bits) 64M 256M 1GDesign rule 0.35um 0.25um 0.18um

16M

Gate insulator

- Transition period- Not Scalable

- Bird"s beak - Field Thinning Effect- Boron - Not Scalable

* * Masking Layer(NiT/Ox)* Trench Formation(Etch)* Liner Formation(Thermal

Ox)* Side-Wall I/I(Angle I/I)* Trench Filling(O3-TEOS)* Planarization(CMP/RIE)

- Bird's Beak Free- High latch-up imunity- Perpect Planarity- Low RC Delay- Scalable

Tr. transition LDD Gate overlap LDD New SA

Remarks

Gate > 6.5nm ~ 5.0nm ~ 4.0nm

Twin WellN+-Poly/PolicideSD(Single Drain)DD(Double Drain)LDD(Light Doped Drain)

Wet oxStack

NEW Well Structure- Thin SOI- Self Aligned Structure-- dopingMetal Gate

Low Temp. Process

* Thermal burget

* Etch damage

* Plug stress

Oxide thickness

Structure

Retrograde Twin WellDual Gate/Salicide

UV-O2 Thin ox.

CDE3 P

Nano Tech Co., Ltd.

3-3 DIELECTRICS ROADMAP

Dielectric: SiO2 New Material

k(fF/um2) ()

SiliconSiO2

Si3N4

ON/ONO

Thermal Ox

50

4

7

4~7

100

< 100

< 50~60

25 16.25~35Ta2O5

()

Thermal OxSputtering

PECVDPhoto CVD

MOCVD

Step-coverage

Depo rate

Plasma damage

Leakage current

> 1000

2.1~13

*ABO3PZT

- Pb(Zr,Ti)O3

PLT- (PbTiO3)/La

STO- SrTiO3

BST- (Ba,Sr)TiO3

* Perovskite

Sol-Gel

Sputtering

CVD

RF

MOCVD

( /)

Leakage current

Plasma damage

150~200

200~700

CDE3 P

Nano Tech Co., Ltd.

3-3 NO(Si3N4/SiO2) DIELECTRIC

NO Dielectric: Limit 4.5nm 256M

DEVICEDEVICE

64K

256K

1M

4M

16M

64M

256M

1G

MATERIALMATERIAL

SiO2

SiO2

SiO2, SiO2/Si3N4

SiO2/Si3N4/SiO2

TRANSITION

SiO2/Si3N4

SiO2/Si3N4

SiO2/Si3N4

EFFECTIVETHICKNESS

EFFECTIVETHICKNESS

> 200 nm

~ 150 nm

~ 10 nm

~ 8 nm

~ 6 nm

~ 5 nm

< 4.5 nm

?

LIMITATIONLIMITATION

OXIDATION

IMPROVEMENTIMPROVEMENT

RTN LOADLOCK CVD

* in-situ HF Vapor clean

REQUIREMENTSREQUIREMENTS

High

LOW DEFECT DENSITY

/

Si

CDE3 P

Nano Tech Co., Ltd.

3-3 DIELECTRIC MATERIAL

Dielectric Material : Si

Ta2O5

BST

PZT

Si (Poly-Si,W/Ti)

Breakdown Voltage

() Paraelectric NON TOXIC

( 1000 )

(~25) 3 CAPACITOR

Si

Ferroelectric (Aging, Fatigue)

( )

TOXIC Si

- DRAM : BST,STO,BT- FRAM : PZT,STO,Bi

- PZT(32%)- Bi Family(20%)- BST(14%)- STO(9%)- BT(5%)- (21%)

BST - SPUTTER(32%)- CVD(29%)- LASER(18%)- (18%)

CDE3 P

Nano Tech Co., Ltd.

3-4 APPLICATION

200

400

600

800

1000

1200

1400

2 6 604020101 84 80 100

0

I/I Anneal RTO(Rapid Thermal Oxidation)RTN(Rapid Thermal Nitrization)

Polymide & Metal Silicide

Ti silicide & salicide

Al sitering

TiN CVD

Reflow

Temperature()

Time(sec)

Technology

-

- Thermal budget

- Shallow junction

- Throughput

- /

-

Batch type

CDE3 P

Nano Tech Co., Ltd.

3-4 SINGLE TYPE TECHNOLOGY

Type

Diagram

Heater Wafer Quartz chamber Thermo Couple

SiC chamber Heater Wafer Thermo Couple Pyrometer

Hot Wall Type

Features . . GAS Chamber

.

. GAS

1

2 4

5

1 2

3 4

3

Door

CDE3 P

Nano Tech Co., Ltd.

3-4 SINGLE TYPE TECHNOLOGY

Type

Diagram

Door

1 2 3

4 5

Door

1 2 3

4

Quartz window Wafer Halogen lamp Metalic chamber Pyrometer

Quartz chamber Wafer Halogen lamp Pyrometer

Cold Wall Type & Warm Wall Type

Features

. GAS

Chamber

CDE3 P

Nano Tech Co., Ltd.

3-4TOOLS

Thin Film & High Quality Film Requirements

1. Native oxide film - Level - Si - Si/Film interface

2. Thermal budget - Process- Short time High Process

3. Process - Process parameter

4. Clean - Clean- Material Clean

5. Process integration - Wafer - Cluster

CDE3 P

Nano Tech Co., Ltd.

3-4 DIFFUSION ROADMAP

Technology : Wafer

Batch type Single type

Horizontal Furnace

Large batch type Large dead zone volume Nonuniformity

Vertical Furnace

Large batch type Compact volume Good uniformity

FTPS(Fast Temperature Process System)

Short batch type Hot wall type Shallow junction

RTP(Rapid Thermal Process)

Single wafer type Cold wall type Good within wafer uniformity Bad wafer to wafer uniformity

( Bad repeatability )

Thermal budgetNative oxide

CDE3 P

Nano Tech Co., Ltd.

3-4 DIELECTRIC TREND

Dielectric : Capacitor Capacitor

STC

3D(3) STC

Si3N4

64M

256M

4G

1G 3D STC

STC

Cell Capacitor (2 )

Si

O2

(n

m)

10fF 20fF30fF

0.01 101.00.1 0.29

10

1.0

0.1

0.01

Isolation

Bit Line

Source DrainChannel

TR

CAPACITOR

Source Drain Isolation

Bit Line

Channel

CAPACITOR

TR

* STC : STack Capacitor

CDE3 P

Nano Tech Co., Ltd.

3-5 CLEANING ROADMAP

: Pattern Wafer

1995 1996 1997 1998 1999 2000 2001 2002 2003

DRAM(bits)Design Rule

64M 256M 1G

0.35um 0.25um 0.18um

16M

Cleaning trend Wet cleaning- Cassette type

Wet & Dry cleaning- Carrierless, Single process

* Dry cleaning * New dry * Cluster

New cleaning- Cluster

Wafer HandlingWafer - Horizontal loading type - 13, 25ea Cassette- Wafer transfer particle

* Wafer transfer * 13,25ea Cassette

Conventional type- Vertical loading type - 25ea Cassette- Wafer transfer

Cleaning Bath Conventional bath- 2 Bath system(+)

New concept bath- Single Bath/Wafer type- Buffer Module

* Bath Cross * Footprint

DryerSpin dryerIPA vapour dryerMarangoni dryer

New dryer- Slow drain IPA vapour dryer- Hot DIW slow pull dryer- Low pressure slow pull dryer

* Polimer

* Pattern

CDE3 P

Nano Tech Co., Ltd.

4-1 OXIDATION

: Si-suface

1. (Isolation)2. / (Inter Layer/Inter Metal Dielectric)3. MOSFET Gate

4. DRAM Cell Capacitor

1. (Thermal Oxidation)2. (Chemical Vapor Deposition)

3. Sputter

o Si

Si

o

o ooSi

oOxidant specy Adsorption

Diffusion

Reaction

Si-substarte

Oxide-Si Interface

Original Si Surface

CDE3 P

Nano Tech Co., Ltd.

4-1 OXIDATION

Dielectric Film :

LTO( ~ 400 )PE-CVD(Plasma Enhancement)

LP-CVD(Low Pressure)

AP-CVD(Atmospheric Pressure)

Thermal Oxidation( 800 ~ 1200 )

LTO( ~ 400 ) HTO( ~ 800 ) HTO( ~ 850 ) HLD( ~ 700 )

LTO( ~ 400 ) LTO( 400 ~ 450 )

Dry Oxidation Steam OxidationWet Oxidation

TEOS / O2 SiH4 / N2O

SiH4 / O2 SiH4 / N2O SiH2/Cl2/N2O TEOS / O2

TEOS / O2 SiH4 / O2

O2 H2 + O2 O2 / H2

IMD Film Passivation

ILD Film Sidewall space

Gate Capacitor Isolation Film

GAS

CDE3 P

Nano Tech Co., Ltd.

4-2 DIFFUSION

SEQUENCE(RECIPE) : Flow

ProcessBefore process After process

Ramp up(/min) Ramp down(/min)

Stand byWafer charge

( Wafer slot ) Boat loading

( Speed )

Temperature recovery( Time )

Process( GAS ratio, time )

After purge

Boat unloading( Speed)

Wafer cooling( N2 purge )

Wafer discharge Stand by

( Idle status)Process sequence

Process

InitialStand by

IdleStand byCycling

CDE3 P

Nano Tech Co., Ltd.

4-2 DIFFUSION

:

Deposition

GAS FURNACESi wafer surface ,(Anneal, Drive-in) (Junction) Si wafer bulk (Dopant)

GAS High energy Ion beam (Dose) (Junction) Si wafer bulk ,

High velocity Dopant Ion

Si substrate

Mask

Profile(Deposition)

Profile (Ion Implantation)

GAS of Dopant Atoms

Si substrate

Mask

DiffusionDiffusion

CDE3 P

Nano Tech Co., Ltd.

4-2DIFFUSION MECHANISM

Diffusion in Crystal Lattice

Vacancy Mechanism- (Diffusant, Dopant atoms) Vacancy Lattice - 3, 5

Interstitial Mechanism- Interstitial Lattice - ( Vacancy ~ 104 Diffusivity )

Models of Atomic Diffusion Mechanism

VacancyMechanism

InterstitialMechanism

Self Diffusion

Host Atom

Diffusant

Vacancy

Dopant Atom

Simbol

CDE3 P

Nano Tech Co., Ltd.

4-3 CLEANING

CLEANING : Wafer

Wafer

"Particle"

Yield

Yield Particle Size

Design rule 1/10

Control Size Design Rule 1/3

Particle

Y = exp(-DA)

( Y;Yield, D;Defect density, A;Area )

Particle

Pattern

Resist Ashing,Dry Etching,Ion Implantation

Alkari(Na,K etc), (Fe,Cu,Ni,Ca etc)

Alkari

Oxide film Mobile ion

MOS

Forbidden Band Deep Carrier Trap Level

Carrier Life Time

PN Leakage Current

CDE3 P

Nano Tech Co., Ltd.

4-3 CLEANING

RCA : SC1 ,, HF , , SC2

Particle Si CLEANING

RCA CLEANING RCA CLEANING CLEANING CLEANING

SC1(NH4OH:H2O2:DI=1:1:5)

ORGANIC,I/II METAL, PARTICLE 2H2O2 + C -> CO2 + 2H2O M + H2O2 -> MO + H2O, MO + 4NH4OH -> M(NH4)4+

US(Ultra Sonic)

HF(HF: DI)

SPM(H2SO4:H2O2=4:1)

SC2(HCl:H2O2:DI=1:1:5)

MS(Mega Sonic)

OXIDE FILM, METAL 6HF + SiO2 -> H2SiF6 + 2H2O 3HF + M -> MF3 + 3H+

HEAVY ORGANIC, METAL H2SO4 + H2O2 -> H2SO5(CARO'S ACID) + H2O H2SO5 + Hydro Carbon -> CO2 + H2O + H2SO4

METAL ION EXCHANGE : Na + HCl -> NaCl + H+ COMPLEX : M + H2O2 -> MO + H2O, MO + 2HCl -> MCl2 + H2O

PARTICLE SINUSOIDAL WAVE Accelleration Force

PARTICLE CAVITATION Shock Wave

LGSLGS

U

HF

D

CDE3 P

Nano Tech Co., Ltd.

4-3 CLEANING

HF : ( ) , 49wt% HF DIW

OXIDE MECHANISM SiO2 + 6HF 2H+ + SiF6+ 2H2O2 + C -> CO2 + 2H2O M + H2O2 -> MO + H2O, MO + 4NH4OH -> M(NH4)4+

US(Ultra Sonic)

HF(HF: DI)

SPM(H2SO4:H2O2=4:1)

SC2(HCl:H2O2:DI=1:1:5)

MS(Mega Sonic)

OXIDE FILM, METAL 6HF + SiO2 -> H2SiF6 + 2H2O 3HF + M -> MF3 + 3H+, MO + 2HF -> MF + H2O

HEAVY ORGANIC, METAL H2SO4 + H2O2 -> H2SO5(CARO'S ACID) + H2O H2SO5 + Hydro Carbon -> CO2 + H2O + H2SO4

METAL ION EXCHANGE : Na + HCl -> NaCl + H+ COMPLEX : M + H2O2 -> MO + H2O, MO + 2HCl -> MCl2 + H2O

PARTICLE SINUSOIDAL WAVE Accelleration Force

PARTICLE CAVITATION Shock Wave

U

HF

D

CDE3 P

Nano Tech Co., Ltd.

4-3 CLEANING

Cleaning Technology: Wafer

High Aspect Ratio Contact Hole 0.2um Hole , GAS VAPOUR DRY METAL UV/Cl2

COST

/

MONITOR

CLUSTER

Wafer

Hole

Native Oxide

Chemical

CLUSTER,

RINSE DRY

NEW DRY

CDE3 P

Nano Tech Co., Ltd.

4-3 CLEANING TECHNOLOGY CLEANING : Wafer Control 20%

, Vth

PATTERN , , ,

V n

LEAK,LIFE-TIME ,Vth , , ,

III p

Soft Error

(SiC), , CONTACK

CONTACK , , EPI

Wet Chemical O, C, H

CLEANING

DEVICE

CDE3 P

Nano Tech Co., Ltd.

4-3 PARTICLE IN WATER

: Particle sizes of fine particles existing in water

0.0001 0.001 0.01 0.1 1.0 10.0 100

Clay, Silt

Colloidal silica

Virus

Yeast

Bacteria

Suspended solids

Pyrogen

Enzyme

Colloids

Ion/Lowmolecule

Species

Size()

CDE3 P

Nano Tech Co., Ltd.

4-3 DRYING TECHNIQUE

Wafer Drying : Cleaning, Rinse, Drying

Type

Motion

Sequence

Wafer move

IPA

N2

Application

Process time

300mm capa

Spin dryer IPA vapour dryer Marangoni dryer Spin dryer

Hi speed rotation

Drying only

Rotation

Not used

Hot N2

All(PR wafer)

> 5min

( - )

Motionless

Drying only

Not moving

Used for drying> 300ml > Room temp.Recovery

Not used N2

PR wafer

~ 10min

( + )

Motionless

Cleaning & Drying

Withdraw / Out

Cleaning & Drying4~10ml (50) Room temp.Recovery

Cleaning & Drying

PR wafer

~ 9min

(++)

Motionless

Rinse/Clean/Dry

Not move & DI drain

Used for clean only2ml (50)Room temp.Recovery

N2 clean/Hot N2 dry

All(PR wafer)

~ 5min

(++)

CDE3 P

Nano Tech Co., Ltd.

5-1 NOx GATE

Oxynitride Gate : SiO2 ( 50)

: GATE (< 80) NOx GAS

(Oxynitride film)

Hot Carrier Lifetime TDDB

NOx GAS

NOx (, HITACHI+ KE+TOMOE SHOKAI )

* TORCH, N2O GAS Line

(900)

* TORCH, N2O GAS Line

(1050) SiC Boat

N2O

NO

CDE3 P

Nano Tech Co., Ltd.

5-1 NOx

Oxynitride : PYRO GATE OX

GAS : H2, O2 GAS NOx GAS Line

TORCH : N2O GAS TORCH Flow

NO GAS Line TUBE TUBE

* Pyrogenic Reaction H2O NO GAS HNO3

LAMP -> HEATER TORCH

FURNACE: PYOR SEALING NOx GAS Leak

2 O-Ring, Seal Flange ( Pump, GAS Detector )

: NOx

BOAT Rotation, BOAT up/down Position

: NH3 GAS NOx Flow RECIPE

Main GAS Interface SYSTEM

: NOx GAS SUS

Process Drain Line . Teflon Air Valve

CDE3 P

Nano Tech Co., Ltd.

5-1 NOx GAS

Oxynitride : NOx GAS

NOx GAS

NOx GAS GAS SCRUBBER

SYSTEM

PROCESS ( HEATER)

NOx

NOx, NH3

MECHANISM

6NO + 4NH3 ----------> 5N2 + 6H2O

6NO2 + 8NH3 ----------> 7N2 + 12H2O

N2O AIR NH3

SIZE -> MAIN

NH3 GAS CABINET ( ) -> RECIPE NH3 GAS

NO < 25ppm NO2 < 3ppm NH3 < 25ppm

CDE3 P

Nano Tech Co., Ltd.

5.2 HSG(SAES : Surface Area Enhanced Silicon)

HSG(Hemi Spherical Grain): Poly Capacitor 1.6~1.8

HSG Poly

Storage Node Poly Si CAPACITOR

Photo ARC(Anti Reflective Coating) Layer

HSG Poly Mechanism

Si Substrate

Poly Silicon Deposition

Si Atom

ANNEALHeatingVacuum

AMOPHOUS

Si Substrate

Crystalization

HSG

Atom Migration(a-Si Migration)

Recombination

Si Atom

* S = R * S = 2R(1.5~2.5R)

CDE3 P

Nano Tech Co., Ltd.

5-3 Ta2O5

Ta2O5 : CAPACITOR

ONO(~7fF)

Ta2O5(~22fF)

BST/STO(>300fF)

CAPACITOR ROADMAP

DielectricConstant

Cell SizeCell Area

0.35um3.5um2

0.25um1.6um2

0.18um0.4um2

Dielectrics DRAMsPVD BST(Planar)

Dielectrics FRAMsPVD PZT/SBT(Planar)

Metalic PlateCVD TiN(Ta2O5)

PVD Pt/IrO2/RuO2

High Dielectric Materials

Smaller Cells

Less Complex Cell

3Dimension -> Planar

Lower Fabrication Cost

CDE3 P

Nano Tech Co., Ltd.

5-3 Ta2O5 FILM

Ta2O5 : Oxygen

High Dielectric Constants

High Resistivity

Low Internal Stress

Good Step-coverage

Large Leakage Current

Low Breakdown Strength

Low Reliability

Ta2O5 Si Ta vacancy

Ta 2 Flat-

band voltage

Ta rich Ta2O5

Ta2O5 Film Ta2O5

()

CDE3 P

Nano Tech Co., Ltd.

5-3Ta2O5 FILM MODELING

SiO2Si

Ta-Ox void O*O* O*

O vacancy

Ta2O5

Ta-Ox void compensation Recovery of oxygen vacancy

Increase in interfacial SiO2

O* Active oxygen

Ta atom

O atom

Bond

Dangling bond

Symbol

Modeling

Ta-Ox void Leakage current Ta-O Ta,O anneal defect void Void Ta TaCl5 Cl dangling bond CVD TaCl5 UV activation Ta-Ox void anneal

O/O2 Si Ta-O-Si-Ta void leakage

CDE3 P

Nano Tech Co., Ltd.

5-4 CLUSTER TECHNOLOGY

Policide Gate integration

(Process flow)

CLUSTER

Cleaningchamber

RTO/RTNchamber

doped-Sichamber

WSixchamber

Loadlockchamber

Loadlockchamber

Loadlocktransformer

Cassette input/output

2

3 4

5

1 6

1 Wafer loading

H2 Bake : Gate insulator : NO

2

3 Gate node : d-Poly

4 W CVD depo : Policide

Dry cleaning : Particle 5

6 Wafer unloading

CDE3 P

Nano Tech Co., Ltd.

5-4 Application

Integration Process : Nitrogenic oxide/Policide Gate Growing

200

400

600

800

1000

1200

2 6 12100 84

0

Temperature()

Time(min)

1 2 3

1

2

3

RTO/RTN Chamber- H2 Bake

-

- N2O RTN

-

doped-Si Chamber- SiH4/PH3

- in-situ doped-Si

- SiH4/WF6

- WSix

WSix Chamber

RT Cluster Process Process Flow

CDE3 P

Nano Tech Co., Ltd.

5-5 MARANGONI DRYER TECHNOLOGY

MARANGONI DRYER : IPA V/D SPIN DRYER New Concept

MaMb

Wafer

MARANGONI FORCEMa > Mb

DI WATERSi Wafer

IPA

N2 & IPA Atmosphere

MARANGONI EFFECT

Si GAS & LIQUID Water IPA

DIFFUSION of IPA in WATER

- Wafer IPA

IPA Concentration : Ma > Mb

IPA Surface Tension

- IPA

SURFACE TENSION : Ma < Mb

MARANGONI FORCE : Ma->Mb

- Wafer , , IPA

Withdraw Wafer out of Water

- N2/IPA