xilinx training courses
TRANSCRIPT
Xilinx Training Course Listing
Effective May 1, 2011
Overview.........................................................................................................................................................1
XilinxTrainingCourseListing....................................................................................................................2
FPGACurriculum.........................................................................................................................................3
EmbeddedHardwareCurriculum.............................................................................................................5
EmbeddedSoftwareCurriculum...............................................................................................................5
DSPCurriculum............................................................................................................................................5
ConnectivityCurriculum..............................................................................................................................6
XilinxWorldwideTraining...........................................................................................................................7
AdditionalTrainingResources...................................................................................................................7
Notes................................................................................................................................................................8
TABLE OF CONTENTS
1
OVERVIEW
The Design Challenges of Time and Complexity• Systemdesignersarefacedwithtworapidlygrowingchallenges:shrinking time-to-marketproductdevelopmentcycles;andtheincreasingcomplexity ofproductdesign• Today’scompetitiveenvironmentdemandsthetimely,efficientdelivery ofyourmostinnovativesolutions• Tobeatthecompetition,youmustbeonbudget,ontime,everytime
Xilinx Training— Training Solutions that Put You On The Fast Track to SuccessXilinxprovidestargeted,high-qualitytrainingdesignedbyexpertsinprogrammablelogicdesign,anddeliveredbyXilinxqualifiedtrainers.Weofferinstructor-ledclassesandrecordede-learningforself-pacedtraining.Somecoursesarecompletelyfree!Tosignupforaclassortofindoutmoregotowww.xilinx.com/training.
Xilinx Productivity Advantage (XPA)— Everything You Need in a Customizable BundleTheXilinxProductivityAdvantage(XPA)programallowsyoutocreatecustomizedbundlesofsoft-wareandservicestomeetthespecificneedsofyourteam.AnXPAprovidesforallofyourFPGAdesignneedsup-frontthroughaonestopshoppingexperience.Thissolutionbundleincludesaccessto:
• Trainingcreditsthatcanbeappliedtowardsacomprehensiveportfolioofhands-on trainingledbyexpertinstructors.• Allofyouruserlicensesfortheindustry-leadingISE™designtoolsanddevelopment systemoptions.• Pre-verifiedandpre-optimizedIntellectualProperty(IP)coresandreferencedesigns forXilinxFPGAs.• Completesuiteofdevelopmentandevaluationboardscustomizedforyourteam’sneeds.
TofindouthowyoucanbenefitfromanXPAgotowww.xilinx.com/xpa.
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XILINX TRAINING COURSE LISTING
Xilinxofferspublic,privateandonlinetrainingavailableworldwidesoyoucanbesuretofindatrainingthatbestfitsyourneeds.SeebelowforadetaileddescriptionofallofthecoursesofferedbyXilinx.
INSTRUCTOR-LED TRAINING COURSES *Recommendedcourseware, Elective courseware LEARNING LEVEL
FPGA Curriculum*ISEDesignToolFlow
1 DesigningwithVerilog
Designing with VHDL
FPGA Design for ASIC Users
*EssentialsofFPGADesign
2 Design Techniques for Lower Costs
Debugging Techniques Using the ChipScope Pro Tools
Essential Design with the PlanAhead Analysis and Design Tool
*DesigningforPerformance
3 Advanced Design with the PlanAhead Analysis and Design Tool
Designing with the Spartan-6 and Virtex-6 Families
Designing with the 7 Series Families
*AdvancedFPGAImplementation
4 Advanced VHDL
Xilinx Partial Reconfiguration Tools and Techniques
Embedded Hardware Curriculum*EssentialsofMicroprocessors 1
*HowtoDesignXilinxEmbeddedSystemsinOneDay 2
*EmbeddedSystemsDevelopment 3
*AdvancedEmbeddedSystemsDevelopment 4
Embedded Software Curriculum*EmbeddedSystemsSoftwareDevelopment 3
*EmbeddedLinuxontheMicroBlazeProcessor 4
Connectivity Curriculum*PCIeProtocolOverview
2*HowtoDesignaXilinxConnectivitySysteminOneDay
*DesigningaLogiCOREPCIExpressSystem
3
*DesigningwithMulti-GigabitSerialI/O
*DesigningwithEthernetMACControllers
*SerialIntegrityandBoardDesignforXilinxFPGAs
*HowtoDesignaHigh-SpeedMemoryInterface
DSP Curriculum*HowtoDesignaXilinxDigitalSignalProcessingSysteminOneDay 2
*EssentialsofDSPImplementationTechniquesforXilinxFPGA 3
*DSPDesignUsingSystemGenerator 4
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FPGA CURRICULUm
ISE Design Tool Flow Level: 1 Duration: 1 dayTheISEDesignToolFlowclassprovidestheoverallcontextandframeworkforthedevelopmentcycleofFPGAs.ForthoseuninitiatedtoFPGAdesign,thiscoursewillarmyouwiththepropertechniques,strategy,andFPGAtoolflowtogetupanddesigninganFPGAnow!TheflowwilltakeyoufrombehavioralspecificationtotuningspecificationsfortheFPGA,coding,synthesis,verification,andontoimplementationanddownload.Throughoutthedesigncycle,thevarioustoolswithintheProjectNavigatortoolareintroduced.
Designing with Verilog Level: 1 Duration: 3 daysThiscomprehensivecourseisaneffectiveintroductiontotheVeriloglanguage.CourseemphasisincludestargetingXilinxFPGAdevicesaswellassimulationtechniques.Theinformationgainedherecanbeappliedtoanydigitaldesignbyusingatop-downsynthesisapproach.Thiscoursecouplesinsightfullecturemoduleswithpracticallabexercisestoreinforcekeyconcepts.
Designing with VHDL Level: 1 Duration: 3 daysThiscomprehensivecourseisaneffectiveintroductiontotheVHDLlanguage.CourseemphasisincludestargetingXilinxFPGAdevicesaswellassimulationtechniques.Theinformationgainedherecanbeappliedtoanydigitaldesignbyusingatop-downsynthesisdesignapproach.Thecoursecouplesinsightfullecturemoduleswithpracticallabexercisestoreinforcekeyconcepts.
FPGA Design for ASIC Users Level: 1 Duration: 1 dayAttendingtheFPGADesignforASICUserscoursewillhelpyoutocreatefastandefficientFPGAdesignsbyleveragingyourASICdesignexperience.ThiscoursewillhelpyouavoidthemostcommondesignmistakesofFPGAdesigners.ItwillalsohelpyoufityourdesignintoasmallerFPGAoralowerspeedgradeforreducingsystemcosts.Inaddition,bymasteringthedesignmethodologiespresentedinthiscourse,youwillbeabletocreateyourdesignfaster,shortenyourdevelopmenttime,reduceyourdebugtime,andlowerdevelopmentcosts.
Essentials of FPGA Design Level: 2 Duration: 1 dayUnderstandXilinxFPGAarchitectureandlearntoimplementacompletedesigninoneday.ThiscourseprovidesyouwithanintroductiontodesigningwithXilinxFPGAsusingXilinxISE™software.FeaturescoveredinthiscourseincludetheArchitectureWizard,pinassignments,designplanning,implementationoptions,andglobaltimingconstraints.Reduceyourlearningcurvethroughseveralpracticallabs.
Design Techniques for Lower Cost Level: 2 Duration: 1 dayThisworkshopwillappealtoengineerswhohaveaninterestindevelopinglow-costproducts,particularlyinhigh-volumemarkets.Theworkshopcoversseveraldifferentdesigntechniques—suchasestimatingdesignsize,applyingdesigntechniques,andexploringcreativewaystouseFPGAmemoryresources—allinanefforttoreducedesigncosts.ThiscoursefeaturestheSpartan™familyofdevices.
Debugging Techniques Using theChipScope Pro Tools
Level: 2 Duration: 2 days
AsFPGAdesignsbecomeincreasinglymorecomplex,manyXilinxcustomersaresearchingtoreducetheirdesigntimeanddebugtheirdesignswithpowerfulyeteasy-to-usetools.TheXilinxChipScopePro™toolsolutionhelpsminimizetheamountoftimerequiredfordebugandverification,whichcanoftenconsumeasignificantamountoftotalFPGAdesigntime.Inthisone-daycourse,youwilllearneffectivewaystodebuglogicandhigh-speeddesigns—therebydecreasingyouroveralldesigntime.Thistrainingwillprovidehands-onlabsthatdemonstratehowtheChipScopeProtoolscanaddressdebuggingandverificationchallenges.
Essential Design with thePlanAhead Analysis and Design Tool
Level: 2 Duration: 1 day
LearntoincreasedesignperformanceandachieverepeatableresultsbyusingthePlanAheadsoftware.Topicsinclude:aproductoverview,synthesisandprojecttips,designanalysis,creatingafloorplan,improvingperformance,experimentingwithimplementationoptions,incrementalmethodology,block-basedIPdesign,andI/Opinassignment.
FPGA CURRICULUm
Designing for Performance Level: 3 Duration: 2 daysLearntechniquestohelpimproveyourdesign’sperformance.ThiscoursebuildsontheprinciplescoveredinourLevel1&2ofFPGADesigncoursewithanemphasisonachievingtimingclosure.TopicsincludeFPGAdesigntechniques,HDLcodingtechniques,theCOREGenerator™system,powerestimation,timinganalysis,timingconstraints,andimplementationoptions.
Advanced Design with the PlanAhead Analysis and Design Tool
Level: 3 Duration: 2 days
LearntoincreasedesignperformanceandachieverepeatableperformancebyusingthePlanAhead™softwaretool.Topicsinclude:synthesisandprojecttips,designanalysis,creatingafloorplan,improvingperformancewithareaconstraintsandPblocks,designdebuggingwiththeChipScope™Protool,anddesignpreservationwithpartitions.
Designing with the Virtex-5 Family Level: 3 Duration: 1 dayInterestedinlearninghowtoeffectivelyutilizeVirtex™-5FPGAarchitecturalresources?TargetedtowardsexperiencedXilinxuserswhohavealreadycompletedLevel2and3EssentialsofFPGADesignandDesigningforPerformanceandhaveacomprehensiveknowledgeofVirtex-4FPGAs,thiscoursefocusesonunderstandingaswellasdesigningintoseveralofthenewandenhancedresourcesfoundinournewestdevice.
Designing with the Spartan-6 and Virtex-6 Families
Level: 3 Duration: 3 days
AreyouinterestedinlearninghowtoeffectivelyutilizeSpartan-6FPGAorVirtex-6FPGAarchitecturalresources?ThiscoursesupportsbothexperiencedandlessexperiencedFPGAdesignerswhohavealreadycompletedtheEssentialsofFPGADesigncourse.Thiscoursefocusesonunderstandingaswellashowtoproperlydesignfortheprimaryresourcesfoundinthesepopulardevicefamilies.
Designing with 7 Series Families Level: 3 Duration: 2 daysAreyouinterestedinlearninghowtoeffectivelyutilize7seriesarchitecturalresources?ThiscoursesupportsbothexperiencedandlessexperiencedFPGAdesignerswhohavealreadycompletedtheEssentialsofFPGADesigncourse.Thiscoursefocusesonunderstandingaswellashowtoproperlydesignfortheprimaryresourcesfoundinthispopulardevicefamily.
Advanced FPGA Implementation Level: 4 Duration: 2 daysPushthelimitsofyourdesignbylearningtechniquesthatwillincreaseyouroverallproficiency.ThiscoursebuildsontheprinciplescoveredinourLevel2and3EssentialsofFPGADesignandDesigningforPerformancecourses.Someoftheconceptsthatyouwilllearnincludeincrementalandmodulardesigntechniques,creatingfloorplans,usingscripting,implementingrelationallyplacedmacros,editingandsimplifyingconstraintsfiles,usingFPGAEditorforimplementationediting,andusingclockresourceseffectively.
Advanced VHDL Level: 4 Duration: 2 daysIncreaseyourVHDLproficiencybylearningtechniquestohelpyouwritemorerobustandreusablecode.ThiscomprehensivecourseistargetedtowardsdesignerswhoalreadyhavesomeexperiencewithVHDL.Thecoursehighlightsmodeling,testbenches,RTL/synthesizabledesign,andtechniquesaimedatcreatingparameterizableandreusabledesigns.Themajorityofclasstimeisspentinchallenginghands-onlabs,ascomparedtolecturemodules.
Xilinx Partial Reconfiguration Tools and Techniques
Level: 4 Duration: 2 days
ThiscoursedemonstrateshowtousetheISE™,PlanAhead™,andEmbeddedDevelopersKitsoftwaretoolstoconstruct,implement,anddownloadapartiallyreconfigurableFPGAdesign.YouwillgainafirmunderstandingofPartiallyReconfigurable(PR)technologyandlearnhowsuccessfulPRdesignsarecompleted.YouwillalsolearnthebestdesignpracticesfromtheprosandunderstandthesubtletiesofthePRdesignflow.
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EmBEDDED HARDWARE CURRICULUm
Essentials of microprocessors Level: 1 Duration: 2 daysLearnwhatmakesmicroprocessorstick!Thisclassoffersinsightsintoallmajoraspectsofmicroprocessors,fromregistersthroughcoprocessorsandeverythinginbetween.DifferencesbetweenRISCandCISCarchitecturesareexploredaswellastheconceptofinterrupts.Agenericmicroprocessorisprogrammedandruninsimulationtoreinforcetheprincipleslearnedinthelecturemodules.ThestudentwillleavetheclasswellpreparedfortheXilinxZynqtrainingcurriculum.
How to Design Xilinx Embedded Systems in One Day
Level: 2 Duration: 1 day
TheworkshopintroducesyoutofundamentalembeddeddesignconceptsandtechniquesforimplementationinXilinxFPGAs.ThefocusisonfundamentalaspectsofXilinxembeddedtools,IP,andtheEmbeddedTargetedReferenceDesign(TRD).DesignexamplesandlabsaredrawnfromtheEmbeddedTRD.
Embedded Systems Development Level: 3 Duration: 2 daysLookingforahands-onapproachtodevelopingembeddedsystems?AttendthistrainingtogainabetterunderstandingofdevelopingaPowerPC™andMicroBlaze™embeddedsystembyusingtheEmbeddedDevelopmentKit(EDK).Thiscoursewillprovidehands-onlabsregardingthedevelopment,debug,andsimulationoftheembeddedsystem.LabsprovideuserswithachoiceoftargetingeitherPowerPCorMicroBlazesystems.
Advanced Features and Techniques of Embedded Systems Development
Level: 4 Duration: 2 days
Understandandutilizecomponentsofembeddedsystemsdesigninordertoarchitectacomplexsystem.ThiscoursebuildsontheskillslearnedintheEmbeddedSystemsDevelopmentcourse.Topicsincludeexternalmemoryinterfacingusingvariousmemoryinterfacecores;enhancingperformancethroughprofiling,caching,anddedicatedlinks;hardwareandsoftwaredebuggingusingtheXilinxsoftwaredebuggerandChipScopePro;busfunctionalmodelsandsimulation;interrupts,settingcountertimerfacilitiesandthePPCcoreclock;OCM;boardsupportpackageusingXilinxlightweightkernelandLinux;anddebuggingtechniques.Themajorityofthiscourseisspentonpracticalhands-onlabworksuchasexternalmemoryinterfacing,hardwareandsoftwaredebuggingusingChipScopePro,bootloader,simulationusingbusfunctionalmodel,andprofiling.
EmBEDDED SOFTWARE CURRICULUm
Embedded Systems Software Development Level: 3 Duration: 2 daysThiscourseintroducesyoutosoftwaredesignanddevelopmentforXilinxembeddedprocessorsystems.Youwilllearnthebasictooluseandconceptsrequiredforthesoftwarephaseofthedesigncycle,afterthehardwaredesigniscompleted.YouwillhaveenoughpracticalinformationtogetstarteddevelopingthesoftwareplatformforaXilinxembeddedsystembasedonaPowerPC®440orMicroBlaze™processor.Hardwaredesignconceptsandproceduresarenotcovered.
Embedded Linux on the microBlaze Processer
Level: 4 Duration: 2 days
Thiscourseprovidesembeddedsystemsdeveloperswithexperienceincreatinganembeddedopen-sourceLinuxoperatingsystemonaXilinxdevelopmentboardfortheMicroBlazeprocessor.Thecourseoffersstudentshands-onexperiencefrombuildingtheenvironmenttobootingthesystemusingabasic,single-processorSystemonChip(SoC)designwithPetaLinux.TheprimaryfocusisonembeddedLinuxdevelopmentinconjunctionwiththeXilinxtoolflow.
DSP CURRICULUm
How to Design a Xilinx Digital Signal Processing System in One Day
Level: 2 Duration: 1 day
TheworkshopintroducesyoutofundamentalDSPconcepts,algorithms,andtechniquesforimplementationinXilinxFPGAs.Designexamplesandlabsaredrawnfromseveralcommonapplicationsspaces,includingwirelesscommunications,video,andimaging.
Essential DSP Techniques for Xilinx FPGAs Level: 3 Duration: 2 daysThiscourseshowsyouhowtotakeadvantageofthefeaturesavailableintheXilinxFPGAarchitecture,includingtheVirtex™-6&Spartan-6FPGAs,anddescribeshowDSPalgorithmscanbeimplementedefficiently.Thetechniquesalsodemonstratewhichdecisionsatthesystemlevelhavethegreatestimpactontheimplementationprocessandproductcosts.
DSP Design Using System Generator Level: 4 Duration: 2 daysThiscourseallowsyoutoexploretheSystemGeneratortoolandtogaintheexpertiseyouneedtodevelopLevel3,low-costDSPdesigns.ThisLevel3courseinimplementingDSPfunctionsfocusesonlearninghowtouseSystemGeneratorforDSP,designimplementationtools,andhardware-in-the-loopverification.Throughhands-onexercises,youwillimplementadesignfromalgorithmconcepttohardwareverificationbyusingXilinxFPGAcapabilities.
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CONNECTIVITY CURRICULUm
PCIe Protocol Overview Level: 2 Duration: 1 dayThiscoursefocusesonthefundamentalsofthePCIExpress®protocolspecification.ThetypicalPCIearchitecture,includingdataspace,datamovement,andthemostcommonlyusedTransactionLayerPackets(TLPs)arecovered.Interruptsanderrorhandlingarealsodiscussed.
How to Design a Xilinx Connectivity System in One Day
Level: 2 Duration: 1 day
ThisworkshopintroducesyoutofundamentalconnectivityconceptsandtechniquesforimplementationinXilinxFPGAs.Thefocusisonfundamentalaspectsoftransceivers,PCIe®technology,memoryinterfaces,andEthernetMACs.
Designing a LogiCORE PCI Express System Level: 3 Duration: 2 daysBylearningPCIExpresscoreprotocol,designerscangainaworkingknowledgeofhowPCIExpresscanbeusedintheirsystems.ThiscoursefocusesonthePCIExpressprotocolsubjectsthatdesigners,usingtheXilinxPCIExpresscoreshouldunderstandtocompletetheirdesignsfasterandeasier.StudentswillalsobeintroducedtoeachXilinxPCIExpresscoreproductandwillgainintimateknowledgeofhowthePCIExpresscoreoperates.
Designing with multi-Gigabit Serial I/O Level: 3 Duration: 2 daysLearnhowtoemployRocketIO™inyourVirtex-IIProdesign.UnderstandandutilizethefeaturesoftheRocketIOtransceiverblocks,suchasCRC,8b/10bencoding,channelbonding,clockcorrection,andcommadetection.Additionalhighlightedtopicsincludedebuggingtechniques,useoftheArchitectureWizard,synthesisandimplementationconsiderations,andstandardscompliance.Thiscomprehensivecourseequallybalanceslecturemoduleswithpracticalhands-onlabwork.
Designing with Ethernet mAC Controllers Level: 3 Duration: 2 daysBecomeacquaintedwiththevarioussolutionsthatXilinxoffersforEthernetconnectivity.LearnthebasicsoftheEthernetstandard,protocol,andOSImodelwhileapplyingXilinxsolutionsviahands-onlaboratoryexercises.Performsimulationtounderstandfundamentalprinciplesandobtaintheknowledgetoassesshardwaredesignconsiderationsandsoftwaredevelopmentrequirements.
Signal Integrity and Board Design for Xilinx FPGAs
Level: 3 Duration: 3 days
Learnhowsignalintegritytechniquesareapplicabletohigh-speedinterfacesbetweenXilinxFPGAsandsemiconductormemories.Thiscourseteachesyouabouthigh-speedbusandclockdesign,includingtransmissionlinetermination,loading,andjitter.YouwillworkwithIBISmodelsandcompletesimulationsusingCADpackages.OthertopicsincludemanagingPCBeffectsandon-chiptermination.Thiscoursebalanceslecturemodulesandpracticalhands-onlabs.
How to Design a High-Speed memory Interface
Level: 3 Duration: 2 days
Thiscourseteacheshardwaredesignerswhoarenewtohigh-speedmemoryI/OtodesignamemoryinterfaceinXilinxFPGAs.Itintroducesdesignerstothebasicconceptsofhigh-speedmemoryI/Odesign,implementation,anddebuggingusingSpartan®-6andVirtex®-6FPGAs.Additionally,youwilllearnaboutthetoolsavailableforhigh-speedmemoryinterfacedesign,implementation,anddebugging.ThemajormemorytypescoveredareDDR,DDR2,DDR3,RLDRAMII,LPDDR,QDRII,andQDRII+.LabsareavailableforDDR2ontheSP601,DDR3ontheML605,orDDR3ontheSP605demoboard.
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XILINX WORLDWIDE TRAINING
XilinxtrainingcoursesareofferedbyAuthorizedTrainingProviders(ATPs)inmostregionsoftheworld,providingyouexperttrainingopportunities.CustomercoursesofferedbyourATPsusehigh-qualitytrainingmaterialsdevelopedbyXilinx,andleveragethespecializedknowledgeandextensivenetworkofourATPs.Pricingandavailabilityofclassesvariesbyregion.
AUTHORIzED TRAINING PARTNER CONTACT COUNTRY/REGION(S) SUPPORTED
Xilinx Training Worldwide www.xilinx.com/training Worldwide
AmERICAS [email protected].
Anacom Eletrônica www.anacom.com.br Brazil
Bottom Line Technologies www.bltinc.com Delaware, District of Columbia, Maryland, New Jersey, New York, Eastern Pennsylvania, Virginia
Doulos www.doulos.com/XilinxNC Northern California
Faster Technology www.fastertechnology.com Arkansas, Colorado, Louisiana, Montana, Oklahoma, Southern Idaho, Texas, Utah, Wyoming
Hardent www.hardent.comAlabama, Connecticut, Eastern Canada, Florida, Georgia, Maine, Massachusetts, Mississippi, New Hampshire, North Carolina, Rhode Island, South Carolina, Tennessee, Vermont
North Pole Engineering www.npe-inc.com Illinois, Iowa, Kansas, Minnesota, Missouri, Nebraska, North Dakota, South Dakota, Wisconsin
Technically Speaking www.technically-speaking.com Arizona, British Columbia, Southern California, Northern Idaho, New Mexico, Nevada, Oregon, Washington
VAI Logic www.vaitechnology.com Indiana, Kentucky, Michigan, Ohio, WesternPennsylvania, West Virginia
EUROPE, mIDDLE EAST, & AFRICA (EmEA) [email protected]
Arcobel Embedded Solutions www.arcobel.nl The Netherlands, Belgium, Luxemburg
Bitsim www.bitsim.com Sweden, Norway, Denmark, Finland, Lithuania, Latvia, Estonia
Doulos www.doulos.com/xilinx United Kingdom, IrelandInline Group www.plis.ru Moscow RegionLogtel Computer Communications www.logtel.com Israel, TurkeyMagnetic Digital Systems www.magneticgroup.ru Urals RegionMindway www.mindway-design.com ItalyMulti Video Designs (MVD) www.mvd-fpga.com France, Spain, Portugal, SwitzerlandPulsar www.pulsar.co.ua Ukraine
Programmable Logic Competence Center (PLC2) www.plc2.deGermany, Switzerland, Poland, Hungary, Czech Republic, Slovakia, Slovenia, Greece, Cyprus, Turkey, Russia
SO-Logic Consulting www.so-logic.co.at Austria, Brazil, Czech Republic, Hungary, Slovakia, Slovenia
ASIA PACIFIC [email protected]
Activemedia Innovation www.activemedia.com.sg Malaysia, Singapore, ThailandBlack Box Consulting www.blackboxconsulting.com.au Australia, New ZealandE-elements www.e-elements.com China, Hong Kong, TaiwanLibertron www.libertron.com KoreaOE-Galaxy www.oegalaxy.com.vn/ VietnamSandeepani Programmable Solutions www.sandeepani-vlsi.com IndiaSymmid www.symmid.com MalaysiaWeDu Solution www.wedusolution.com Korea
JAPAN [email protected]
Avnet Japan www.jp.avnet.com JapanFujitsu Electronics jp.fujitsu.com/fei/services/maker/xilinx/ JapanPaltek www.paltek.co.jp JapanShinko Shoji xilinx.shinko-sj.co.jp JapanTokyo Electron Device ppg.teldevice.co.jp Japan
ADDITIONAL TRAINING RESOURCESCurriculum Paths—Curriculumpathsillustratetherecommendedcoursesequencetofollowbasedonyourdesignspecialization.BecauseXilinxcoursesbuildoneachother,youmustmeettheprerequisitestogainthefullbenefitofeachcourse.Prerequisitesareoutlinedinthecoursedescriptions.Test Your Knowledgeofthematerialcoveredineachcoursebyselectingtheappropriatelinknexttoyourcourseofinterest.
www.xilinx.com/training/courses.htm
Recorded e-Learning—Recordede-Learningsarecurrentlyavailableatnocharge,overtheInternetanytime,dayornight,worldwidetoallowyoutogetuptospeedquickly.Newtopicseachmonth,suchas:ClockingTechniques,TimingClosure,DDRMemoryInterface,FPGAvs.ASIC,etc.
www.xilinx.com/training/free-video-courses.htm
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NOTES
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