wireless reciever arch

Receiver ArchitectureReceiver basics

Channel selection – why not at RF?BPF first or LNA first?Direct digitization of RF signal

Receiver architecturesSub-sampling receiver – noise problemSub sampling receiver noise problemHeterodyne receiver – image problemSuper-heterodyne receiver – more image problemImage-reject receiversImage-reject receivers

Harley receiverWeaver architecture

Homodyne (direct conversion, zero-IF) – DC offsetHomodyne (direct conversion, zero IF) DC offsetDigital IFWide-IF double-conversionSliding IF

Prof. C. Patrick Yue Slide 1

Sliding IF

Fundamental Trade-off in ReceiverUsing one or more IF stages to relax the filter requirements, but need to deal with imagesUsing image reject mixers with I&Q LO signals to eliminate the need of band-pass filters (to enable higher level of integration)RF ICs typically employ a combination of simple mixing with some image filtering and image reject mixing


Channel Selection at RF?GSM example: channel bandwidth is 200 kHz, RF carriers at 935–960 MHzFilter Q = 10 * RF / BW = 10 * 950 M / 200k = 47 500! Filter Q = 10 RF / BW = 10 950 M / 200k = 47,500! (Impossible to achieve such high Q at RF, or too expensive!)Instead, we do band select, for GSM, the band is 25 MHz, so the filter Q required is 10 * RF / BW = 10 * 950 M / 25 M = 380, much more reasonable.


BPF First or LNA First?Trade-off between suppressing inter-modulation products due to interferers vs. noise figure BPF first: better interferer rejection, but higher noise figure due to the insertion loss of the filterinsertion loss of the filterLNA first: better noise figure, receiver can be desensitized due to interferersInterferers are bigger problem so BPF first is adapted in all receiversInterferers are bigger problem, so BPF first is adapted in all receivers


Receiver Using High-Speed DSP

Directly sample the carrier at RF to facilitate the use of high-speed DSP.For input power ranging from –100 dBm (3.2 μVpeak) to –10 dBm (100 mVpeak), the ADC will need the following performance:

A 1-GHz, 15-bit ADC is impossible to implement with reasonable power in the near future


Sub-Sampling Receiver


Noise in Sub-Sampling Receiver

The noise floor is raised by a factor of 2m, where m is the sub-sampling factorPhase noise is increased by m2 at the output of the sub-sampler


Heterodyne Receiver

The KEY question in receiver design is –at what stage to perform

Mixer outputat at stage to pe ochannel select?Easier to achieve high-Q BPF at lower frequency, which favors lower IF butfavors lower IF, but…Image rejection becomes difficultAnother questions is –


At mixer outputAt mixer outputshould the LO (ωLO) be

above or below carrier (ωRF)?

High-Side LO vs. Low-Side LOAdvantage of using high-side LO

the ease in tuning the LO over the desired band of frequencieschoice of High Side LO is motivated by the ease in tuning the LO over the desired band of frequencies. Tuning of the LO is often done using a varactor. For a given voltage change (and varactor capacitance change), the LO frequency can be changed over a wider range of frequencies for a high-side LO compared to a low-side LO. Due to the limited linearity of the varactor, LO compared to a low side LO. Due to the limited linearity of the varactor, choice of the high-side LO results in improved linearity of the LO frequency with change in bias voltage. Due to this reason, the high-side LO’s are more popular.

Advantage of using low-side LOlower noise and power dissipation since operating at lower frequencies

Another important consideration in the choice of high-side LO versus p glow-side LO is in the image frequencies that will be picked up. The choice of high-side LO versus low-side LO might be made based on the relative quietness of the image band in each case.


Image Reject Filter in Heterodyne Receiver

Trade-off between sensitivity (image rejection) and selectivity (channel selection) dictates the choice of IF

High-IF – image reject filter easier to implement and provides better sensitivityLow-IF – channel select filter easier to implement and gives better selectivity

Both image reject BPF and channel select select BPF are difficult to implement on chip hich makes heterod ne recei er less attracti e for


implement on chip, which makes heterodyne receiver less attractive for monolithic RF transceiver

Half-IF Problem

2ω2ωLO

A spurious tone at 0 5*IF (half way between and ) undergoes even harmonic A spurious tone at 0.5*IF (half way between ωRF and ωLO) undergoes even harmonic distortion and generates a spur at (ωRF + ωLO) at the input of the mixer, which mixes with the 2nd harmonic of the LO to produce noise at (ωRF – ωLO).To suppress the half-IF phenomenon


minimize second-order distortion in the RF path (using differential circuits)maintain 50% duty cycle in the LO to reduce 2ωLO

Channel Selection by Adjusting LO Frequency

Tunable high-Q bandpass filters are difficult and expensive to implement, th th t i th BPF t f th LO i h d so rather than tuning the BPF center frequency, the LO is changed

depending on the desired channelFor example, FM radios use 10.7 MHz as the fixed IF, to tune to the station at 101 3 MHz the LO is adjusted to 112 0 MHz


101.3 MHz, the LO is adjusted to 112.0 MHz.

Super-heterodyne Receiver

To relax the trade-off between sensitivity (image reject) and selectivity (channel select), we can introduce a second IF to the heterodyne receiver architecture, which results in a super-heterodyne receiverp yA super-heterodyne receiver is a heterodyne receiver with dual IFsA super-heterodyne receiver relaxes the bandpass filter Q at each stage by having more filter stages


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Secondary Image Problem in Superheterodyne Receiver

The input spurious tone at ωIM2 (at input of 1st mixer) = ωRF + 2ωLO2 will p p IM2 ( p ) RF LO2cause a secondary image tone at ωLO2 + ωIF2 at the input of the 2nd mixer.Example: given that ωRF = 950 MHz, ωLO1 = 1050 MHz, and ωLO2 = 110 MHz

ωIF1 = 100 MHz and ωIF2 = 10 MHz


ωIF1 100 MHz and ωIF2 10 MHzωIM2 = ωIF2 + ωLO2 + ωLO1 = 10 + 110 + 1050 = 1170 MHz (= ωRF + 2ωLO2)

Another Source of Secondary Image

The input spurious tone at 2ωLO1 – 2ωLO2 – ωRF will also cause a secondary image tone at ωLO2 + ωIF2 at the input of the second mixerNotice that the difference between 2ωLO1 – 2ωLO2 – ωRF and ωLO1 is the same as the spurious tone in the previous slide


p p

Channel Selection in Super-heterodyne ReceiverThere are three approaches

Variable LO1 with fixed LO2Requires very high precision in frequency synthesizer Requires very high precision in frequency synthesizer (temperature variation can be a big problem)

Fixed LO1 with fixed LO2Requires very wide tuning range in in frequency synthesizer Requires very wide tuning range in in frequency synthesizer

Variable LO1 with variable LO2Requires both LOs to track each other


Channel Selection in Super-heterodyne ReceiverV i bl LO1 d fi d LO2Variable LO1 and fixed LO2

Using a variable LO1and fixed LO2 makes the task of channel selection extremely Using a variable LO1and fixed LO2 makes the task of channel selection extremely challengingExample: In GSM we need to zero down on to a frequency such as 935.20 MHz with increments of 0.2 MHzF ti l h i LO1f i 0 2 MH / 950 MH 0 02%


Fractional change in LO1frequency is 0.2 MHz / 950 MHz ~ 0.02%Total change in LO1 is 25 Hz / 950MHz ~ 2.5%

Channel Selection in Super-heterodyne ReceiverFixed LO1 and variable LO2

Using a fixed LO1 makes it easier to design LO1. Fixed frequency oscillators have the advantage that a lower phase noise can be obtained oscillators have the advantage that a lower phase noise can be obtained due to the lower PLL bandwidth that can be usedUsing a variable LO2 makes the task of channel selection much easier.Fractional change required in LO2 is 0 2 MHz / 100 MHz ~ 0 2%Fractional change required in LO2 is 0.2 MHz / 100 MHz ~ 0.2%.Total change required in LO2 is 25 MHz / 100 MHz ~ 25%

Requires wide tuning range VCO in the frequency synthesizer, need to the use of varactor in conjunction with switching capacitor arrays


use of varactor in conjunction with switching capacitor arrays

More Filters => More Images => More FiltersHigh-Q filters are hard to build and expensiveUse more filters each with lower QBut that requires more mixing in the receive chain which leads to image q g gproblems and needs more filters…

So are there any other way to suppress image without using filters?So, are there any other way to suppress image without using filters?


Image Reject Receiver

<= Use cosine as the in-phase, I carrierIf the desired input is cosinep

<= Use sine as the quadrature-phase, Q carrier


(ωRF < ωLO < ωIM because we are using high-side LO)

Principle of Image Reject Receiver

I d Q th LO’ th t 90° t f h i i


I and Q path use LO’s that are 90° out of phase, cosine vs. sine

Principle of Image Reject Receiver

90° degree shift is added to the Q path such that the output due to the image


90° degree shift is added to the Q path, such that the output due to the image signal is 180° out of phase with respect to the image in the I path

Image Reject Receiver


Question: Remember quadrature modulation using I&Q as two separate channels? How would it work in a image reject receiver architecture?

Hartley’s Image Reject Receiver


Quadrature GeneratorsFrequency dividers (covered in previous lecture)Polyphase filter


Polyphase Filter (1)


Polyphase Filter (2)


Practical Consideration in Polyphase Filter Design

(lowers the output amplitudes)(lowers the output amplitudes)


Practical Implementation of Multi-Stage Polyphase Filter

Using a “ring” topology to allows easy cascading of multiple stages



With Qi and QBi absent, the polyphase filter reduces to the simple RC-CRTh t fi ti ll di f lti l t


The current configuration allows easy cascading of multiple stages


Multi-stage broaden the bandwidth over which the amplitude of I and Q


paths matches.

Image Rejection Ratio in Hartley ReceiverFor perfect image rejection, this term is equal to zero

Why 4A2?

5% of amplitude imbalance (~0 5 dB) and 1° of phase mismatch result in


5% of amplitude imbalance (~0.5 dB) and 1 of phase mismatch result in approximately –30 dB of IRR

Image Rejection Ratio

Amplitude imbalance and phase mismatch in the I and Q paths limits the IRRGain mismatch can usually be limited to < 0.5~1.0 dB and phase error is around 1–2°Mi t h i i d LPF l d d IRR


Mismatch in mixers and LPFs also degrade IRRTypical image rejection ratio achievable on-chip is about 25–30 dB using Hartley architecture

Polar Plot of IRR


Applying Polyphase Filters in Hartley Receiver

Quadrature LO can be generated by passing the output of the frequency

A 90° phase shift between I & Q signals is achieved by shifting the I-signal with –45° and the Q-signal with +45°

synthesizer through a polyphase filter


Adding the I and Q Paths


Complete Implementations of Hartley Receiver


Practical ConsiderationsImage Rejection Requirement

An overall image suppression of 55–70 dB is needed in most receiver(what determines the required image rejection?)With an appropriate choice of IF frequency (high enough), an image suppression of 30-40 dB can be achieved by the RF band select filter or the image reject filter (if necessary)Hartley’s architecture provides an additional 25 30 dB image rejection Hartley s architecture provides an additional 25–30 dB image rejection bringing the overall image rejection to 55–70 dBOther mismatches in the I&Q paths limits the practical IRR to –25 to –30 dB

Mismatches between I&Q mixers, LPFsMismatches between I&Q mixers, LPFsI&Q LO mismatches in amplitude and phase

Polyphase filter ypMulti-stage improves I & Q matching over a wider bandwidth, but increases noise (thermal noise in the resistors) and power consumption (amplitude reduction)


Practical implementation rarely uses more than 2 stages of RCCR

Weaver Architecture

We have seen that a 90° phase shift is introduced between I & Q signals by mixing the incoming signal using cosine and sine LOsmixing the incoming signal using cosine and sine LOsWe need to achieve another 90° phase shift, such that the down-converted desired signal will remain in phase while the one due to the image spur will be become 180° out of phase.


In Weaver architecture, the second down-conversion mixing is also performed with I&Q LOs to achieve another 90° phase shift between the I&Q paths

Second Quadrature Mixing in Weaver Architecture

Note that a negative sine is used as the LO for the Q path to provide the


Note that a negative sine is used as the LO for the Q path to provide the +90° phase shift because the incoming desired signal is a positive sine wave and the image tone is negative sine wave

Weaver Receiver

What happens if the desired input signal is a sine wave?pp p gWeaver architecture is sensitive to relative phase of the RF input and the LOsTo support quadrature modulation (incoming signals in cosine and sine), the second mixing requires quadrature mixing to preserve the desired signal


Secondary Image Problem in Weaver Receiver

Recall that there are two secondary image tones which can cause interference at ωIF2the one above ωLO1 will appear as a negative sine wave at the input of the second mixer, so it will under go a total of 180° phase shift after the second down-conversion


so it will under go a total of 180 phase shift after the second down conversionthe one below ωLO1 will appear as a positive sine wave (just like the desired signal) at the input of the second mixer, and it will become in-phase with its I-path counterpartBPF is used to remove this tone before the second mixer

Homodyne Receiver

LO frequency is the same as the incoming RF carrier frequencyAlso known as direction conversion or zero-IF receiverNo more image problem to worry aboutBut it will work only if the desired signal has symmetrical sidebands


(known as double sideband modulation)

Homodyne Receiver

Done in baseband using DSP

Use quadrature mixing to separate the upper sideband signal and the lower sideband signal

g

gQuadrature mixing also removes the problem due to phase mismatch between the carriers and LOUse DSP to reconstruct the desired signal in the baseband


Note that is the input signal has a 2 MHz bandwidth, the I&Q paths each need to have a bandwidth of 1 MHz

Quadrature Down-Conversion for Homodyne Receiver

QQ

II

If phase modulation is used, quadrature mixing converts the information in to the relative phase between I and Q signals.In the above example, the carrier is modulated using QPSK, hence


t e abo e e a p e, t e ca e s odu ated us g Q S , e ceφ(t) is π/4, 3π/4, 5π/4, or 7π/4

Homodyne Receiver Pros and Cons

AdvantagesRemove the need for image reject BPF between LNA and mixerChannel select can be performed using LPF in stead of BPFChannel select can be performed using LPF in stead of BPF

DisadvantagesDC offset (A BIG PROBLEM!!)

LO leakageLO leakageStrong interfererTime-varying offsetLO with non-50% duty cycley yEven order distortion in LNA

1/f noiseI&Q gain and phase mismatchMore stringent dynamic range and reverse isolation


DC Offset

DC offset can be as large as 10 mV due to various sourcesDC offset can be as large as 10 mV due to various sourcesThe desired signal can be much small, e.g. 0.5 mVIn order for the ADC to be able to resolve the desired signal, the IF amplifier needs to provide sufficient gain so the desired signal reaches the full scale of the ADC, e.g. 500mVWith a gain of 1000, the DC offset will clearly saturate the ADC


DC Offset Due to LO Leakage

LO signal can leak through the LO port to the RF port due to parasitic couplings and cause self mixing


DC Offset Due to Strong Interferer

A strong interferer can leak through the RF port to the LO port due to parasitic couplings and cause self mixing


DC Offset Due to Time-Varying Offsets

LO signal can leak through the antenna, radiate into the air and reflect from the surrounding and reach the RF port of the mixerGood LNA reverse isolation can suppress this effect


DC Offset Due to Non-50% Duty Cycle LOs

If the duty cycle of the LO is not 50%, the output of the mixer will have a DC ff tDC offset


DC Offset Due to Even Order Distortion in LNA

In homodyne receivers we also need to consider even order distortion characterized by IIP2Consider two strong interferers closely spaced in frequency being received atthe

t S d d di t ti lt i diff f t t antenna. Second order distortion results in a difference frequency to appear at the output of the LNA. The mixer exhibits a finite amount of direct feedthrough; hence the difference frequency signal would end up at the output of the mixer corrupting the desired signal. For homodyne applications, the LNA should be d i d t h hi h IIP2 i dditi t hi h IIP3


designed to have high IIP2 in addition to high IIP3.Use differential circuit to reduce even order distortion

Reducing DC Offset with AC Coupling

Requires huge AC coupling capacitor (too big to fit on a chip)Very slow settling time, for example, a 200-Hz cut-off implies a settling time of 2 ms, which can too long for most systemO l k ith “ DC d l ti ” hi h h d t b l th t ff Only works with “zero DC modulation” which has no data below the cut-off frequency of the HPF


Reducing DC Offset with Offset Cancellation

Some systems such as TDMA, inherently contain time intervals during which the receiver is idle, which could be used to perform offset cancellationThe output DC voltage accumulated on the capacitor during the idle time could be measured and subtracted from the output voltage of the mixer resulting in cancellation of the DC offsetIf the offset cancellation is performed at a sufficient rate, the time-varying DC If the offset cancellation is performed at a sufficient rate, the time varying DC offset can also be handledkT/C noise due to the switch must be consideredAn alternative is to have two sets of mixers so that, at any given moment, one is

sed hile the other is ha ing its offset cancelled


used while the other is having its offset cancelled

1/f Noise in Homodyne Receiver

1/f noise from the mixer presents a severe problem in the design of homodyne receivers since the 1/f noise spectrum falls in the same band as the down-converted output signalas the down-converted output signal


I&Q Mismatch in Homodyne Receiver

Ideal I&Q I&Q constellation constellation

gain and phasemismatch

Phase mismatch is a more severe problem than gain mismatchDeviation from the quadrature phase difference means that some of the I signals will appear in the Q channel and vice versa, which reduce SNR in g pp ,both channelsCan be compensated with DSP in the baseband using known data as training (or calibration) sequence

Gain mismatch can be compensated by the variable gain IF amplifiers in


Gain mismatch can be compensated by the variable gain IF amplifiers in the I&Q paths

Channel Selection in Homodyne Receiver

Case 1: relaxes LPF noise requirements, demands higher linearity from IF ampCase 2: LPF needs to low noise figure IF amp linearity requirement is relaxedCase 2: LPF needs to low noise figure, IF amp linearity requirement is relaxedCase 3: high linearity required in both IF amp and ADC, LPF performed in digital domain


Which one will you choose?

Requirements on Homodyne Receiver

Linear LNA (low IIP2 and IIP3)Linear mixers (to suppress DC offset)LO i d i h i l 50% d lLOs operating at quadrature with precisely 50% duty cycleDC offsets in the range of uVLow 1/f NoiseHigh degree of isolation and stability


Digital IF Receiver

Commonly used for multi-band, multi-mode cellular phone applicationsThe second stage of mixing and filtering in a super heterodyne (dual IF) architecture is performed in the digital domainAft th fi t i th i l i di iti d b th A/D After the first mixer, the signal is digitized by the A/D The quantization and thermal noise of the A/D cannot exceed a few uV for a good receiverTh li it f th A/D t b ffi i tl hi h t th The linearity of the A/D must be sufficiently high to suppress the intermodulation outputs from corrupting the desired signalChoice of the first IF is dictated by the speed of the A/DTypically first IF is around 75 MHz with the ADC running at 150 to 200 MS/s and


Typically, first IF is around 75 MHz with the ADC running at 150 to 200 MS/s and 9 to 11 bit resolution

Full Implementation of a Digital IF Hartley Receiver

But we still need image reject BPF filter before the first mixer, which means that we need to go off chip can we do better?we need to go off-chip, can we do better?


Wide-IF Double Conversion Receiver

The wide IF double conversion architecture is Weaver architecture with the IF2 = 0As in a Weaver architecture, there are two stages of down-conversionThe secondary image that plagues Weaver architecture is suppressed by using IF2=0As in a homodyne receiver, additional mixers (hence the name double conversion) are required to correctly detect the signalThe first LO is fixed and the second LO is tuned to the desired LOBecause the first LO is fixed easier trade offs may be obtained with regard to a LO Because the first LO is fixed, easier trade-offs may be obtained with regard to a LO phase noiseAs in the case of homodyne architecture, channel select BPF is eliminatedLO leakage problem is greatly suppressed since LO1 is not equal to the carrier g p g y pp qfrequency of the desired signalThe only filter therefore required is the front-end band select filterVery good for monolithic implementation


Wide-IF Double Conversion Receiver


Sliding-IF Receiver Architecture

Both the first and second LO are generated


by the same frequency synthesizer

Sliding-IF Receiver Architecture

Vary LO1 and LO2 together to perform essentially the same function as direct conversionNo external IF filteringNo external IF filteringChannel selection at baseband with LPFVery high IF of 1GHz3GH i i 2GH f 5GH i l3GHz image is 2GHz away from 5GHz signalInherent bandpass filtering of 3GHz: –23dBcRF mixer: 5-4 = 1GHz (IF) and 5+4 = 9GHzNo image-reject mixers required


Frequency Synthesizer for Sliding-IF Architecture

LORF is the first LOLOIF is the second LO

Divid-by-4 in the divider chain produces I&Q LOIF with excellent quadrature properties


q p p

Receiver Architecture Trade-offs


References1. Prof. M. Perrott, MIT

http://ocw.mit.edu/OcwWeb/Electrical-Engineering-and-Computer-Science/6-776Spring-2005/CourseHome/index.htm

2. Prof. L. Larson, UC San DiegoECE 265A and 265B lecture notes


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