Web Design of GMRT Web Design of GMRT Digital BackendDigital Backend

Anvesh Ghritlahre STP Student NITW

G.M.R.T. DIGITAL BACK-ENDG.M.R.T. DIGITAL BACK-END

• Performs the Digital Signal Processing of Performs the Digital Signal Processing of the analog signal from the base-band the analog signal from the base-band systemsystem

• Digitizes the analog signal, calculates the Digitizes the analog signal, calculates the cross amplitude and phase information for cross amplitude and phase information for the 30 antenna arraythe 30 antenna array

• Synthesis the Stokes Parameters which is Synthesis the Stokes Parameters which is used in Pulsar studiesused in Pulsar studies

• Stores data for further observationsStores data for further observations

Digital Back-endDigital Back-end

Classification of the Digital Back-Classification of the Digital Back-endend

• The Digital Back-end can be broadly divided The Digital Back-end can be broadly divided into:into:

• The correlator sectionThe correlator section is responsible for is responsible for the analog to digital conversion ( ADC the analog to digital conversion ( ADC subsystem), nullify the delay introduced subsystem), nullify the delay introduced ( Delay DPC ) and perform the FFT ( FFT ( Delay DPC ) and perform the FFT ( FFT subsystem ) and multiply and accumulate subsystem ) and multiply and accumulate data ( MAC )data ( MAC )

• The Pulsar ReceiverThe Pulsar Receiver calculates the Stokes calculates the Stokes Parameters needed for Pulsar Research Parameters needed for Pulsar Research

The Correlator SectionThe Correlator Section

•The correlator section can be The correlator section can be divided into divided into

•Sampler ( ADC Subsystem )Sampler ( ADC Subsystem )

•Delay DPC SubsystemDelay DPC Subsystem

•FFT SubsystemFFT Subsystem

•MAC SubsystemMAC Subsystem

Sampler ( ADC Sampler ( ADC Subsystem )Subsystem )

• It is the front-end of the correlator It is the front-end of the correlator systemsystem

• Converts analog signals from various Converts analog signals from various antennas into digital format for further antennas into digital format for further processing processing

• Takes analog input from the baseband Takes analog input from the baseband system system

• Gives digital 6-bit signal as the outputGives digital 6-bit signal as the output

ADC CARDADC CARD

• The active card of the ADC systemThe active card of the ADC system

• Takes two analog inputs, gives 6-bit digital outputTakes two analog inputs, gives 6-bit digital output

Features of ADC SectionFeatures of ADC SectionClock Rate 32 Msamples/Sec.

No. of bits 8-bits (only 6 msb bits used).

Analog Input Voltage +/-1 Vpp.

Input Power Level 0 dBm.

Output Logic Levels ECL Level.

ADC chip used AD9058 – Flash type ADC

Delay DPC SectionDelay DPC Section

• Performs the Noise switching & Walsh demodulation of the Performs the Noise switching & Walsh demodulation of the signal from the ADC Subsection, RFI mitigation in time signal from the ADC Subsection, RFI mitigation in time domain is also performeddomain is also performed

• Conversion of unsigned 6 bits from ADC to 4 bits sign Conversion of unsigned 6 bits from ADC to 4 bits sign magnitude form is done magnitude form is done

• Channel multiplexing at the output ( as needed for the full Channel multiplexing at the output ( as needed for the full polar mode ) is also performed polar mode ) is also performed

• Dual clock support is present to take care of extra overhead Dual clock support is present to take care of extra overhead cycles in the FFT cycles in the FFT

• Hardware has been implemented using two Altera FPGA Hardware has been implemented using two Altera FPGA devices per antenna ( all 4 channels ) on one board, and devices per antenna ( all 4 channels ) on one board, and PLDs for bus arbitration logics PLDs for bus arbitration logics

Delay DPC CardDelay DPC Card

Top ViewTop View

Rear ViewRear View

FFT SubsystemFFT Subsystem• Two FFT cards are required to process signals from Two FFT cards are required to process signals from

one antenna one antenna • Complex numbers to be multiplied and accumulated in Complex numbers to be multiplied and accumulated in

the MAC come from outputs of the FFT cards the MAC come from outputs of the FFT cards • In Indian Polar mode as well as Non-Polar mode, FFTs In Indian Polar mode as well as Non-Polar mode, FFTs

in one side band system outputs signals from Upper in one side band system outputs signals from Upper Side Band and FFTs in other sideband system output Side Band and FFTs in other sideband system output signals from Lower Side Band ( total BW is 32MHz )signals from Lower Side Band ( total BW is 32MHz )

• In Full polar mode all FFT cards outputs signals from In Full polar mode all FFT cards outputs signals from same sideband ( USB or LSB total BW is 16Mhz )same sideband ( USB or LSB total BW is 16Mhz )

• FFT output is in 12 bit ( 4 bits real, 4 bits imaginary FFT output is in 12 bit ( 4 bits real, 4 bits imaginary and 4 bits common exponent ) format since FX ASIC in and 4 bits common exponent ) format since FX ASIC in MAC mode accepts input in this format MAC mode accepts input in this format

FFT Card FFT Card

• Each FFT card has two pipelines to process Right and Left Each FFT card has two pipelines to process Right and Left circular polarization independently circular polarization independently

• FFT card performs N ( 512 ) point FFT on the incoming data FFT card performs N ( 512 ) point FFT on the incoming data and gives N/2 ( 256 ) channels as output. The output from and gives N/2 ( 256 ) channels as output. The output from two pipelines is multiplexed to maintain the 32Ms/sec data two pipelines is multiplexed to maintain the 32Ms/sec data rate which is the required data rate for the MAC rate which is the required data rate for the MAC

• ASICs are used as basic building block for FFT operation, ASICs are used as basic building block for FFT operation, each operates at 32.25 MHz clock speed. This is different each operates at 32.25 MHz clock speed. This is different from 32 MHz sampling clock, mainly to accommodate the from 32 MHz sampling clock, mainly to accommodate the extra four overhead clock cycles consumed by FFT extra four overhead clock cycles consumed by FFT operationoperation

• The FFT operation is pipelined and uses Divide and Conquer The FFT operation is pipelined and uses Divide and Conquer Approach algorithm to compute a 512 point FFT. Five ASICs per Approach algorithm to compute a 512 point FFT. Five ASICs per pipeline are used to calculate the 512 point FFT operation, with the pipeline are used to calculate the 512 point FFT operation, with the operations split as radix 2, 4, 4, 4 & 4 computationsoperations split as radix 2, 4, 4, 4 & 4 computations

• The output from the FFT card is always in time multiplexed The output from the FFT card is always in time multiplexed fashion ( R & L polarization ) but depends on the mode fashion ( R & L polarization ) but depends on the mode selected at the DPC subsystem selected at the DPC subsystem

FFT Card with Pipeline BoardFFT Card with Pipeline Board

MAC SubsystemMAC Subsystem

• MAC sub-system Multiplies and Accumulates the signals MAC sub-system Multiplies and Accumulates the signals from each pair of 30 antennasfrom each pair of 30 antennas

• It provides a 30x30 matrix for each of 2 sidebands & 2 It provides a 30x30 matrix for each of 2 sidebands & 2 polarisations, with 256 spectral channels per sidebandpolarisations, with 256 spectral channels per sideband

• MAC sub-system Multiplies and Accumulates the signals MAC sub-system Multiplies and Accumulates the signals from each pair of 30 antennas. It provides a 30x30 matrix from each pair of 30 antennas. It provides a 30x30 matrix for each of 2 sidebands & 2 polarisations, with 256 spectral for each of 2 sidebands & 2 polarisations, with 256 spectral channels per Sidebandchannels per Sideband

• Visibilities are output at the rate of once every 128 msVisibilities are output at the rate of once every 128 ms

• Number of spectral channels is :Number of spectral channels is :

128 in 32 MHz BW, Indian Polar,128 in 32 MHz BW, Indian Polar,

128 in 16 MHz BW, Full Polar,128 in 16 MHz BW, Full Polar,

256 in 16 MHz BW, Non-polar.256 in 16 MHz BW, Non-polar.

MAC CardMAC Card

• The most integral part of the MAC Subsystem is the The most integral part of the MAC Subsystem is the MAC cardMAC card

• The MAC card has an ASIC chip which is its The MAC card has an ASIC chip which is its fundamental element. Each ASIC takes input from 2 fundamental element. Each ASIC takes input from 2 FFT cards, 12 bits eachFFT cards, 12 bits each

• The inputs go to registers and they get multiplied and The inputs go to registers and they get multiplied and then accumulated for the N number of FFT cycles. then accumulated for the N number of FFT cycles. The accumulated data of one cycle is stored in the The accumulated data of one cycle is stored in the first bank of the ASIC RAM, which is 256 * 36 ( # of first bank of the ASIC RAM, which is 256 * 36 ( # of spectral channels * Bits in output 15,15,6 )spectral channels * Bits in output 15,15,6 )

• In the next cycle, MAC operation uses the second In the next cycle, MAC operation uses the second bank of the ASIC RAM. During the four dead cycles, bank of the ASIC RAM. During the four dead cycles, the Data goes to the acquisition machine through the Data goes to the acquisition machine through back plane and DAS card. back plane and DAS card.

ASIC & MAC Chip LayoutASIC & MAC Chip Layout

ASIC Chip MAC Chip

MAC CardMAC Card

The Pulsar Receiver SectionThe Pulsar Receiver Section

• The GMRT Pulsar Receiver provides high The GMRT Pulsar Receiver provides high time resolution, “single dish” output by time resolution, “single dish” output by suitably adding the signals from individual suitably adding the signals from individual antennas of the GMRT antennas of the GMRT

• The Pulsar Back-end can be subdivided into The Pulsar Back-end can be subdivided into ::

• The G.M.R.T. Array CombinerThe G.M.R.T. Array Combiner

• The PolarimeterThe Polarimeter

• The IA & PA ReceiverThe IA & PA Receiver

Block Diagram of Pulsar Block Diagram of Pulsar Back-endBack-end

Data Flow Data Flow Diagram of Diagram of

Pulsar Pulsar ReceiverReceiver

G.M.R.T. Array Combiner G.M.R.T. Array Combiner ( GAC )( GAC )

• GAC is designed to facilitate the single beam GAC is designed to facilitate the single beam made observations for G.M.R.T made observations for G.M.R.T

• The GAC hardware is realised using the PROM The GAC hardware is realised using the PROM based pipe-lined combiner networkbased pipe-lined combiner network

• The GAC allows any user selected set of antenna The GAC allows any user selected set of antenna signals to be added to get the array outputsignals to be added to get the array output

• Both single beam modes ( IA & PA ) are available Both single beam modes ( IA & PA ) are available simultaneously to facilitate more than one kind of simultaneously to facilitate more than one kind of observations possible at the same time observations possible at the same time

GAC Functional BlockGAC Functional Block

PolarimeterPolarimeter

• The Polarimeter has been developed for G.M.R.T. The Polarimeter has been developed for G.M.R.T. at the Raman Research Institute, Bangalore, Indiaat the Raman Research Institute, Bangalore, India

• The Polarimeter is designed primarily for use with The Polarimeter is designed primarily for use with the G.M.R.T. radio telescope and perform the the G.M.R.T. radio telescope and perform the above mentioned operations over dual, above mentioned operations over dual, orthogonal-polarization data samples of 512 orthogonal-polarization data samples of 512 frequency channels covering a maximum frequency channels covering a maximum bandwidth of 32MHz bandwidth of 32MHz

• The digital design exploits the advantages in using The digital design exploits the advantages in using look-up tables, reprogrammable logic circuits and look-up tables, reprogrammable logic circuits and DSP chips to provide full programmability and a DSP chips to provide full programmability and a modular architecture so that the bandwidth can be modular architecture so that the bandwidth can be scaled from 1MHz to 32MHz and interfaced to work scaled from 1MHz to 32MHz and interfaced to work with any other telescopewith any other telescope

Polarimeter Block DiagramPolarimeter Block Diagram

The IA & PA ReceiverThe IA & PA Receiver

• The two back-ends ( IA & PA ) allow the raw data stream The two back-ends ( IA & PA ) allow the raw data stream from the GAC to be integrated in time / frequency to from the GAC to be integrated in time / frequency to achieve a net data rate at which the signals can be achieve a net data rate at which the signals can be recorded using PC based data acquisition systemsrecorded using PC based data acquisition systems

• In addition, the PA bin computes the basic self and cross In addition, the PA bin computes the basic self and cross terms between the voltage signals of the two polarizations, terms between the voltage signals of the two polarizations, from which the full Stokes parameters can be constructedfrom which the full Stokes parameters can be constructed

• The highest time resolution achievable is 128 microsec for The highest time resolution achievable is 128 microsec for the IA mode and 512 microsec for the full Stokes PA modethe IA mode and 512 microsec for the full Stokes PA mode

• These back-ends are available only for one sideband ( 16 These back-ends are available only for one sideband ( 16 MHz ) BW and are connected to the upper sideband ( USB )MHz ) BW and are connected to the upper sideband ( USB )

Web DesigningWeb Designing

• What ???What ???

• Why ???Why ???

• When ???When ???

• Where ???Where ???

• How ???How ???

Objectives :Objectives :

• To provide maximum possible To provide maximum possible information in a simple and efficient information in a simple and efficient mannermanner

• To make the contents interactive for To make the contents interactive for the visitors the visitors

• To provide clear understanding of the To provide clear understanding of the working of the digital back-endworking of the digital back-end

• To assemble the available information To assemble the available information in a planned and regulated mannerin a planned and regulated manner

Data AccumulationData Accumulation• Information about the workings of the Information about the workings of the

various systems was acquired from the various systems was acquired from the thesis works done by many people and from thesis works done by many people and from the internal reports of G.M.R.T.the internal reports of G.M.R.T.

• Block Diagrams, schematics of various ICs, Block Diagrams, schematics of various ICs, etc. were taken from the maintenance files etc. were taken from the maintenance files

• Datasheets of ICs used were taken from the Datasheets of ICs used were taken from the internetinternet

• Images acquired from the respective Images acquired from the respective incharge of the system, printed images incharge of the system, printed images were scannedwere scanned

• Some block diagrams were constructed Some block diagrams were constructed from textfrom text

Methodology EmployedMethodology Employed

• The web page was divided into many frames The web page was divided into many frames and each frame was assigned some pageand each frame was assigned some page

• Some frames were kept stationary whereas Some frames were kept stationary whereas others were changed as per user inputothers were changed as per user input

• Sidebar approach was incorporated for Sidebar approach was incorporated for navigation through the pagesnavigation through the pages

• Links were provided for moving from one Links were provided for moving from one page to anotherpage to another

• Site map was constructed to help navigationSite map was constructed to help navigation• A navigator was also constructed to facilitate A navigator was also constructed to facilitate

easy navigation from one part to othereasy navigation from one part to other

Testing and DebuggingTesting and Debugging

• Extensive testing of the link structure in Extensive testing of the link structure in the site was performedthe site was performed

• www.browser-watch.comwww.browser-watch.com was referenced was referenced to find out the most popular browsers and to find out the most popular browsers and their versionstheir versions

• Inter-browser compatibility was testedInter-browser compatibility was tested• The use of JavaScript and ActiveX contents The use of JavaScript and ActiveX contents

was kept minimum to reduce the loading was kept minimum to reduce the loading time of the pagestime of the pages

The Basic StructureThe Basic Structure• The Top frame is an The Top frame is an

stationary frame giving the stationary frame giving the logo of NCRA and the logo of NCRA and the heading of the system. Links heading of the system. Links for the main page and site for the main page and site map have been provided map have been provided

• The left side of the browser The left side of the browser window has been divided window has been divided into two frames which form into two frames which form the sidebar navigation. The the sidebar navigation. The top frame has information top frame has information pertaining to the respective pertaining to the respective subsystem whereas the subsystem whereas the bottom frame has general bottom frame has general information about the whole information about the whole system system

• The frames changes when The frames changes when one moves from one one moves from one subsystem to anothersubsystem to another

• The remaining portion of the The remaining portion of the browser forms the ‘main’ browser forms the ‘main’ frameframe

• Links provided in the Links provided in the sidebar open in the ‘main’ sidebar open in the ‘main’ frameframe

Demonstration Demonstration

• Just a minuteJust a minute

Future ScopeFuture Scope

• Dynamic techniques like DHTML, XML, Dynamic techniques like DHTML, XML, JavaScript, CSS, etc. can be used to make JavaScript, CSS, etc. can be used to make the pages more interactivethe pages more interactive

• The sidebar can be made with Flash to The sidebar can be made with Flash to incorporate dropdown menu styles to incorporate dropdown menu styles to facilitate more information in less spacesfacilitate more information in less spaces

• Web pages for Software Back-end are to be Web pages for Software Back-end are to be mademade

• Scanned images used in the pages do not Scanned images used in the pages do not provide good resolution. They can be provide good resolution. They can be replaced with the original ones when replaced with the original ones when availableavailable

Thank YouThank You