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Wafer Level Functional test with mDDR Wafer Level Functional test with mDDR 박병욱 박병욱 June 29th 2007 System LSI Division Samsung Electronics Co., LTD.

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Page 1: Wafer Level Functional test with mDDRWafer Level Functional test …soc.yonsei.ac.kr/TEST/papers/8th/[C-3].pdf · 2017-03-06 · Wafer Level Functional test with mDDRWafer Level Functional

Wafer Level Functional test with mDDRWafer Level Functional test with mDDR

박병욱박병욱June 29th 2007System LSI DivisionSamsung Electronics Co., LTD.

Page 2: Wafer Level Functional test with mDDRWafer Level Functional test …soc.yonsei.ac.kr/TEST/papers/8th/[C-3].pdf · 2017-03-06 · Wafer Level Functional test with mDDRWafer Level Functional

ContentsContentsContentsContents- Mobile Trend- MCP- Wafer level At-speed Functional test- Probe Card Design ProcessProbe Card Design Process- Board level Simulation- MCW needle 구조 및 특성

- CorrelationCorrelation- Conclusion

Page 3: Wafer Level Functional test with mDDRWafer Level Functional test …soc.yonsei.ac.kr/TEST/papers/8th/[C-3].pdf · 2017-03-06 · Wafer Level Functional test with mDDRWafer Level Functional

Mobile TrendMobile Trend

More SmallerMore Faster

M lti f ti lMulti-functional

제8회 TEST 학술대회 3

Page 4: Wafer Level Functional test with mDDRWafer Level Functional test …soc.yonsei.ac.kr/TEST/papers/8th/[C-3].pdf · 2017-03-06 · Wafer Level Functional test with mDDRWafer Level Functional

What is MCP ?What is MCP ?

MCP is the reword of “Multi Chip Package” MCP is the reword of “Multi Chip Package” that has 2 or more chips stacked in one that has 2 or more chips stacked in one package.package.

MCP i th bi ti f i t f MCP i th bi ti f i t f MCP is the combination of a variety of MCP is the combination of a variety of memory, DRAM, NAND, NOR, UtRAM, etc..memory, DRAM, NAND, NOR, UtRAM, etc..

MCP is the high density package to save SMT MCP is the high density package to save SMT area and to increase memory volumearea and to increase memory volumearea, and to increase memory volume.area, and to increase memory volume.

SOC One ChipProcess Chip Memory Chipp

제8회 TEST 학술대회 4

Page 5: Wafer Level Functional test with mDDRWafer Level Functional test …soc.yonsei.ac.kr/TEST/papers/8th/[C-3].pdf · 2017-03-06 · Wafer Level Functional test with mDDRWafer Level Functional

Wafer Level at-speed function 필요성Wafer Level at-speed function 필요성p 필 성p 필 성

FAB

EDS Need to screen outFunctional Fail Die

Ass’y

Top PKGF/T

Top PKG (Memory)

MCP Stack

Final Test

Final Product

Final Test

제8회 TEST 학술대회 5

Page 6: Wafer Level Functional test with mDDRWafer Level Functional test …soc.yonsei.ac.kr/TEST/papers/8th/[C-3].pdf · 2017-03-06 · Wafer Level Functional test with mDDRWafer Level Functional

Wafer Level At-speed Setup 장단점Wafer Level At-speed Setup 장단점p p 장단점p p 장단점

장 점

• Package상의 불량을 조기에 Screen• Wafer 상에서의 불량 분석을 통한 공정개선Wafer 상에서의 불량 분석을 통한 공정개선

• Para수 증가 생산성 향상

단점

• Probe Card Needle의 High speed 특성

• M DDR등의 At speed동작에 따른 보드특성• M-DDR등의 At speed동작에 따른 보드특성

• Wafer Level 특성과 PKG특성 correlation

제8회 TEST 학술대회 6

Page 7: Wafer Level Functional test with mDDRWafer Level Functional test …soc.yonsei.ac.kr/TEST/papers/8th/[C-3].pdf · 2017-03-06 · Wafer Level Functional test with mDDRWafer Level Functional

Wafer Level Test ConfigurationWafer Level Test Configurationgg

mDDRProbe Card Board

mDDR

NeedleNeedle

Wafer Probing Die

제8회 TEST 학술대회 7

Page 8: Wafer Level Functional test with mDDRWafer Level Functional test …soc.yonsei.ac.kr/TEST/papers/8th/[C-3].pdf · 2017-03-06 · Wafer Level Functional test with mDDRWafer Level Functional

Probe Card Design ProcessProbe Card Design Processgg

P b C d D iProbe Card Drawing

Parameter extractParameter extract from Drawing file

Simulation CheckNo

Manufacture

Yes

제8회 TEST 학술대회 8

Page 9: Wafer Level Functional test with mDDRWafer Level Functional test …soc.yonsei.ac.kr/TEST/papers/8th/[C-3].pdf · 2017-03-06 · Wafer Level Functional test with mDDRWafer Level Functional

Board Level simulationBoard Level simulation

제8회 TEST 학술대회 9

Page 10: Wafer Level Functional test with mDDRWafer Level Functional test …soc.yonsei.ac.kr/TEST/papers/8th/[C-3].pdf · 2017-03-06 · Wafer Level Functional test with mDDRWafer Level Functional

MCW (Micro Coaxial Wire) Needle 구조MCW (Micro Coaxial Wire) Needle 구조( ) 구( ) 구

MCW 배경 : 일반 W-Needle은 자체 L (Inductance)값이 커서 Z

(Impedance) 및 Signal Loss 가 크다. 이에 Needle의 특성을 향상시키고자

Ground 처리를 실시함.

제8회 TEST 학술대회 10

Page 11: Wafer Level Functional test with mDDRWafer Level Functional test …soc.yonsei.ac.kr/TEST/papers/8th/[C-3].pdf · 2017-03-06 · Wafer Level Functional test with mDDRWafer Level Functional

MCW Needle 주파수특성MCW Needle 주파수특성주파수특성주파수특성

Normal Needle

1cm Open1cm Open구간구간

ground ground

1cm Open1cm Open구간구간

ground ground

측정항목 -1dB -3dB

1 100um 순수 Needle 135MHz 292MHz

2 100um MCW Half Ground 231MHz 524MHz

3 100um MCW (1cm open) 417MHz 885MHz

제8회 TEST 학술대회 11

Page 12: Wafer Level Functional test with mDDRWafer Level Functional test …soc.yonsei.ac.kr/TEST/papers/8th/[C-3].pdf · 2017-03-06 · Wafer Level Functional test with mDDRWafer Level Functional

MCW 적용 제품 OverviewMCW 적용 제품 Overview적용 제품적용 제품

MCW 적용적용

Needle 재원: 80um

MCW Full Ground

MCW 적용 핀 : DDR 45x3=135 pin

제8회 TEST 학술대회 12

USB 2X3= 6 pin

Page 13: Wafer Level Functional test with mDDRWafer Level Functional test …soc.yonsei.ac.kr/TEST/papers/8th/[C-3].pdf · 2017-03-06 · Wafer Level Functional test with mDDRWafer Level Functional

CorrelationCorrelation

Wafer vs PKG

y = 0.8715x + 112.27

kage

Pac

k

PKG에서 Functional 불량율 0.6%이하

Wafer

제8회 TEST 학술대회 13

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ConclusionConclusion

Wafer level Functional TEST 필요성Wafer level Functional TEST 필 성

Speed에 맞는 적정한 Needle 선택

Board Level Simulation

제8회 TEST 학술대회 14

Page 15: Wafer Level Functional test with mDDRWafer Level Functional test …soc.yonsei.ac.kr/TEST/papers/8th/[C-3].pdf · 2017-03-06 · Wafer Level Functional test with mDDRWafer Level Functional

Thank YouThank YouThank YouThank You제8회 TEST 학술대회 15