via-hole coupled oversized microstrip line and its band-pass filter application

Via-hole Coupled Oversized Microstrip Lineand Its Band-Pass Filter Application

Lin Li, Ke Wu

Department of Electrical Engineering, Poly-Grames Research Center, Ecole Polytechniquede Montreal, Quebec, Canada H3T 1J4

Received 11 June 2007; accepted 19 September 2007

ABSTRACT: A simple via-hole coupled oversized microstrip line filter is proposed and dem-

onstrated in this article. The via-hole in this case works as an inductor coupling structure

whereas the oversized microstrip line resonator has a higher Q-factor than its conventional

counterpart. Full-wave-based circuit models of a series of via-holes embedded in the over-

sized microstrip line are extracted by using our proposed numerical calibration technique

combined with a commercial method-of-moments simulator. A simple 3-pole via-hole

coupled oversized microstrip line filter is designed and fabricated on the basis of the

extracted circuit models of via-holes. Measured results show that the demonstrated filter has

a center frequency of 1.853 GHz, a bandwidth of 6.98% and an insertion loss of 1.36 dB.

Measured results of the fabricated filter sample are in agreement with its simulated results,

showing a good performance of the proposed scheme. VVC 2008 Wiley Periodicals, Inc. Int J RF

and Microwave CAE 18: 436–444, 2008.

Keywords: TRL calibration technique; via-hole; equivalent circuit model; oversized microstrip

line; band-pass filter

I. INTRODUCTION

The plated or metallized via hole has been widely

used as a connecting element to the ground or a jump

or routing mechanism of signal in multilayer printed

circuits. It can also be used to suppress the parallel

plate modes [1] to control the crosstalk of microstrip

lines on printed circuit boards [2], to realize transi-

tions between dissimilar planar lines [3], to syn-

thesize side metal walls in substrate integrated

waveguide circuits [4], to name few examples. The

modeling of various via-holes have been studied [5,

6]. A simple circuit model of via-hole can be repre-

sented by an inductor and the inductance value varies

with the size of via hole. With this in mind, we pro-

pose to use it as a coupling element in filter design.

On the other hand, microstrip lines generally have

low Q if they are used as resonators or filtering ele-

ments. One important contributing aspect of such a

low Q is that the width of microstrip line is usually nar-

row, thus leading to a high ohmic loss due to the strong

current density over the line cross-section with edge

singularities. The Q can be improved if we increase the

width of microstrip line. By combining the via-hole

coupling structure and the oversized microstrip line,

we should be able to realize an interesting compact

low-loss planar filter. The proposed structure looks

like the commonly used inductive post coupled rectan-

gular waveguide filter [7]. The difference is that in the

proposed structure, the oversized microstrip line is

used instead of the rectangular waveguide.

To implement the via-hole in filter and other via-

hole related circuits design, the exact circuit model of

Correspondence to: L. Li; e-mail: [email protected] 10.1002/mmce.20302Published online 3 June 2008 in Wiley InterScience (www.

interscience.wiley.com).

VVC 2008 Wiley Periodicals, Inc.

436

via-hole should be known first. So far, investigation

of the circuit model of via-hole has been mainly

related to the design aspect of interconnects in that

the via-hole acts as a ground connection or signal

jump. Our study in this work will focus on the full-

wave-based circuit models of various via-holes in the

oversized microstrip line, where the equivalent in-

ductance of the via-hole is generally larger than that

of via-hole in normal microstrip line or a via-hole

pad.

Although a via-hole in planar circuit is a three-

dimensional structure, most of the widely used com-

mercial method-of-moments (MoM) planar circuit

simulators like ADS Momentum of Agilent, IE3D

of Zeland, etc., allow one to implement accurate

full-wave simulation of planar integrated circuits

including via-holes. In [8, 9], numerical calibration

techniques have been developed to eliminate the port

discontinuity [10] problem involved in the determin-

istic MoM algorithm and accurately extract full-wave

circuit models of any planar discontinuities. Combin-

ing the developed numerical through-reflect-line

(TRL) calibration [9] with commercial MoM simula-

tors, the full-wave equivalent circuit models of the

via-holes can be easily and precisely extracted with-

out resorting to any elaborate programming based on

electromagnetic field theory.

In this work, the full-wave equivalent circuit

model of various via-holes in oversized microstrip

line will be studied and the design of via-hole

coupled oversized microstrip line band-pass filter will

be described.

II. CIRCUIT MODEL OF VIA-HOLEIN OVERSIZED MICROSTRIP LINE

A typical topology of the via-hole in an oversized

microstrip line is shown in Figure 1a. The via-hole is

located underneath the oversized microstrip line at

reference plane P0. The reference plane P0 is placed

at the center of the via-hole to facilitate any future

implementation of the circuit model of via-hole in

planar circuit design. The diameter of the via-hole is

denoted by D and the width of the oversized micro-

strip line is W. The substrate has a permittivity of erand a thickness of H. To accurately extract the equiv-

alent full-wave-based circuit model of via-hole, the

numerical TRL calibration technique is implemented

with a commercial MoM simulator—Momentum of

Agilent’s ADS, in this case. The whole structure

shown in Figure 1a can be represented by an equiva-

lent network as described in Figure 1b, in which the

error boxes represent both the wave-guiding lines (or

feed lines) and the port discontinuities between the

exciting sources and the wave-guiding lines. The

TRL calibration, similar to the scenario in a practical

measurement, makes use of three standards: Through,

Reflect and Line. Such standards can easily be real-

ized in the simulation. The reference impedance in

the TRL calibration procedure should be equal to the

characteristic impedance of the oversized microstrip

line. By applying this numerical TRL calibration, T-parameters of the core circuit of via-hole can accu-

rately be calculated. Furthermore, the T-parameters

of the via-hole are converted to Z-parameters. The

equivalent circuit model of the via-hole can easily be

derived on the basis of its 2-port Z-parameters.

Figure 1. (a) Structure of a via-hole in an oversized

microstrip line; (b) Corresponding equivalent network of

the via-hole; (c) Equivalent circuit model of the via-hole.

Oversized Microstrip Line 437

International Journal of RF and Microwave Computer-Aided Engineering DOI 10.1002/mmce

The equivalent circuit model of the via-hole with

different physical dimensions as shown in Figure 2 is

studied in detail. The equivalent circuit model of via-

hole is represented by two series inductors Ls, oneparallel inductor Lp, as sketched in Figure 1c, in

which the radiation loss and ohmic loss related resis-

tors (Rs and Rp) are negligible at low frequency.

Since the geometry of the via-hole is symmetrical,

the equivalent circuit model is also symmetrical.

Usually, the series inductor in the model presents a

negative value. The model of the via-hole is very

similar to that of a metal post in the rectangular

waveguide [7].

Figure 3 shows the extracted parameters of the cir-

cuit model of a via-hole with a diameter of 1.016 mm

(er 5 10.2, W 5 10 mm, and H 5 0.635 mm) in the

frequency range of 1–5 GHz. It can be observed that

the via-hole behavior is fairly constant over the fre-

quency range examined, due to the frequency inde-

pendent behavior of the microstrip over the frequency

range examined. In contrast, the circuit model param-

eters of the metal post in the rectangular waveguide

changes with frequency. The frequency-independent

property of the circuit model of via-hole makes the

design of a circuit much more convenient than the

case of using frequency dependant elements.

As the width W of microstrip line increases from 2

to 10 mm, the equivalent parallel inductance of the

via-hole increases almost linearly and the equivalent

series inductance decreases, as indicated in Figure 4

(in which er 5 10.2, H 5 0.635 mm, D 5 1 mm, and

f 5 2 GHz). Thus, we can easily generate a larger

parallel inductance of the via-hole inductor by using

a wider microstrip line, thereby leading to a stronger

coupling between the two ports at the both sides of

the via-hole. In normal microstrip line, a large value

inductance obtained from the via-hole inductor

requires a via-hole of very small diameter, which is

difficult to realize in practice.

The relation between the diameter D of via-hole

and the circuit parameters in the model of via-hole

over the range of diameter D from 0.2 mm to 6 mm is

shown in Figure 5 (in which er 5 10.2, H 5 0.635 mm,

W 5 10 mm, and f 5 2 GHz). It indicates that the

circuit model of via-hole can effectively be treated

as a pure parallel inductor and the inductance in-

creases significantly as the diameter of via-hole

approaches zero. This result agrees with that plotted

in Figure 4: when the diameter of via-hole is much

smaller than the width of microstrip line, the parallel

inductance increases and the series inductance

approaches zero.

Figure 2. (a) Single via-hole located at the center of the

microstrip line. (b) Single via-hole offset from the center

of the microstrip line.

Figure 3. Extracted parameters of the circuit model of a

via-hole (D 5 1.016 mm) vs. frequencies (er 5 10.2, W 510 mm, H 5 0.635 mm).

Figure 4. Extracted parameters of the circuit model of

via-hole vs. width of microstrip line (er 5 10.2, H 50.635 mm, D 5 1 mm, f 5 2 GHz).

438 Li and Wu


As the location of via-hole deviates from the cen-

ter of microstrip line by a distance of s, as shown in

Figure 2b, the parameters of the circuit model of via-

hole will change, as shown in Figure 6 (in which er 510.2, H 5 0.635 mm, D 5 1 mm, W 5 10 mm, and

f 5 2 GHz). We can see that the series inductance

almost remains unchanged while the parallel in-

ductance increases as the via-hole moves towards

the edge of the microstrip line. As the microstrip

line operates with a quasi-TEM mode, the current

density profile over the conductor surface is mainly

flat in the transverse direction except for the two

edge points (where the current density is much

higher than the other parts). Therefore, the via-hole

has a larger inductance at the edge of the micro-

strip line.

The relation between the circuit parameters of the

via-hole model and the height H of substrate in the

range of height H from 0.1mm to 1mm is described

in Figure 7 (for which er 5 10.2, W 5 5 mm, D 51 mm, and f 5 2 GHz). We can observe that the par-

allel inductance of via-hole increases approximately

linearly with the height of substrate as the length of

via-hole also increases. This agrees with the theory of

a short transmission line inductor [11]. The relation

between the model parameters of via-hole and the

permittivity er of substrate in the range of permittivity

er from 1 to 10.2 is depicted in Figure 8 (in which

H 5 0.635 mm, W 5 5 mm, D 5 1 mm, and f 5 2

GHz). There appears that the permittivity of substrate

has no obvious affect on the inductance values in the

circuit model of via-hole.


via-hole vs. location of the via-hole in microstrip line

(er 5 10.2, H 5 0.635 mm, D 5 1 mm, W 5 10 mm, f 52 GHz).


via-hole vs. height of the substrate (er 5 10.2, W 5 5 mm,

D5 1 mm, f5 2 GHz).


via-hole vs. permittivity of the substrate (H 5 0.635 mm,

W 5 5 mm, D 5 1 mm, f 5 2 GHz).


via-hole vs. diameter of the via-hole (er 5 10.2, H 50.635 mm, W 5 10 mm, f 5 2 GHz).



From the above investigation and parametric anal-

ysis, we can conclude that we should be able to

increase the diameter of via-hole or reduce the length

or the width of microstrip line in order to get a

smaller parallel inductance.

III. VIA-HOLE COUPLED OVERSIZEDMICROSTRIP-LINE FILTER

A half-wavelength transmission line has an unloaded

Q calculated by [11]

Q0 ¼ b2a

; ð1Þ

where a and b are the real and image parts of com-

plex propagation constant of the transmission line.

By increasing the width of microstrip line, the ohmic

loss along the microstrip line is reduced and the Qof the resonator is thus enhanced. Simulated results

of the propagation constant for different line width of

the microstrip (the substrate has a permittivity of 10.2

and a thickness of 0.635 mm, no dielectric loss is

considered for simplicity) is demonstrated as an

example by Ansoft-HFSS at 2 GHz as shown in Fig-

ure 9. It indicates that a (representing loss) decreases

and b increases slightly as the width of microstrip

line increases. Therefore, a wider microstrip line has

a higher Q, as suggested by Figure 9.

To measure the Q of the oversized microstrip line,

four experimental sets of the proposed structure are

fabricated as shown in Figure 10. To facilitate the

experiments of such oversized microstrip line resona-

tors in our 50 X system, a geometrically linear taper

from 50 X line to oversized line is added to the input

and output ports of the resonators. The substrate of

circuit is Duroid 6010, which has a permittivity of

10.2, a thickness of 0.635 mm and a loss tangent of

0.0023. The thickness of the metal strip is 16 um.

The width of the oversized microstrip line is 10 mm,

corresponding to a characteristic impedance of 6.6 X.The length of the oversized microstrip is 24 mm in

our experiments. The diameters of via hole in these

four resonators are 1.016 mm, 2.032 mm, 3.048 mm,

and 4.064 mm, respectively.

Measured S-parameters of those resonators are

shown in Figure 11. Those results demonstrate a

good agreement between the measured and full-wave

simulated results from the Momentum of Agilent’s

ADS except for a small frequency shift, which may

be caused by tolerance error in permittivity of the

substrate and also fabrication tolerance. As the diam-

eter of via-holes increase, the coupling between the

resonator and source decreases and the curve of fre-

quency response becomes sharper, and this means

that the measured Q is more and more close to the

unloaded Q of the resonator. Unloaded Q extracted

from the measurements and simulations is shown in

Table I. Considering a loss tangent of 0.0023 of sub-

strate, a Q of 213 is obtained for the oversized micro-

Figure 10. Photograph of the fabricated via-hole coupled

oversized microstrip line resonators with the input/output

tapers. [Color figure can be viewed in the online issue,

which is available at www.interscience.wiley.com.]

Figure 9. Simulated propagation constants of microstrip

line with different widths (simulated by Ansoft-HFSS) and

calculated Q of the line.

440 Li and Wu


strip line as seen from Figure 9, which is close to the

measured unloaded Q of 4.064 mm via hole. The Qcould further be improved by selecting a low dielec-

tric loss substrate.

To support and validate the extracted circuit

model of via-hole, a band-pass filter is designed using

the same substrate as used for the resonators above,

as shown in Figure 12a. The filter is theoretically

made to have 3-dB bandwidth of 8.5%, center

frequency of 1.85 GHz, and ripple of 0.02 dB. This

3-order filter consists of three half-wave length over-

sized microstrip resonators coupled through four via-

holes. The via-holes together with two small sections

of transmission line (the length of the transmission

line is usually negative) at both sides of the via-hole

act as impedance (K) inverters in the design of band-

pass filter. Based on the extracted circuit model of

via-hole and transmission line model, we can easily

build up a complete equivalent schematic network of

this via-hole coupled band-pass filter in the Agilent-

ADS software package, as shown in Figure 12b. The

filter is designed by the insertion loss method [11]

and optimized based on the equivalent schematic

network. The designed dimension of the filter is as

follows: the width of the oversized microstrip line

is 10 mm; the diameters of the four via-holes are

0.782 mm, 3.048 mm, 3.048 mm, and 0.782 mm,

respectively; the lengths of the three microstrip reso-

nators (taking off the length of the inverter) are

23.673 mm, 26.035 mm, and 23.673 mm, respectively.

The designed 3-pole filter is fabricated and the

photograph of the filter is shown in Figure 13, in

which two sections of quarter wavelength impedance

transformer are attached at the input/output ports of

the filter to facilitate the measurements with the

standard 50 X measurement system. Theoretically,

the transition or coupling element between the via-

hole coupled oversized microstrip line filter and the

standard 50 X microstrip line can be realized by the

via-holes in the filter at the input/output ports. In this

case, the diameter of the coupling via-hole should be

of a very small value of around 0.04 mm to yield a

large inductance of 0.47 nH. It is not possible to real-

ize such a tiny via-hole with the processing technol-

ogy in our Poly-Grames Research Center. Therefore,

simple quarter wavelength impedance transformers

are inserted between the oversized microstrip filter

and the standard 50 X lines. The input/output transi-

tions introduce about 0.1 dB power dissipation at

each side.

Measured results of the fabricated 3-pole band-

pass filter compared with the full-wave simulated

ones from the Momentum of Agilent’s ADS and the

simulated ones based on the schematic network of

circuit models are shown in Figure 14. The frequency

Figure 11. Measured S21 parameters of the via-hole

coupled oversized microstrip line resonators compared

with full-wave simulated ones.

TABLE I. Unloaded Q Extracted from the

Measurements and Simulations

Unloaded Q

D (mm) 1.016 2.032 3.048 4.064

Simulated 230.76 252.15 271.09 275.11

Measured 167.70 187.29 199.23 211.28

Figure 12. (a) Layout of 3-pole via-hole inductor

coupled band-pass filter under simulation in Momentum of

ADS; (b) Equivalent schematic network based on equiva-

lent circuit models of via-holes under simulation in ADS.

[Color figure can be viewed in the online issue, which is

available at www.interscience.wiley.com.]

Figure 13. Photograph of the fabricated 3-pole via-hole

coupled filter with the input/output transitions.



response curves agree well with each other. The

insertion loss over the pass-band simulated from the

schematic network is about 0 dB because the ideal

lossless transmission lines are used. In the full-wave

simulations, the copper metal strip is considered with

a thickness of 16 um. The measured center frequency

of the filter is 1.853 GHz while the full-wave simu-

lated one is 1.856 GHz. The measured fractional fre-

quency bandwidth of 6.98% and insertion loss of

21.36 dB are a little bit smaller than the predicted

ones from the full-wave simulations, which are

8.56% and 20.91 dB, respectively. The shrinking in

bandwidth of the filter is mainly due to the hollow

via-holes in fabrication. In our via-hole model pre-

sented in this work, the via-hole has been considered

as a solid hole, but the fabricated via-hole is a hollow

geometry. A hollow hole causes a smaller parallel in-

ductance such that the coupling between resonators is

reduced. For example, for the via hole with diameter

of 3.048 mm, the value of Lp is 0.0516 nH in ‘‘solid’’

case and it is 0.049 nH in ‘‘hollow’’ case. Therefore,

the bandwidth of the filter shrinks and the insertion

loss gets worse.

The insertion loss of this filter can be significantly

improved by choosing a low loss substrate. In our

simulation, the insertion loss will be improved by

0.45 dB (from 20.91 dB to 20.46 dB) if we reduce

the loss tangent of substrate to 0.0001. In addition,

For the purpose of comparison, we simulated a stand-

ard parallel coupled line band-pass filter with the

same center frequency and the same band-width. The

insertion loss is 21.35 dB when the loss tangent of

the substrate is 0.0001. This reflects the improvement

of the Q of the oversized microstrip line resonator.

From this band-pass filter design, we can see that

the extracted full-wave circuit models are effective

for the circuit design in a schematic way. The electro-

magnetic simulation of the filter consumes much

more time and memory space compared to the simu-

lation based on the schematic network. Therefore, the

design based on the extracted circuit models is much

more efficient in the design of this filter.

The designed filter has a similar structure as

the commonly used metal pole coupled rectangular

waveguide filter. Compared with its rectangular

waveguide counterpart, the oversized microstrip line

filter has a larger insertion loss due to the concentra-

tion of current at the edge of the microstrip line and

radiation loss. However, this oversized microstrip fil-

ter is a planar structure, thus the design and fabrica-

tion are much easier and cost-effective. In addition,

interconnects with other planar circuits are just

straightforward. This kind of filter structure can eas-

ily be used for the design of band-pass filter requiring

middle/narrow bandwidth, but it is difficult for

designing a wide band width band-pass filter at low

frequency because thin via-holes are needed to guar-

antee a strong coupling.

IV. CONCLUSION

We have proposed and demonstrated a via-hole

coupled oversized microstrip line filter structure, in

which via-holes together with transmission lines act

as impedance inverters. This structure has a better

insertion loss because the oversized microstrip line

has a higher unloaded Q than its conventional coun-

terpart. Equivalent full-wave-based circuit models of

via-hole with different physical dimensions and dif-

ferent substrates have been extracted and investigated

in detail. On the basis of the extracted circuit model

of via-hole, a 3-pole band-pass filter has been

designed and fabricated. Comparison between simu-

lations and measurements of the designed 3-pole

band-pass filter has validated the proposed concept

and also demonstrated the promising performance of

the proposed structure. The proposed structure can be

used to realize low-cost compact low-loss microwave

filters compatible with any planar circuits. And also,

the via-hole circuit models can be implemented in

other planar microwave circuit design.

ACKNOWLEDGMENTS

The technical assistance of R. Brassard and S. Dube, both

of the Poly-Grames Research Center, Montreal, QC,

Figure 14. Comparison between S-parameters of the via-

hole coupled 3-pole filter obtained from the circuit model

simulations, full-wave simulations, and measurements.

442 Li and Wu


Canada, is gratefully acknowledged by the authors. The

support of the National Science Engineering Research

Council (NSERC) of Canada is also gratefully acknowl-

edged by the authors.

REFERENCES

1. T. Yuasa, T. Nishino, and H. Oh-Hashi, Simple

design formula for parallel plate mode suppression by

ground via-hole, 2004 IEEE MTT-S Int Microwave

Symp Dig 2 (2004), 641–644.

2. F. Xiao, L. Murano, and Y. Kami, The use of via

holes for controlling the crosstalk of nonparallel

microstrip lines on PCBs, 2002 IEEE Int Symp Elec-

tromagn Compat 2 (2002), 633–638.

3. J.C. Chiu, J.M. Lin, M.P. Houng, and Y.H. Wang, A

PCB-compatible 3-dB coupler using microstrip-to-

CPW via-hole transitions, IEEE Microwave Wireless

Compon Lett 16(2006), 369–371.

4. D. Deslandes and K. Wu, Integrated microstrip and

rectangular waveguide in planar form, IEEE Micro-

wave Guided Wave Lett 11 (2001), 68–70.

5. D.G. Swanson Jr., Grounding microstrip lines with

via holes, IEEE Trans Microwave Theory TechMTT-40

8 (1992), 1719–1721.

6. M.E. Goldfarb and R.A. Pucel, Modeling via hole

grounds in microstrip, IEEE Microwave Wireless

Compon Lett 1 (1991), 135–137.

7. G. Mtthaei, L. Young, and E.M.T. Jones, Microwave

filters, impedance-matching networks, and coupling

structures, Artech House, Dedham, MA, 1980, pp. 450–

459.

8. L. Zhu and K. Wu, Unified equivalent-circuit model

of planar discontinuities suitable for field theory-based

CAD and optimization of M(H)MIC’s, IEEE Trans

Microwave Theory Tech 47 (1999), 1589–1602.

9. L. Li, K. Wu, and L. Zhu, Numerical TRL calibration

technique for parameter extraction of planar integrated

discontinuities in a deterministic MoM algorithm, IEEE

MicrowaveWireless Compon Lett 12 (2002), 485–487.

10. L. Zhu and K. Wu, Network equivalence of port dis-

continuity related to source plane in a deterministic 3-

D method of moments, IEEE Microwave Guided

Wave Lett 8 (1998), 130–132.

11. D. M. Pozar, Microwave engineering, 2nd ed., Wiley,

New York, 1998, pp. 306–496.

BIOGRAPHIES

Dr. Lin Li received the B.S. degree in

electrical engineering from Nanjing Uni-

versity of Science and Technology, China,

in 1994, the M.S. degree in microwave

engineering from Nanjing University of

Science and Technology, China, in 1997,

and the Ph.D. degree in microwave engi-

neering from Ecole Polytechnique de

Montreal, Montreal, QC, Canada, in 2005.

As a Post-Doctoral Researcher, he is currently with the Poly-

Grames Research Center, Ecole Polytechnique, Montreal, QC,

Canada. His current research interests include advanced CAD and

modeling techniques and microwave and millimeter-wave circuits

and components.

Dr. Ke Wu received the B.Sc. degree

(with distinction) in radio engineering

from Nanjing Institute of Technology

(now Southeast University), Nanjing,

China in 1982 and the D.E.A. and Ph.D.

degrees in optics, optoelectronics, and

microwave engineering (with distinction)

from the Institut National Polytechnique

de Grenoble (INPG) and the University of

Grenoble, France, in 1984 and 1987, respectively. He is professor

of electrical engineering, and Tier-I Canada Research Chair in RF

and millimeter-wave engineering at the Ecole Polytechnique (Uni-

versity of Montreal). Dr. Wu was a visiting or guest Professor

with many universities and research institutions. He also holds an

honorary visiting professorship and a Cheung Kong endowed

chair professorship (visiting) at the Southeast University, a Sir

Yue-kong Pao chair professorship (visiting) at the Ningbo Univer-

sity, and an honorary professorship at the Nanjing University of

Science and Technology and the City University of Hong Kong,

China. He has been the Director of the Poly-Grames Research

Center. He has authored or co-authored over 570 referred papers,

and also several books/book chapters. His current research inter-

ests involve substrate integrated circuits (SICs), antenna arrays,

advanced CAD and modeling techniques, and development of

low-cost RF and millimeter-wave transceivers. He is also inter-

ested in the modeling and design of microwave photonic circuits

and systems. He serves on the Editorial Board of Microwave

Journal, Microwave and Optical Technology Letters and Wiley’s

Encyclopedia of RF and Microwave Engineering. He is an Asso-

ciate Editor of International Journal of RF and Microwave Com-

puter-Aided Engineering (RFMiCAE).

Dr. Wu is a member of Electromagnetics Academy, the Sigma

Xi Honorary Society, and the URSI. He has held many positions

in and has served on various international committees, including

the vice-chairperson of the Technical Program Committee (TPC)

for the 1997 Asia-Pacific Microwave Conference (APMC), the

General Co-Chair of the 1999 and 2000 SPIE’s International

Symposium on Terahertz and Gigahertz Electronics and Pho-

tonics, the General Chair of 8th International Microwave and Op-

tical Technology (ISMOT’2001), the TPC Chair of the 2003

IEEE Radio and Wireless Conference (RAWCON’2003), the

General Co-Chair of the RAWCON’2004, and the Co-Chair of

the 2005 APMC International Steering Committee, the General

Chair of the 2007 URSI International Symposium on Signals,

Systems and Electronics (ISSSE). He will be the General Chair of



the 2012 IEEE MTT-S International Microwave Symposium

(IMS). He has served on the Editorial or Review Boards of vari-

ous technical journals, including the IEEE Transactions on Micro-

wave Theory and Techniques, the IEEE Transactions on Antennas

and Propagation, and the IEEE Microwave and Wireless Compo-

nents Letters. He served on the 1996 IEEE Admission and

Advancement Committee, the Steering Committee for the 1997

joint IEEE Antennas and Propagation Society (AP-S)/URSI

International Symposium, and the TPC for the IEEE MTT-S

International Microwave Symposium. He was elected into the

Board of Directors of Canadian Institute for Telecommunication

Research (CITR). He is currently the chair of the joint IEEE

chapters of MTTS/APS/LEOS in Montreal. He is an elected

MTT-S AdCom member for 2006-2009 and serves as the Chair

of the IEEE MTT-S Transnational Committee. Dr. Wu has been

providing consulting services to a large number of international

corporations and governmental agencies in the world. He was

the recipient of a URSI Young Scientist Award, Oliver Lodge

Premium Award of the Institute of Electrical Engineer (IEE),

U.K., the Asia-Pacific Microwave Prize, The IEEE CCECE Best

Paper Award, the University Research Award ‘‘Prix Poly 1873

pour l’Excellence en Recherche’’ presented by the Ecole Poly-

technique on the occasion of its 125th anniversary, the Urgel-

Archambault Prize (the highest honor) in the field of physical

sciences, mathematics and engineering from the French-Canadian

Association for the Advancement of Science (ACFAS), and the

2004 Fessenden Medal of the IEEE Canada. In 2002, he was

the first recipient of the IEEE MTT-S Outstanding Young Engi-

neer Award. He is a Fellow of the IEEE, a Fellow of the Cana-

dian Academy of Engineering (CAE) and a Fellow of the Royal

Society of Canada (The Canadian Academy of the Sciences and

Humanities).

444 Li and Wu


via-hole coupled oversized microstrip line and its band-pass filter application

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