Andrew A. ChienVice President of Research

Intel Corporation

UPCRC Overview UPCRC Overview Universal Computing Research Centers

launched at UC Berkeley and UIUCUniversal Computing Research Centers

launched at UC Berkeley and UIUC

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Announcement Key Messages

• Microsoft and Intel are announcing the establishment of two “Universal Parallel Computing Research Centers” with the first locations at the University of Illinois at Urbana-Champaign and the University of California at Berkeley.

• Under this alliance, Microsoft and Intel have committed to invest a combined $20 million in the center over the next five years

• The center will explore the next generation of hardware and software for parallel computing and enable a revolutionary change in the way people use technology.

3

Multi-core is now mainstream

0%

25%

50%

75%

100%

Q3’05 Q4’05 Q1’06 Q2’06 Q3’06 Q4’06

SINGLESINGLE--CORE*CORE*

MULTIMULTI--CORECORE

Market Crossover to multi-core in 2006

Market Crossover Market Crossover to multito multi--core in 2006 core in 2006

Over 6 MUOver 6 MUQuadQuad--core core

In 2007In 2007

Mul

ti-co

re T

op to

Bot

tom

Motivated by a need for better performance/watt

Source: IntelSource: Intel

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More, better More, better transistors transistors

More coresMore cores

Continued Continued benefitsbenefitsfrom Moorefrom Moore’’s Laws Law

Moore’s Law Motivates Multi-CoreMoore’s Law Motivates Multi-Core

45nm45nm

++

20072007

105

103

107

109

Source: IntelSource: Intel

5

A Shift to Many CoresParallelism will enable tera-scale performance for new apps

TerabytesTerabytes

TIPSTIPS

GigabytesGigabytes

MIPSMIPS

MegabytesMegabytes

GIPSGIPS

Perf

orm

ance

Perf

orm

ance

Dataset SizeDataset SizeKilobytesKilobytes

KIPSKIPS

Multi-Media

3D &Video

Text

Models

Rich Visual ComputingRich Visual Computing

HealthHealth

TeraTera--scalescaleMany coresMany cores

MultiMulti--corecore

SingleSingle--corecore

Turing Data into Turing Data into UnderstandingUnderstanding

Printer X42Printer X42

SensingSensing& Perception& Perception

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• P Programming Effort ≤ Sequential Programming Effort• P Programming that doesn’t increase programming complexity

– Productivity, Modularity, Interactions, Performance Tuning, etc.

• P Programming Approaches that have “forward scalability”– Application implementation gets faster (more parallel) on

succeeding generations of hardware platforms– Scale data sets, scale output quality – more parallelism without

reprogramming or retuning

• P Programming implementation techniques that deliver high and robust parallel performance– Enable programming at a high level– Manage workload, algorithm, and data irregularlity– Manage hardware differences and irregularity

• HW Architecture Innovations that Support Parallel Programs

Wanted: Breakthrough Innovations in ParallelismWanted: Breakthrough Innovations in Parallelism

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Intel: Making Parallel Computing Pervasive

EnablingEnablingParallelParallel

ComputingComputing

Academic Research

UPCRCs

SoftwareProducts

Multi-coreEducation

TBB Open SourcedTBB Open SourcedSTMSTM--Enabled Compiler on Enabled Compiler on Whatif.intel.comWhatif.intel.comParallel Benchmarks at Parallel Benchmarks at PrincetonPrinceton’’s PARSEC sites PARSEC site

Joint HW/SW R&D Joint HW/SW R&D program to enable program to enable

Intel products Intel products 33--7+ in future7+ in future

Intel Tera-scaleResearch

Academic research Academic research seeking disruptiveseeking disruptiveinnovations 7innovations 7--10+10+years out years out

Community and Experimental Tools

Wide array of leadingWide array of leadingmultimulti--core SW core SW

development tools & development tools & info available today info available today

MultiMulti--core Education Programcore Education Program-- 400+ Universities 400+ Universities -- 25,000+ students 25,000+ students -- 2008 Goal: Double this2008 Goal: Double this

IntelIntel®® Academic CommunityAcademic CommunityThreading for MultiThreading for Multi--core SW core SW communitycommunityMultiMulti--core bookscore books

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Today: Universal Parallel Computing Research Centers

• Catalyze breakthrough research enabling pervasiveuse of parallel computing

Parallel Programming

Languages, Compilers,Runtime, Tools

Parallel Applications

For desktop, gaming, and mobile systems

Parallel Architecture

Support new generation of programming models

and languages

Parallel Sys. S/W

Performance scaling, memory Utilization, & power consumption

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UPCRC Partners in Research

Professor David PattersonProfessor David PattersonUCB UPCRC DirectorUCB UPCRC Director

Prof. Marc Prof. Marc SnirSnir

Prof. Prof. WenWen--Mei Mei HwuHwu

UIUC UPCRC UIUC UPCRC CoCo--Directors Directors

Intel & Microsoft provide funding and guidanceIntel & Microsoft provide funding and guidance

Universities direct groundbreaking research Universities direct groundbreaking research

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UPCRC Funding Strategy

AcademiaH/W & S/WCompanies

Leadership$$

Guidance

Innovation

Trained ResearchersGovernment

State GovsState Govs

Matching

Fund

Major investment in mainstream parallel programming

Intel + MicrosoftIntel + Microsoft

$20 Million over 5 years$20 Million over 5 years

Matching University InvestmentsMatching University Investments

University of Illinois: $8 mil (committed)University of Illinois: $8 mil (committed)

UC Berkeley: $7 mil (grant application)UC Berkeley: $7 mil (grant application)

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Future of Parallelism ComputingFuture of Parallelism Computing

• For Software and Hardware– Parallelism in all computing systems– Dramatic new capabilities enabled by performance and

performance / unit power– Established and varied software models for portable

parallelism– Architecture support for Parallel Software and other

capabilities

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BACKGROUND

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Single Core Performance is Stagnant Single Core Performance is Stagnant

Time

0.01

1.01

2.01

3.01

4.01

Jan-

85Ja

n -86

Jan-

87Ja

n-88

Jan-

89Ja

n-90

Jan-

91Ja

n -92

Jan-

93Ja

n-94

Jan -

95Ja

n-96

Jan-

97Ja

n-98

Jan-

99Ja

n-00

Jan-

01Ja

n -02

Jan-

03Ja

n -04

Jan-

05Ja

n-06

Jan -

07Ja

n-08

Jan-

09

Freq

uenc

y (G

Hz)

Frequency limited by leakage and power. Transistor counts continue to increase.

Multi-core performance: P ~ Area

Transistor Count (area)P

erf

orm

an

ce

Gap driving us to Multi-core

Single Stream PerformanceP ~ √Area

Source: IntelSource: Intel

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Many-core Research Questions AboundMany-core Research Questions Abound

• Cores– How many? What size?– Homogenous, Heterogeneous– Programmable, Configurable,

Fixed-function

• Chip-level– Interconnect: Topology,

Bandwidth– Coordination– Management

• Memory Hierarchy– # of levels, sharing, inclusion– Bandwidth, novel Technology– Integration/Packaging

• I/O Bandwidth– Silicon-based photonics– Terabit links

Source: CTWatchQuarterly, Feb 2007

Manycore Chips (circa. 2012)?

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VirtualEnvironments

FinancialModeling

Media Search& Manipulation

Web MiningBots’

EducationalSimulation

ModelModel--Based ApplicationsBased Applications

Intel’s Tera-scale Research Vision

High BandwidthI/O & CommunicationsHigh BandwidthI/O & Communications

Stacked, Shared Memory

Stacked, Shared Memory

Scalable Multi-coreArchitectures

Scalable Multi-coreArchitectures

ThreadThread--AwareAwareExecution EnvironmentExecution Environment

Parallel ProgrammingParallel ProgrammingTools & TechniquesTools & Techniques

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