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Charge transport and trap states in lead sulfide quantum dot field-effect transistorsNugraha, Mohamad Insan

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Charge Transport and Trap States in

Lead Sulfide Quantum Dot

Field-Effect Transistors

Mohamad Insan Nugraha

Charge Transport and Trap States in Lead Sulfide

Quantum Dot Field-Effect Transistors


PhD thesis


Zernike Institute PhD thesis series 2017-10

ISSN: 1570-1530

ISBN: 978-90-367-9746-7 (printed version)

ISBN: 978-90-367-9745-0 (electronic version)

The research presented in this thesis was performed in the research group

of Photophysics and Optoelectronics of the Zernike Institute for Advanced

Materials at the University of Groningen, The Netherlands. This work was

financially supported by Ubbo Emmius PhD Scholarship of University of

Groningen.

Cover design by Widianta Gomulya and Anggita Putri Wibowo

Printed by www.ipskampprinting.nl

Charge Transport and Trap States in Lead Sulfide

Quantum Dot Field-Effect Transistors

PhD Thesis

to obtain the degree of PhD at the


on the authority of the

Rector Magnificus Prof. E. Sterken

and in accordance with

the decision by the College of Deans

This thesis will be defended in public on

Friday 16 June 2017 at 11.00 hours

by


born on October 31, 1989

in Tangerang, Indonesië

Supervisors

Prof. M. A. Loi

Prof. J. Takeya

Assessment Committee

Prof. J. Ye

Prof. C. R. Kagan

Prof. M. Law

i

Contents

CHAPTER 1 Introduction ............................................................... 1

1.1 Colloidal Quantum Dots ............................................................................. 2

1.2 Electronic structures of QDs ...................................................................... 3

1.2.1 Quantum confinement .................................................................... 3

1.2.2 Role of capping ligands ................................................................... 6

1.3 Optical properties of PbS QDs .................................................................... 9

1.3.1 Effect of QD size ............................................................................ 10

1.3.2 Effect of inter-QD distance ........................................................... 10

1.4 PbS QD field-effect transistors (FETs) ..................................................... 12

1.4.1 Basic operation of FETs ................................................................ 12

1.4.2 Research progress on PbS QD-FETs. ........................................... 17

1.5 Experimental techniques ......................................................................... 20

1.5.1 Electrical characteristic measurements ....................................... 20

1.5.2 Simulation for analysis of carrier traps ....................................... 20

1.5.3 Optical absorption spectroscopy .................................................. 21

1.6 Outline of the thesis .................................................................................. 22

1.7 References ................................................................................................. 24

CHAPTER 2 Tunable Doping in PbS Quantum Dot Field-Effect

Transistors using Surface Molecular Dipoles .................................. 29

2.1 Introduction .............................................................................................. 30

2.2 Doping mechanism using SAMs .............................................................. 31

2.3 Properties of PbS films on SAM-treated SiO2 .......................................... 32

2.3.1 Morphology of PbS films ............................................................... 32

2.3.2 Electrical properties of PbS QD-FETs .......................................... 33

2.3.3 SAM doping concentration ........................................................... 35

2.3.4 Mobility and density of traps ........................................................ 38

ii

2.4 Conclusion................................................................................................ 39

2.5 Methods ................................................................................................... 39

2.6 References ................................................................................................. 41

CHAPTER 3 Dielectric Surface Passivation and Hydroxyl-free

Polymer Gating in PbS Quantum Dot Field-Effect Transistors ......... 43

3.1 Introduction ............................................................................................. 44

3.2 Properties of PbS FETs with HMDS-treated SiO2.................................... 45

3.2.1 Morphology of PbS films ............................................................... 45

3.2.2 Electrical properties of PbS QD-FETs ......................................... 46

3.3 Cytop Gating in PbS QD-FETs ................................................................. 50

3.4 Distribution of Trap DOS in PbS QD-FETs .............................................. 52

3.5 Conclusion................................................................................................. 55

3.6 Methods .................................................................................................... 55

3.7 References ................................................................................................. 57

CHAPTER 4 Broadening of the Distribution of Trap States in PbS

Quantum Dot Field-Effect Transistors with High-k Dielectrics ........ 59

4.1 Introduction ............................................................................................. 60

4.2 Polarons at the semiconductor/insulator interface ................................ 60

4.3 PbS QD-FETs with polymer insulator gating .......................................... 62

4.3.1 Characteristics of polymer insulators .......................................... 62

4.3.2 Electrical properties of FETs ........................................................ 62

4.4 Electronic structures of traps with high-k ............................................... 64

4.4.1 Density of traps in subthreshold regime ...................................... 64

4.4.2 Distribution of trap DOS ............................................................... 65

4.5 Conclusion................................................................................................ 68

4.6 Methods ................................................................................................... 68

4.7 References ................................................................................................ 70

CHAPTER 5 Enabling Ambipolar to Heavy n-type Transport in PbS

Quantum Dot Solids through Doping with Organic Molecules ......... 71

5.1 Introduction .............................................................................................. 72

iii

5.2 Doping strategy using Benzyl Viologen (BV) ........................................... 73

5.3 Electrical characteristics of BV-doped PbS QD-FETs ............................. 74

5.4 4-terminal conductivity of BV-doped PbS QD-FETs ............................... 79

5.5 Conclusion ............................................................................................... 80

5.6 Methods .................................................................................................... 81

5.7 References ................................................................................................. 83

CHAPTER 6 Strain-Modulated Charge Transport in Flexible PbS

Quantum Dot Field-Effect Transistors ............................................ 85

6.1 Introduction .............................................................................................. 86

6.2 PbS QD-FETs on flexible substrates ........................................................ 87

6.3 Strain effect on flexible PbS QD-FETs ..................................................... 89

6.4 Traps and barrier potential in strained devices ....................................... 94

6.5 Conclusion ................................................................................................ 97

6.6 Methods .................................................................................................... 97

6.7 References ................................................................................................. 99

Summary ...................................................................................... 101

Samenvatting ................................................................................ 105

Acknowledgement ......................................................................... 109

List of Publications ........................................................................ 113

1

Chapter 1

Introduction

This chapter gives an overview of the physical properties (including charge

transport and optical properties) of semiconducting colloidal quantum dots

based on lead sulfide (PbS), and research progresses on the use of these colloidal

quantum dots for the fabrication of field-effect transistors (FETs). Some

potential methods for improving charge carrier mobility in PbS FETs will be

discussed. In the final section, the experimental techniques used and the outline

of this thesis will be provided.

Charge transport and trap states in PbS QD field-effect transistors

2

1.1 Colloidal Quantum Dots

Semiconductor colloidal quantum dots (QDs), often also called nanocrystals

(NCs), are a class of solution processable crystalline materials with size ranging

from 1 to 20 nm.[1] Due to their tiny dimensions, QDs consist of only few hundreds

to thousands atoms. With this finite number of atoms, the properties of QDs

resemble those of atoms showing quantization of their energy levels, for which

reason they are also often called artificial atoms.[2–5] Indeed, when the size of QDs

is smaller than their exciton Bohr radius, strong quantum confinement of charge

carrier wave-function, which leads to size-dependent electronic and optical

properties, is displayed.[6–8] This size-tunable phenomenon due to the quantum

confinement is commonly called as quantum size effect.

Among many types of QDs which have been introduced in the last years, lead

sulfide (PbS) QDs are one of the most interesting particularly because they have

large exciton Bohr radius (~20 nm) and at the same time possess straightforward

and well-established synthetic methods which give rise to high quality

materials.[9–12] As a result of the large exciton Bohr radius, strong quantum

confinement can be effectively achieved to control the band gap of the PbS QDs

from 0.4 to 2 eV by tuning their size from bulk to 2 nm.[13,14] Because of this size-

tunable band gap, PbS QDs have been used as promising semiconducting building

blocks for highly efficient optoelectronic devices such as solar cells,[15–25]

photodetectors,[26–28] and light-emitting devices.[8,29] More recently, the solution

processability of these QDs has also attracted great attention for the fabrication of

field-effect transistors.[30–42]

PbS QDs are synthesized using the so-called hot injection process by rapidly

injecting organometallic precursors into a hot solvent containing organic

surfactants.[10,12] The organic surfactants consist of long-chain hydrocarbon

compounds such as oleic acid,[43,44] n-octadecylphosphonic acid,[35]

trioctylphosphine oxide (TOPO),[45] and hexadecylamine.[46,47] When the

organometallic precursors are rapidly injected into the mixture of the hot solvent

and the organic surfactants, a decrease of temperature initiates the nucleation of

the compounds, which is followed by particle growth after reheating the final

mixture. The long-chain hydrocarbon surfactants, organic ligands, play an

important role in determining the kinetics of nucleation and growth in the

solution.[46] The key synthesis parameters need to be balanced in order to obtain

monodisperse colloidal QDs with controllable size. The monodisperse QDs which

should possess identical shape, structure, size, and surface chemical properties

result in samples with narrow emission bandwidth and high luminescence

efficiencies.[12] The high resolution transmission electron microscopy (HRTEM)

images of monodisperse PbS QDs (with diameter of 3.6 nm) are shown in Figure

1.1 (a) and (b).

Chapter 1

3

(a) (b)

(c)

50 nm

Figure 1.1 High resolution transmission electron microscopy (HRTEM) images of PbS QDs

at (a) low and (b) high magnification. (c) Schematic of PbS QDs with long organic ligands

on their surfaces.

The long ligands are also fundamental as stabilizers for the colloidal

dispersion by capping the QD surfaces, and preventing particle aggregation. The

ligands generally used provide good QD dispersibility in most organic solvents.[46]

These allow QD thin films to be deposited using low cost and low temperature

solution processed methods such as spin-coating,[27] blade-coating,[28] dip-

coating,[40], and roll-to-roll processes.[40] Figure 1.1 (c) presents the schematic of

PbS QDs with long ligands on their surfaces. When PbS colloidal QDs are

assembled onto thin film solids, the ligands behave as tunneling barriers, which

maintain the quantum confinement of the individual QDs.

1.2 Electronic structures of QDs

1.2.1 Quantum confinement

Due to complete quantum confinement of charge carrier wave function, the

electronic structures of QDs have unique characteristics with respect to their

parent bulk materials and other material structures such as quantum wells and

quantum wires. In bulk materials, charge carriers are fully delocalized. The


4

carriers move through the energy bands formed due to the overlap of wave

functions between neighboring atoms. According to the nearly-free electron

model, charge carriers in bulk materials have almost continuous energy spectrum

(E) (vide infra) and the density of states in this system is proportional to E1/2.[48]

By reducing the material dimension, the bulk materials turn to quantum wells

(two-dimensional structure – confined in 1 direction) and quantum wire

structures (one-dimensional structure – confined in 2 directions), or to a

quantum dot (zero-dimensional structure – confined in 3 directions) as

demonstrated in Figure 1.2. As a consequence of the quantum confinement, the

density of states in quantum wells and quantum wires displays unique profiles

showing increment of the density of electronic states only at certain energy.[49]

Bulk Quantum Wells Quantum Wires Quantum Dots

DB

(E)

EnergyEG

D0D

(E)

EnergyEG

D2

D(E

)

EnergyEG

D1

D(E

)

EnergyEG

Figure 1.2 Quantum confinement and density of states in materials with different

dimensionality.

In QDs, charge carriers are confined in all directions of the materials as

demonstrated in Figure 1.2. With the quantum confinement, the density of states

in QDs appears as the delta Dirac function, which again displays the

characteristics of energy quantization. As mentioned, the quantum confinement

in QDs becomes active when the size or radius of the particles is smaller than the

exciton Bohr radius (RB),[50]

2

2

eRB

(1.1)

where ε, ħ, μ, and e are dielectric constant, reduced Planck constant, reduced mass

of holes and electrons, and elementary charge constant, respectively. In PbS, the

exciton Bohr radius can be as large as 20 nm which effectively allows strong

quantum confinement even in relatively large sized particles with respect to other

materials such as CdSe (RB=5.6 nm),[51] CdS (RB=2.8 nm),[52,53] and ZnO (RB=2.87

nm).[54]

Chapter 1

5

Ee1

Ee2

Ee3

Eh1

Eh2

Eh3

Ee1

Ee2

Eh1

Eh2

L1 L2

Figure 1.3 Quantum confinement and size effect in QDs. The dash lines show discrete

energy levels in QDs. The band gap (red lines) increases with decreasing the QD size.

Many studies have been performed to understand the electronic structures

of QDs.[55,56] A simple approach to study their electronic structures is based on the

strongly confined particle model in a square potential well as demonstrated in

Figure 1.3. The potential barrier is produced by the surface of QDs and the ligands

on the QD surface. By applying the Schrodinger equation, the energy levels (En)

of carriers in QDs are quantized as:

2

2

2

2

2

2

*

22

2 z

z

y

y

x

xn

L

n

L

n

L

n

mE

(1.2)

where m* is the effective mass of holes and electrons in QDs. Lx, Ly, and Lz are the

size of QDs in x, y, and z direction respectively. The three integer quantum

numbers (nx, ny, and nz) indicate the quantization of energy in the directions. The

first transition energy, thus the band gap, can be estimated from the difference of

the ground state energy of electrons and holes (EG=Ee1-Eh1) as demonstrated in

Figure 1.3. This ground state energy is inversely proportional to the QD size as

stated in equation (1.2). As a consequence, the band gap (EG) of QDs increases

with decreasing the particle size. The size-tunable band gap of QDs is shown in

Figure 1.3.

Another approximation for the electronic structures of QDs is using a

spherical potential model.[49,56] By solving the Schrodinger equation in spherical

coordinates, the energy levels of charge carriers in QDs with radius R can be

written as:[49]

2

,2*

22

,2

lnlnRm

E

(1.3)

where χn,l is the nth zero of the lth-order spherical Bessel function. The schematic

of energy levels in spherical QDs is shown in Figure 1.4.


6

Figure 1.4 Energy levels of spherical QDs with radius R.

A more comprehensive analysis involving the effective mass model shows

that the energy of the first excited electronic states (band gap energy) in QDs with

radius R can be stated as,[57,58]

R

e

mmREE

ohe

bulkGG

4

8.111

2

2

**2

22

(1.4)

where EGbulk and εo are the bulk band gap energy and vacuum permittivity

constant, respectively. The third term in equation (1.4) corresponds to the

Coulomb interaction between holes and electrons in the QDs. In line with the

square-shaped QDs, the band gap energy of spherical QDs increases with

decreasing the radius of the QDs.

1.2.2 Role of capping ligands

The ligands have the double role of stabilizing the QD colloidal solution and

to guarantee the quantum confinement over long time. For this reason they are

chosen to be well insulating. This also means that when the QDs are organized in

a film, the ligands suppress charge transport within the QD film. To improve the

film conductivity, the long ligands need to be exchanged with shorter ones. This

ligand exchange can be done either in solution or in solid state.[59–61] Several short

ligands have been shown to enable charge transport while still maintaining

quantum confinement within the QD solids.[62,63] As this statement can appear

peculiar, it needs to be clarified in the sense that the short ligands allow carriers

to tunnel between QDs while the QD films still show quantum confinement in

terms of their band gap and optical properties.

The short ligands can be organic (e.g. 3-mercaptopropionic acids/3MPA,[64]

benzenethiols/BT,[65] benzene-dithiols/BDT,[66] 1,2-ethanedithiols/EDT,[67] 1,2-

ethylenediamine/EDA,[68] thiocyanates/SCN-,[33] etc) or inorganic molecules or

single atoms (e.q. metal chalcogenides,[46,47] halometallates,[62] halide anions,[60]

etc). The chemical structures of some of the most common ligands are shown in

Figure 1.5 (a). As a result of the ligand exchange, the exchange coupling energy

Chapter 1

7

(β), related to the tunneling rate of charge carriers between QDs, increases. The

exchange coupling energy can be written as:[1]

dEm b

21

2*22exp (1.5)

where Eb and d are the potential barrier height and the inter-QD distance,

respectively. From equation (1.5), it is obvious that the tunneling rate of charge

carriers increases with decreasing the inter-QD distance. In agreement with

equation (1.5), Law et al. reported that the charge carrier mobility in lead

chalcogenide QD systems increases exponentially with decreasing ligand length,

thus the inter-QD distance.[7]

(a)

(b)

3MPA

SHHO

O

BT

SH

BDT

SHHS

1,2-EDT

SHHS

NH2H2N

EDA

NH4+ SCN-

Ammonium Thiocyatanate

N(Bu)4+ F- Cl- Br- I-

Tetrabuthylammonium Halides

6.0

5.5

5.0

4.5

4.0

3.5

TB

AB

r

TB

AI

TB

AC

l

NH

4S

CN

1,4

-BD

T

1,3

-BD

T

TB

AF

ED

T

MP

A

ED

A

BT

1,2

-BD

T

En

erg

y (

eV

)

Figure 1.5 (a) Chemical structures of ligands and (b) energy levels of PbS QDs with different

ligands. The black and red lines correspond to the valence bands and Fermi levels of the

materials, respectively. The green and blue lines are the optical and transport conduction

bands of the materials, respectively. Tetrabuthylammonium halide ligands (TBAX, X=Br,

I, Cl) produce deeper conduction bands than those with thiol-based ligands. The data of

the energy levels are extracted from literature.[69]


8

The short capping ligands on the QD surfaces also modify the electronic

structures of PbS QDs. As referred to Figure 1.5 (a), the short ligands may change

dielectric environment between neighboring QDs. The ligands with their different

dipole moments can influence the energy alignment inside QDs. As a result, the

electronic structures of QDs including the vacuum energy, Fermi level, valence

band, and conduction band can be affected. Brown et al. reported energy level

modification in PbS QD films using various ligands.[69] The same authors reported

a comprehensive energy level schematic of PbS QD films with different capping

ligands that is reproduced in Figure 1.5 (b). Although capped with similar

bidentate thiols (BT and 1,4-BDT), a significant shift of the conduction and

valence bands up to 0.7 eV is observed. With halide-based ligands, the conduction

bands of the PbS QD films can be as deep as -4.5 eV (TBABr). With these

significant shifts, the use of particular capping ligands can determine the

performance of electronic devices based on PbS QDs by controlling the charge

extraction between injection/extraction contacts and the semiconducting films.

(a) (b)

Ligand Exchange

X

X

Halide-filled

PbS QDs

Halide ligands

3MPA

Figure 1.6 (a) Schematic of ligand exchange. Due to incomplete ligand exchange reaction,

some dangling bonds on the QD surfaces are formed. (b) Schematic of PbS QDs passivated

with organic ligands (3MPA) and hybrid organic/inorganic (3MPA/halide) ligands. Due to

their large size, some 3MPA molecules are not able to penetrate into some inter-cation

trenches. The schematic is adapted from reference.[16]

The high surface area to volume ratio of QDs, typical of nano-objects, makes

them more prone to develop a high number of traps on the QD surfaces. These

carrier traps are extremely important as they limit the performance of the

Chapter 1

9

electronic devices based on QDs. The carrier traps may originate from structural

aperiodicity and off-stoichiometry composition of the QDs.[70] The ligands take

also an important role in providing surface passivation against carrier traps.

Nevertheless, after the exchange of the long ligands to shorter ones, some surface

dangling bonds may also be formed because of an incomplete ligand exchange

reaction. These dangling bonds can indeed act as additional carrier traps on the

QD surfaces as schematically shown in Figure 1.6 (a). Ip et al., found that steric

interactions prevent some short organic ligands such as 3MPA from penetrating

the inter-cation trenches on the QD surfaces as displayed in Figure 1.6 (b).[16] As

a result, some un-passivated QD surfaces remain which act as additional traps.

In comparison to organic ligands such as 3MPA and other thiol-based

ligands, halide ligands have been reported to provide an effective passivation

against carrier traps that results in high performance FETs and highly efficient

solar cells based on PbS colloidal QDs.[15,63] However, recently Balazs et al., have

also underlined the importance of counterions (ammonium, methylammonium,

tetrabuthylammonium in iodide salts) in the ligand-exchange mechanism.[63]

Since they have specific reactivity and acidity, the types of counterions can

determine the effectiveness of the ligand exchange reaction, thus the removal of

native long organic ligands. With the treatment of the first two ligands, efficient

charge transport in the PbS films is revealed, as indicated from the high film

conductivity. Particularly, the films treated with methylammonium iodide enable

good performing transistors with electron mobility of 0.05 cm2V-1s-1 and on/off

ratio of 106. Meanwhile, among those ligands, the films treated with

tetrabuthylammonium iodide show poor conductivity. The lower reactivity of

tetrabuthylammonium iodide than that of others results in incomplete removal of

the native long insulating ligands on the QD surfaces, suppressing the charge

transport between neighboring particles.

1.3 Optical properties of PbS QDs

Similar to their unique electronic structures, the optical properties of QDs

are also size-dependent as a result of the quantum confinement effect. In addition,

when colloidal QDs are assembled onto thin film solids, the distance between QDs

determines the electronic coupling between neighboring QDs. The change of the

electronic coupling between QDs also influences their optical properties. In this

section, the effect of QD size and inter-QD distance on the optical properties of

PbS QDs is reviewed.


10

1.3.1 Effect of QD size

QDs are characterized by strong excitonic interactions that are displayed

from the strong (excitonic) peak in the lower energy region of the absorbtion

spectrum. Figure 1.7 shows the absorbance spectrum of PbS QDs with different

sizes. It is obvious that the excitonic peaks are red-shifted with increasing the QD

size, also indicating the decrease of the band gap. In 3.7 nm PbS QDs, the excitonic

wavelength is about 1100 nm, which corresponds to the band gap of 1.13 eV. This

band gap as explained earlier is larger than that of bulk PbS (EG=0.41 eV). By

increasing the QD size to 6.5 nm, the excitonic wavelength shifts to 1660 nm.

Meanwhile, when the QD size is reduced to 2 nm, a blue-shifted excitonic

wavelength results in the band gap of 2 eV.[14] With the size-tunable optimal band

gap properties, PbS QDs allow optimal utilization of the solar spectrum

particularly in the near-infrared region which is beneficial to realize highly

efficient solar cells.

Figure 1.7 Absorbance spectrum of PbS QDs of different sizes. The spectrum are modified

from reference.[14]

1.3.2 Effect of inter-QD distance

In QD films, the inter-QD distance determines the electronic coupling

between QDs. When they are at a large distance, the electronic coupling between

QDs is very small and charge transport does not occur. In this regime, the QD

arrays have approximately identical electronic and optical properties as individual

QDs. As the inter-QD distance is reduced, the electronic coupling between QDs

becomes important. Consequently, the carrier wave function can extend over the

films, which influences the electronic structures and the optical properties of the

QD films. Several groups have reported that the excitonic peaks of CdSe and InP

QD films in the absorbance spectrum shift to the red by reducing the inter-QD

distance.[71,72] Similarly, a red-shifted profile of the absorbance spectrum of PbS

1000 1200 1400 1600 1800

3.7 nm

4.3 nm

5.4 nm

6.5 nm

PbS QDs

Abso

rba

nce

(a.u

)

Wavelength (nm)

Chapter 1

11

films is also observed by reducing the inter-QD distance from the use of long oleic-

acid (OA) and short EDT ligands as presented in Figure 1.8.

Figure 1.8 Absorbance spectra of PbS QD films with OA and EDT ligands.

The decrease of the inter-QD distance can also be achieved by annealing the

QD films at higher temperature. However, the high annealing temperature may

result in sintering of the QDs leading to the vanishing of quantum confinement

within the QD films. Sintering the QD films is undesirable particularly for

photovoltaics, where the loss of quantum confinement results in lower open

circuit voltage and consequent reduction of the device performance.[73] Recently,

the use of different types of atomic ligands puts also in evidence for the formation

of necking, which is shown by the continuity of the PbS crystal lattice along a

particular facet.[63] In PbS QDs, three main facets define their crystal structure,

namely {100}, {110}, and {111}. The last two facets have more acidity than the

{100} facets, and at the same time have higher surface energy than un-passivated

{100} facets, which promote the removal of anionic ligand species from the {100}

facets.[63] This anionic ligand species removal is then followed by the diffusion of

Pb and S atoms along {100} facets, indicating the formation of necking along this

direction. Consequently, the PbS films show reduced band gap and weaker

excitonic signatures.

Recently, the application of external mechanical pressure has also been

reported to influence the inter-QD distance.[13,74] The effect of pressure on the

inter-QD distance is demonstrated by the red-shifted excitonic peaks in the

absorbance spectrum of the PbS films with increasing the pressure. The red-

shifted profiles indicate the decrease of the inter-QD distance, which is attributed

to the bending of the capping ligands on the QD surfaces. As the transport of

EDT

OA ligands

600 800 1000 1200 1400

Absorb

ance (

a.u

)

Wavelength (nm)

OA ligands


12

charge carriers within the QD films is strongly influenced by the inter-QD distance,

this effect can also be used to tune the charge transport properties in the QD films.

1.4 PbS QD field-effect transistors (FETs)

Understanding charge transport in PbS QD solids has recently become an

important research interest in the QD community. One of effective tools for this

investigation is the fabrication of field-effect transistors (FETs).[75–78] The

fabrication and characterization of FETs are one of the most straightforward

methods to obtain information on charge carrier mobility and to study transport

mechanisms in semiconductors. This section is devoted to provide an overview

about the basic operational principles of FETs as well as some research progress

related to the methods to improve charge transport in PbS QD-FETs.

1.4.1 Basic operation of FETs

In their structure, FETs use three materials including metal, insulator, and

semiconductor as main components. Figure 1.9 (a) shows the schematic of an FET

with channel length L and width W. FETs have 3-terminal configuration namely

gate, source, and drain electrodes. In general, the source electrode is connected to

the ground whereas the gate and drain electrodes are connected to a voltage

source. In FETs, the semiconductor and the gate electrode are separated by a thin

layer of insulator. By applying a voltage to the gate electrode, charge carriers are

accumulated at the semiconductor/insulator interface. These accumulated charge

carriers form a conducting path where charge carriers can flow from the injecting

electrode (source) to the collecting electrode (drain). The minimum gate voltage

(Vg) that is required to form the conducting channel is defined as threshold

voltage (Vth).

Depending on the semiconductor, FETs can show n- or p-type or ambipolar

properties. In n-type FETs, when a positive gate voltage is applied, the Fermi level

of the gate electrode is shifted down resulting in downward bending of the

conduction band (CB) and valence band (VB) of the semiconductor. Consequently,

electrons are accumulated at the semiconductor/insulator interface. Meanwhile,

in p-type FETs, when a negative gate voltage is applied, the Fermi level of the gate

electrode is shifted up. This condition results in upward bending of the CB and VB

leading to hole accumulation at the semiconductor/insulator interface. In

ambipolar FETs, both electrons and holes are accumulated at the

semiconductor/insulator interface depending on the polarity of the gate voltage.

Figure 1.9 (b)-(d) show the schematics of energy diagram in FETs with several

gate bias conditions.

Chapter 1

13

Gate

Insu

lato

r

Semiconductor

CB

VB

EFEF

- -- -- -

Gate

Insu

lato

r

Semiconductor

CB

VB

EFEF

Vg>0 Vg<0

+ ++ +

+ +

Insu

lato

rGate Semiconductor

CB

VB

EF

EF

(a) (b)

(c) (d)

GateInsulator

Semiconductor

Source Drain

LW

Figure 1.9 (a) Schematic of an FET device. Energy band diagram in an FET with (b) zero,

(c) positive, and (d) negative gate voltages.

The electrical behavior of an FET is determined by measuring two types of I-

V characteristics, namely the output and transfer characteristics. The output

characteristics of FETs are obtained by measuring the source-drain current (Ids)

as a function of source-drain voltage (Vds) at fixed Vg. The transfer characteristics

are obtained by measuring the source-drain current (Ids) while sweeping the Vg at

a fixed Vds. The transfer characteristics demonstrate the effectiveness of the gate

voltage in modulating the electrical current in the devices and in switching the

devices from the off to the on-state. When a Vds << (Vg – Vth) is applied on the

FETs, as mentioned already charge carriers are accumulated forming a

conducting path with homogeneous carrier density as demonstrated in Figure 1.10

(a). The conducting path forms a channel connecting source and drain which

allows the flow of electrical current. In this condition, the FETs behave like a

resistor where the current increases linearly with increasing Vds, which is referred

to as the linear regime. The source-drain current in the linear regime is written as,

2

2

dsdsthg

ids

VVVV

L

WCI

(1.6)

where μ and Ci are the charge carrier mobility in the devices and the capacitance

of the gate insulator. It is important to note that the above equation assumes the


14

absence of contact resistances at the source and drain contacts, thus an Ohmic

contact. In the presence of a Schottky barrier between the source/drain work

function and CB/VB of the semiconductor, FETs show S-shaped output

characteristics in the linear regime at low VDS.

Gate

S D- - - - - - - - -Ids

Vds

Gate

S D- - - - - - -Ids

Vds

Gate

S D- - - -Vd,sat

Ids

VdsVd,sat

(a)

(b)

(c)

Figure 1.10 Schematic view of the basic working principles of FETs in (a) the linear, (b)

parabolic, and (c) saturation regime, with corresponding Ids-Vds output characteristics.

As the Vds increases, the voltage drop across the insulator near the drain

decreases resulting in non-uniformity of the density of accumulated carriers as

displayed in Figure 1.10 (b). As a consequence, the channel resistance of the

devices increases, leading to a decrease of the slope of the output characteristics.

At this point, the transistors operate in the parabolic regime. In this regime, Ids

will depend on the other parameters as expressed in equation (1.6). In the linear

regime, the second term in the equation (1.6) is much smaller than the first part

allowing neglecting the quadratic term, which preserves the linearity of the output

characteristics. However, as the Vds increases, the second part of the equation will

become important, resulting in the parabolic shape of the output characteristics.

When the Vds is further increased (Vds >> (Vg-Vth)), the accumulated charge

carriers move toward the source electrode. At a given Vds, the so-called Vd,sat, is

reached, then the density of the accumulated carriers is zero at the drain electrode.

In this condition, the charge carriers travel through the channel toward the drain

electrode. At the point where the carrier density goes to zero, so-called pinch-off

Chapter 1

15

point demonstrated as Vd,sat in Figure 1.10 (c), the charge carriers are swept by the

electric field between the pinch-off point and the drain electrode, and flowing

through the space-charge region. In the ideal condition, the increase of the

conductance is zero, thus the source-drain current is constant, since the electric

current is only governed by the carrier diffusion through the space-charge region

(between pinch-off point and the drain electrode). This condition is called

saturation regime since the source-drain current saturates (constant) even though

the Vds increases as demonstrated in Figure 1.10 (c). In the saturation regime, the

source-drain current can be expressed with the equation:

2

2thg

ids VV

L

WCI

(1.7)

Ids

VgVth

Slope=Ids/ Vg

Vds=constant

Von

Ids

Vg

Subthreshold region

(a) (b)

off

on

Figure 1.11 The Ids-Vg transfer characteristics of FETs in (a) the linear and (b) semi-

logarithmic scale.

The transfer characteristics are obtained by measuring the Ids and sweeping

Vg at a given Vds. As previously mentioned, when a Vg is applied, the charge

carriers are accumulated at the semiconductor/insulator interfaces forming a

conducting path (channel) between the source and drain electrodes. When the Vg

is lower than the threshold voltage (Vth), no current flows through the channel. As

the Vg gradually increases beyond the Vth, the density of the accumulated charge

carriers increases which results in the decrease of the channel resistance.

Consequently, the Ids increases with increasing the Vg. In the ideal condition, no

current flows to the gate because the gate electrode is separated by an insulating

layer. The typical Ids-Vg transfer characteristics of FETs in the linear scale are

shown in Figure 1.11 (a). By measuring the transfer characteristics, the charge

carrier mobility in the linear regime (μlin) can be derived as,

g

ds

dsi

linV

I

VWC

L

(1.8)


16

where Ids/Vg is the transconductance that can be calculated from the slope of

the transfer characteristics of the devices. The mobility in the saturation regime

(μsat) is derived from equation (1.7) and stated as,

22/1

2

g

ds

i

satV

I

WC

L (1.9)

where Ids1/2/Vg is calculated from the slope of the square root of Ids versus Vg

characteristics.

At this point, it is important to consider the Ids-Vg transfer characteristics in

the semi-logarithmic scale as displayed in Figure 1.11 (b). The Vg where the current

starts increasing exponentially is defined as on-voltage (Von). The Von also

provides information on the doping level in FETs. Moreover, Figure 1.11 (b) also

shows the off- and on-state of the devices. The ratio of on-current and off-current

is defined as the on/off ratio, which indicates the ability of the devices to be

switched from the off- to on-state. Good performing FET devices are expected to

have high on-off ratio, the precise figure of merit will mostly depend on the

application. The semi-logarithmic profile of the transfer curve also reveals another

important regime in the FET devices.[79] The so-called subthreshold regime,

displayed in Figure 1.11 (b), occurs when the applied gate voltage is below the

threshold voltage of the devices. In this regime, the current is mainly governed by

the diffusion process, which is independent of the drain voltage (Vds<<kBT/q). The

diffusion current is a consequence of the large gradient of the charge carrier

concentration between the source and drain contact regions, and is thus

dependent on the gate voltage,

Tkn

eVI

B

g

ds *exp (1.10)

where e, kB, and T are charge constant, Boltzmann constant, and temperature,

respectively. The ideality parameter (n*) corresponds to the density of carrier

traps in the devices, which originates from the semiconductor/insulator interface

and the bulk of semiconductor.[79] The subthreshold swing (SS) and the ideality

parameter are defined as,

*10n

e

nTkSS B

(1.11)

i

sc

C

Cn 1* (1.12)

where Csc is the capacitance of semiconductor. The Csc is related to the density of

traps in the devices which influences the transfer characteristics of the devices in

the subthreshold regime, where

Chapter 1

17

trapsBulkscsc NeNeC 2 (1.13)

The parameter NBulk is the density of bulk traps per volume and energy,

whereas Ntraps corresponds to the density of interface traps per area and energy

and ϵsc is the permittivity of the semiconductor. From equation (1.13), the

maximum density of interface traps can be estimated as,

2

110ln e

C

Tk

eSSN i

B

traps

(1.14)

From the transfer characteristics of the FET devices, the subthreshold swing SS is

calculated from:

1

log

g

ds

V

ISS (1.15)

It is obvious from equation (1.14) and (1.15) that a low SS corresponds to a low

Ntraps which corresponds to a steeper profile of the semi-log transfer

characteristics in the subthreshold region. Conversely, a high SS indicates a high

Ntraps which is reflected in a shallower profile of the semi-log transfer

characteristics in the subthreshold region.

1.4.2 Research progress on PbS QD-FETs

Recently, PbS QDs have shown their potential as semiconducting active

materials for FETs.[30–42] FETs are one of the main components in several

advanced electronic devices such as complementary metal oxide semiconductor

(CMOS)-like integrated circuits,[80–83] current regulators for displays[84–86] and

themselves can be light-emitting transistors (LETs).[29,87] However, the use of PbS

QDs in FETs is still challenging because they still suffer from low carrier mobility.

The low carrier mobility is one of the main obstacles in understanding the charge

transport within QD films and further utilizing PbS QDs for diverse applications.

Therefore, improving carrier mobility in PbS QD-FETs is an important and a

necessary task to understand the properties of QD films.

The origin of low carrier mobility in the devices is mostly attributed to the

high number of charge carrier traps on the QD surfaces, formed during ligand

exchange.[16,88] Since the charge transport in FETs takes place very close to the

semiconductor/insulator interface, the interface traps on the insulator surfaces

may also determine the characteristics and the performance of the devices.[89]

These interface traps further reduce the carrier mobility in the devices.

Depending on the processing conditions, the stoichiometry of QDs, and

ligands, PbS QD-FETs can display n-type, p-type, or ambipolar properties.[1,34]

The deposition of PbS QD films is commonly performed using a layer-by-layer


18

(LbL) method.[31] The exchange of the long ligands into the shorter ones is done

after the deposition of each oleic-acid capped film. The LbL film deposition and

ligand exchange ensure complete removal of the native oleic-acid ligands. In

addition, the LbL method also allows the deposition of the next PbS layer to fill

the cracks on the films that are often produced after the ligand exchange process,

which result in an overall shrinking of the films. Our group previously reported

the increase of the carrier mobility with increasing the number of PbS layers, thus

the film thickness.[31] The increase of the carrier mobility starts to saturate after

reaching certain film thickness indicating that a crack-free film has been obtained.

So far, charge transport improvement in PbS QD-FETs has been obtained

through the use of different capping ligands.[63] In fact, the nature of the capping

ligands on the QD surfaces strongly determines the transport characteristics of

the PbS QD-FETs.[69] Ambipolar properties can be obtained using short organic

ligands such as 3MPA, BDT, and EDT.[31] By crosslinking PbS QDs with 3MPA,

our group reported electron mobility as high as 0.03 cm2V-1s-1.[64] Meanwhile, the

hole mobility (5 x 10-5 cm2V-1s-1) is much lower than the electron mobility, as has

also been observed in the QD films treated with other organic ligands (EDT and

BDT).[31,64] In addition, a high on-off ratio of 105 is achieved in devices employing

SiO2 gate dielectric.[64]

Further efforts in improving charge transport in PbS QD-FETs were done by

using inorganic atomic ligands.[63] These ligands have been reported to provide a

more complete passivation against carrier traps on the QD surfaces than that with

organic ligands.[16,63] In addition, the films capped with inorganic ligands have

shorter inter-particle distance than those capped with organic ligands, resulting

in a strong increase of the film conductivity.[46,90] Despite intensive works using

inorganic ligands, the mobility in the devices (with SiO2 gate dielectric) is,

however, still limited to 0.07 cm2V-1s-1.[63] The limited charge transport is

attributed to the high number of traps at the semiconductor/insulator interfaces

as mentioned earlier. Passivation of the SiO2 dangling bonds is one of important

strategies that can be adopted to suppress the interface traps. To date, introducing

self-assembled monolayers (SAMs) on the SiO2 surface is one of the most effective

methods to passivate the dangling bonds.[91–93] In addition, the SAMs also

introduce molecular dipoles on the SiO2 surface which affect the device

properties.[91,92] However, the study of the use of SAMs in FETs has so far been

limited to organic semiconductor active layers.[91–94] This opens a question if PbS

QD-FETs would also benefit of the passivation of the SiO2 surface and the

introduction of molecular dipoles through the use of SAMs.

Another way to minimize the interface traps in the devices is by gating the

devices with hydroxyl-free insulators. Koh et al. reported symmetric ambipolar

transport in PbS QD-FETs with electron and hole mobility of 0.1 cm2V-1s-1 using

thiocyanate (SCN-) ligands employing parylene gate insulator.[33] Meanwhile,

Chapter 1

19

with high-k dielectrics (Al2O3), Jo et al. reported a significant improvement in the

electron mobility to 0.47 cm2V-1s-1.[73] Further improvement of the electron

mobility in PbS QD-FETs to 2 cm2V-1s-1 was achieved by gating the devices with a

new class of gate dielectric, namely ion gel.[31] The ion gel can accumulate high

carrier density due to its high capacitance (1-20 μF/cm2). The high carrier density

effectively fills the traps resulting in an increase of the film conductivity and the

charge carrier mobility. The above mentioned research progresses clearly show

that the properties of gate insulators strongly determine the charge transport in

PbS QD-FETs. As there are still many promising hydroxyl-free insulators,

investigation on the use of broad types of the insulators as gate dielectrics in PbS

QD-FETs still needs to be addressed. Furthermore, a comprehensive study on the

electronic structures of the carrier traps in PbS QD-FETs employing different gate

insulators is also important to provide understanding of the charge transport in

the QD films and to potentially improve the performance of devices.

Together with the use of hydroxyl-free insulators, doping of semiconductors

is one of other effective methods to improve charge transport in FETs.[95–97]

Stoichiometrically, the surfaces of PbS QDs are rich in Pb, which leads to the n-

type properties of the material.[34] Kagan et al reported n-type FET devices with

the excess of Pb atoms on the QD surfaces.[34,35] Despite these dominant n-type

properties, most literature instead reports strategies to turn them into p-type. The

p-type doping of PbS QDs can be achieved by exposing the PbS films to air.[64] As

mentioned earlier, the 3MPA-crosslinked devices show ambipolar properties with

electron-dominated characteristics. As the devices are exposed to air, the devices

display the quenching of the electron transport. Meanwhile, in the p-channel, an

increase of the hole current by one order of magnitude and a significant threshold

voltage shift towards positive value, indicating strong p-type doping, are displayed.

The strong p-type transport of the air-exposed PbS QD-FETs is also observed in

the films crosslinked with EDT ligands.[98] In line with the 3MPA-crosslinked

films, the air exposure of the films with EDT ligands results in the increase of the

film conductivity and hole density supporting the strong p-type doping. While the

p-type doping is researched intensively mainly because of interest for the

fabrication of efficient solar cells,[15,99] studies on n-type doping of PbS QDs are

still limited. Koh et al reported the n-type doping of PbS QDs using cobaltocene

(CoCp2) molecules.[32] Although they successfully investigated the doping effect

via optical absorption spectroscopy, the doped-QDs show a decrease of

conductivity as measured in FETs indicating inefficient electron doping. To

enable an efficient n-type doping of the semiconductors, the highest occupied

molecular orbital (HOMO) level of dopant should be shallower than the

conduction band (CB) of the semiconductors. Finding dopant molecules with

shallow HOMO level is, however, a challenging work. Recently, benzyl viologen

(BV) has been reported as promising strong n-type dopant with shallow HOMO


20

level.[100,101] The BV molecules have also demonstrated efficient electron doping in

carbon nanotube and MoS2 systems.[100,101] As the conduction band of PbS QDs

can be tuned from shallow to deep level by using various capping ligands, doping

of the QD films with BV donor molecules is also promising in improving charge

transport in PbS QD-FETs.

1.5 Experimental techniques

In this section, some experimental techniques related to the electrical and

optical measurements, which are used in this thesis are presented.

1.5.1 Electrical characteristic measurements

The FET electrical characteristic measurements were performed using a

probe station inside an N2-filled glovebox at room temperature. The probe station

is connected to an Agilent B1500A semiconductor parameter analyzer. The Ids-Vg

transfer characteristics were measured by sweeping the gate voltage with some

given values of source-drain voltage. Meanwhile, the Ids-Vds output characteristics

were obtained by varying source-drain voltage with some fixed gate voltages. The

detailed values of the applied source-drain voltage and gate voltage are provided

in the corresponding chapters.

1.5.2 Simulation for analysis of carrier traps

In principle, the trap density of states (trap DOS) in FETs can be estimated

from equation (1.14). The equation (1.14), however, can quantify the trap DOS at

a certain energy level in the subthreshold regime only. Meanwhile, study on the

trap DOS in a broad energy range is important to understand charge transport in

the FET devices.

In this thesis, we use a computer simulation to determine the trap DOS in

PbS QD-FETs. The simulation quantifies the total density of trap states, which

consists of the density of bulk and interface trap states. In PbS QD-FETs, bulk

traps originate from the active materials whereas the interface traps come from

the gate dielectric surface. Therefore, the presence of the interface traps

determines the calculated total density of trap states in the devices. The computer

simulation is based on a numerical model developed by Oberhoff et al.[102] The

model uses the effective medium approach where it is assumed that the material

between the source and the drain electrodes is homogeneous. Therefore, the trap

states in the material are assumed to be homogeneously distributed over the

whole channel region. The computer simulation works by solving drift-diffusion

current (J) and Poisson equation,

Chapter 1

21

xe

TkEeJ B (1.16)

so

e

x

V

2

2

(1.17)

where E, ρ, T, and εs are electric field, carrier density, temperature, and

semiconductor permittivity, respectively. In the effective medium, the drift-

diffusion equation is solved self-consistently under the given boundary conditions

(Vds, Vg, channel length L, channel width W, etc). The input parameters are all

macroscopically measurable except the number of trap states in the band gap. The

trap DOS is determined by fitting the simulated curves to the measured ones. As

the only free input parameter is the density of states, the spectral distribution of

trap states can be unambiguously determined.

For every step in the simulation, the number of total charge carriers is

calculated, which directly determines the position of the Fermi level. Depending

on the energy, charge carriers are separated into free charge carriers, residing in

the transport level, and trapped charge carriers, energetically positioned in the

band gap. The energy, which divides these two states is the mobility edge. When

the gate voltage increases, the number of charge carriers is increased and

therefore also the Fermi level shifts closer to the respective transport level. This

changes not only the total number of charge carriers, but also the ratio of free vs.

trapped charges and thus the electric current. This enables us to determine the

trap DOS directly from the measured transfer curves.

1.5.3 Optical absorption spectroscopy

Optical absorption spectroscopy is a technique that characterizes the

absorption of electromagnetic radiation as a function of the wavelength. In this

thesis, optical absorption measurements are used to characterize the excitonic

wavelength and therefore the dimension of QDs and their level of quantum

confinement. When a photon is absorbed by QDs, an electron is excited to a higher

energy level. As mentioned in the previous section, charge carriers in QDs can

only occupy certain discrete energy levels. Therefore, QDs only absorb photons

with certain wavelengths. In PbS QDs, the measured excitonic peak in the

absorbance spectra corresponds to the absorbed photon energy to excite an

electron from Eh1 to Ee1, thus close to the band gap energy, as demonstrated in

Figure 1.3.

Absorption spectroscopy is based on the Beer Lambert law. When light with

initial intensity Io irradiates a material, it is partly absorbed and partly transmitted

by the material. For a solution of QDs, the number of particles determines the

amount of absorbed light, which is proportional to the concentration of solution c


22

and the length of light’s path Δx in the sample. The transmitted light intensity is

written as,

xc

oeII (1.18)

where ε is absorption coefficient. From equation (1.18), the absorbance, A, is

defined as,

I

IA olog (1.19)

The optical absorption measurements were recorded by using a double beam

spectrometer (Shimadzu UV-3600). The spectrometer is able to precisely

measure transmittance or reflectance from the ultraviolet (UV) region to near the

infrared (NIR) region. The spectrometer uses InGaAs and cooled PbS detectors

which work in the NIR region. For the UV to visible region, the spectrometer uses

a photomultiplier tube (PMT). As the electromagnetic sources, the spectrometer

has two main lamps which operate in two spectral ranges namely a Deuterium

lamp for the UV range and a Tungsten lamp for the visible and NIR regions. A

single wavelength of the lamp spectrum is selected by a double-grating

monochromator.

1.6 Outline of the thesis

In this thesis, the study of charge carrier transport and the analysis of the

electronic structures of carrier traps in PbS QD-FETs are reported. Our focus is to

understand how the properties of the semiconductor and/or insulator interfaces

and the introduction of dopant molecules on the semiconductor films can

determine the charge carrier transport and the electronic structures of carrier

traps in field-effect transistors. In detail:

In chapter 2, the effect of various self-assembled monolayer (SAM)

treatments of the SiO2 surface on the electrical characteristics of the devices is

investigated. The use of SAMs induces molecular dipoles on the SiO2 surface

which control the type of doping in the devices. The threshold voltage of the

devices was found to be proportional to the SAM doping concentration, providing

an opportunity to tune the properties of PbS QD-FETs toward n- or p-type

depending on the type of SAM molecules used.

In chapter 3, the charge transport properties in PbS QD-FETs through the

passivation of dangling bonds on the SiO2 surface and the use of Cytop as

hydroxyl-free gate dielectric are investigated. We found that the SiO2 surface

passivation using hexamethyldisilazane self-assembled monolayers (HMDS

SAMs) promotes better organization of particle assembly and reduces interface

traps, resulting in the improvement of charge carrier mobility. We then found that

the charge carrier mobility is further improved by one order of magnitude with

Chapter 1

23

Cytop gating. Finally, the calculation of the trap density of states (trap DOS) using

a computer simulation method, explains that the reduced trap DOS is a

microscopic origin of the improved charge carrier mobility in the devices.

In chapter 4, the trap DOS in PbS QD-FETs employing several gate

insulators with a wide range of dielectric constants is investigated. The trap DOS

was found to increase with increasing the gate dielectric permittivity. In addition,

the broadening of the trap DOS with increasing the dielectric polarization strength

was observed. The increase and the broadening of the trap DOS originate from

dipolar disorder which appears at strong dielectric polarization (high gate

dielectric constant). Despite the increase of the trap DOS, we demonstrate the

absence of negative effect of high gate dielectric permittivity on the charge carrier

mobility at the highest applied gate voltages.

In chapter 5, an efficient n-type doping of PbS QD solids using benzyl

viologen (BV) donor molecules is demonstrated. The doping strategy relies on

combining the use of the donor molecules with the engineering of the QD energy

level through the use of appropriate capping ligands. The BV doping enabled

controlling the properties of PbS QD-FETs from ambipolar to heavy n-type

allowing improving the electron mobility in the devices by one order of magnitude.

In addition, the doping reduced the contact resistance of the devices to 0.77 kΩcm.

The 4-terminal conductivity transistor measurements confirmed the efficient

doping of the devices, which display electron mobility of 0.64 cm2V-1s-1 employing

SiO2 gate dielectric.

Finally, in chapter 6, the effect of mechanical strain on the electron transport

properties in PbS QD-FETs is investigated. An ion gel which is able to accumulate

high carrier concentration was used as gate dielectric, resulting in electron

mobility as high as 2.1 cm2V-1s-1. With the application of compressive strain, we

observed the improvement of the electron mobility up to 45% (mobility of 3 cm2V-

1s-1) at 2% strain. The improvement of the mobility is attributed to the reduced

inter-QD spacing due to the bending of crosslinking ligands. When strain was

applied in the opposite direction, we observed the decrease of the electron

mobility due to the increase of the distance between QDs. In addition, we found

that the application of strain influences the property of the trap states in PbS QD-

FETs as indicated by the modulated threshold voltages.


24

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29

Chapter 2

Tunable Doping in PbS Quantum

Dot Field-Effect Transistors using

Surface Molecular Dipoles

This chapter presents the effect of various self-assembled monolayer (SAM)

treatments of the SiO2 dielectric on the electrical characteristics of PbS quantum

dot field-effect transistors (QD-FETs). With the use of SAMs, the threshold

voltage of the devices shows a linear relationship with the SAM doping

concentration. This study allows tuning the electrical properties of the devices

towards n- and p-type doping depending on the type of SAM molecules used.

Furthermore, the use of SAMs reduces the interface traps due to the passivation

of dangling bonds on the SiO2 surface. The reduced traps confirm that the

threshold voltage shifts and the mobility changes in the devices are attributed to

electron/hole doping process and are not caused by the traps induced by the

SAMs, as observed in some organic semiconductor systems.

M. I. Nugraha, H. Matsui, S. Z. Bisri, M. Sytnyk, W. Heiss, M. A. Loi, J. Takeya,

APL Mater. 2016, 4, 116105.


30

2.1 Introduction

Increasing carrier concentration through doping has been used to improve

the film conductivity and carrier mobility in different types of semiconductors.

This effort has been widely performed in organic field-effect transistors (FETs),

whereas doping in colloidal quantum dots (QDs) is generally attempted by using

different capping ligands.[1–7] Heavy doping in lead chalcogenide QDs using donor

molecules, such as cobaltocene (CoCp2) has also been investigated.[8] Doping with

these donor molecules has enabled strong n-type transport in FET devices.

However, these heavily-doped PbS QDs result in the FET devices always turned-

on with consequent low on/off ratio, which is an undesirable property for some

electronic device applications. At this point, light doping of the semiconducting

active material is preferred.

Molecular dipoles, well-known as self-assembled monolayers (SAMs), have

been widely used to achieve light doping in organic FETs. This light doping is a

consequence of band bending due to the modulation of interfacial carrier

concentration induced by the SAM molecules. Due to this modulation, the

molecules affect the threshold voltage of the devices, allowing the control of

charge carrier density as well as the device operation.[9–12] In addition, the use of

SAMs can modify the surface properties of the oxide gate dielectric, which

influences the morphology of the deposited films. Therefore, the SAM treatment

in FETs is very promising to realize high performance devices with controllable

operation. These effects have so far been widely studied in organic

semiconductors, while the investigation of SAMs in PbS QD-FETs is still limited.

In addition, there are still broad types of SAMs that have not been investigated in

PbS QD-FETs. This leaves many unsolved questions about the possibility to

improve the performance as well as to influence the electrical characteristics of

the QD-FETs using SAMs.

In this chapter, we present a study on the effect of SAM surface treatment of

the SiO2 gate dielectric on the electrical characteristics of PbS QD-FETs. Upon the

application of SAMs, we observed threshold voltage shifts indicating electron or

hole doping introduced by the molecular dipoles on the dielectric surface. We

observed an obvious relationship between the threshold voltage of the devices and

the doping concentration induced by the SAM molecules, giving us the

opportunity to tune the FET properties towards n- or p-type depending on the

SAM molecules used. The use of SAMs also allows reducing the density of traps in

the devices by passivating the dielectric surface, leading to improved electron

mobility up to a factor of three. This light doping strategy through SAM treatment

is promising in controlling the electrical characteristics and improving charge

carrier mobility in PbS QD-FET devices.

Chapter 2

31

2.2 Doping mechanism using SAMs

In this study, six types of SAM molecules were utilized to functionalize the

SiO2 surface namely hexamethyldisilazane/HMDS, hereinafter referred to as (A),

n-octyltriethoxysilane/OTS (B), trimethoxy(2-phenylethyl)silane/PEMS (C),

trichlorophenetylsilane/β-PTS (D), 3(mercaptopropyl)trimethoxy-silane/MPMS

(E), and dodecylthrichlorosilane/DTS (F). The molecular structures of the SAMs

are displayed in Figure 2.1 (a). To ensure that the SAM molecules influence the

semiconductor/insulator interface only, a top contact device structure was

fabricated as shown in Figure 2.1 (b). In this way, the effect of SAMs on the work

function of the source-drain electrodes is minimized. The insertion of the SAM

layer between the semiconductor and the dielectric films does not significantly

change the total series capacitance due to higher capacitance of the SAM layer

than that of the SiO2 gate dielectric. After the deposition of the semiconductor

films on the SiO2 dielectric, the Fermi level of the semiconductor is aligned with

the work function (Fermi level) of the gate electrode as described in Figure 2.1 (c).

The treatment of the SiO2 surface with SAMs introduces dipoles on the surface

which allow upward or downward bending of the energy levels of the

semiconductor, leading to hole or electron accumulation depending on the

polarity of the SAMs. This accumulation of carriers without applying a gate

voltage appears as a carrier doping in the devices, which therefore influences the

electrical characteristics of the devices.

CH3

SiH3C CH3

CH3

Si CH3H3C

HN

(a) (b)

SiO2

PbSSAMs

n-Si

Au

(c)

Gate

SiO2

Ec

Ev

Ef

OCH3

Si OCH3H3CO

CH2

(CH2)6

CH3

OCH3

Si OCH3H3CO

(CH2)2

Cl

Si ClCl

(CH2)2

OCH3

Si OCH3H3CO

CH2

(CH2)2

SH

Cl

Si ClCl

CH2

(CH2)10

CH3

A B C

D E F

Gate

SiO2

Ef

+-SAMs

-----Ec

Ev

Gate

SiO2

Ef

+ -SAMs

+++++

Ec

Ev

Figure 2.1 (a) Molecular structures of SAMs. (b) Configuration of PbS FETs. (c) Schematic

of energy level diagrams in PbS FETs with untreated SiO2 (left) and SAM-treated SiO2

(middle and right) at zero gate voltage.


32

2.3 Properties of PbS films on SAM-treated SiO2

2.3.1 Morphology of PbS films

As a first step, AFM measurements on PbS films were performed to verify

the effect of SAMs on the morphology of the PbS films. Because the first PbS layer

has a direct contact with the SAM-treated SiO2 surface, the AFM images were only

taken for this first layer as shown in Figure 2.2 (a)-(f). We found that the use of

SAMs on the SiO2 surface generally promotes a better particle organization as

demonstrated by the reduced surface roughness in all films, with the exception of

the DTS-treated surface. In DTS-treated SiO2, the surface becomes very

hydrophobic which drastically reduces the wettability of the QD solution in

chloroform, producing some particle aggregates during the film deposition.

Figure 2.2 AFM images of the first PbS layer on different SAM treated-SiO2 surfaces with

given surface roughness (R).

Chapter 2

33

2.3.2 Electrical Properties of PbS QD-FETs

To investigate the effect of SAM surface treatment of the gate insulator on

the electrical characteristics of PbS QD-FETs, we first performed the electrical

characterization of the devices without any surface treatment in an N2-filled glove

box. The transfer characteristics of the PbS QD-FETs in the n-channel operation

without surface treatment are shown in Figure 2.3 (a). The devices show

pronounced n-type properties with extracted electron linear mobility of 0.02

cm2V−1s−1 and a high current modulation of 104. The electron mobility is calculated

from the forward sweep of the transfer curve, which means that the extracted

values do not overestimate the real value of the mobility. In the semi-logarithmic

profile of the transfer characteristics, we also observed a slight hole current. Here

we focus on the electron transport properties to investigate the effect of SAM

surface treatment of the SiO2 gate dielectric, since the hole current in the devices

is much lower than the electron current. The hole transport in the devices is also

influenced by the much higher hole trap density with respect to the electron trap

density, which may result in uncertainty regarding the effect of doping.[13–15]

-20 0 20 40 60

0.0

0.5

1.0

1.5

10-11

10-10

10-9

10-8

10-7

10-6

Dra

in C

urr

ent

(A)

Dra

in C

urr

ent

(A)

Gate Voltage (V)

Vds

=5 V

x10-6(a)

5 10 15 200.0

0.5

1.0

1.5x10

-6

40 V

Dra

in C

urr

ent

(A)

Drain Voltage (V)

0,10,20,30 V

50 V

0

Dra

in C

urr

ent

(A)

(b)(a) (b)

Figure 2.3 (a) Ids-Vg transfer and (b) Ids-Vds output characteristics of pristine PbS FETs.

The FET devices utilize a SiO2 gate dielectric with thickness of 200 nm

defining the oxide capacitance (Ci) of 17.3 nF/cm2. By estimating the intercept of

the current voltage curve in the x-axis, the threshold voltage of the devices is

calculated to be 29 V. To confirm that the devices are in the linear regime at the

applied source-drain voltage (Vds), the output characteristics of the devices are

displayed in Figure 2.3 (b). From the output characteristics, it is also clear that the

devices show both clear linear and saturation regime with no indication of contact

limitation.


34

-20 0 20 40 60

0

1

2

3

4

5

C

B

A

P

x10-6

Dra

in C

urr

ent

(A)

Gate Voltage (V)

Vds

=5 V

-20 0 20 40 60

0.0

0.5

1.0

1.5

F

E

D

P

Vds

=5 V

Dra

in C

urr

ent

(A)

Gate Voltage (V)

x10-6

0 20 40

0.0

0.2

0.4

I ds(A

)

Vg (V)

x10-6

0 20 40

0.0

0.2

0.4

x10-6

I ds (

A)

Vg (V)

(b)

(a)

Figure 2.4 Ids-Vg transfer characteristics of PbS FETs after various SAM treatments on the

SiO2 surface indicating (a) electron and (b) hole doping.

The transfer characteristics of PbS QD-FETs on different SAM-treated SiO2

surfaces are shown in Figure 2.4 (a) and (b). The characteristics of the devices

fabricated on the pristine SiO2 are shown in black line and indicated by ‘P’. Using

the SAM treatment, we are able to improve as well as to effectively tune the source-

drain current of the devices. The treatment of the SiO2 gate insulator using SAM

A shows the highest current and the highest mobility among the tested SAMs. In

addition, the SAM surface treatment of the SiO2 gate dielectric also influences the

threshold voltage characteristics of the devices. By treating the SiO2 surface with

SAM A-C, the transfer characteristics shift to negative gate voltages indicating

reduced threshold voltage and electron doping in the devices, as demonstrated in

Figure 2.4 (a). The inset of Figure 2.4 (a) displays the detailed profiles of the

negatively shifted transfer characteristics of the devices with SAM A-C treated

SiO2 dielectric. Conversely, Figure 2.4 (b) shows that the threshold voltage shifts

towards more positive voltages when the SiO2 surface is treated with SAM D-F

Chapter 2

35

indicating hole doping in the devices. A clearer image of the positively shifted

transfer characteristics of the devices with SAM D-F treated SiO2 surface is

displayed in the inset of Figure 2.4 (b). With these results, the SAM treatment

strategy allows tuning the electrical characteristics of PbS QD-FETs through

electron or hole doping, depending on the type of SAM molecules utilized.

2.3.3 SAM doping concentration

At this point, it is interesting to quantify the doping strength induced by the

SAM molecules, which corresponds to the concentration of electron and hole

doping in the devices. The concentration of electron and hole doping can be

estimated from the semi-logarithmic profile of the device transfer characteristics.

Figure 2.5 shows the transfer characteristics of PbS QD-FETs in semi-logarithmic

scale fabricated on several SAM-treated SiO2 surfaces. In line with Figure 2.4, a

clear shift of the transfer characteristics to negative and positive voltages was

demonstrated, depending on the type of SAMs used. In addition, an obvious

variation of the on-voltage (Von) of the devices using different SAM treatments

was also observed. The Von can be calculated from the gate voltage where the

source-drain current starts increasing exponentially. This voltage corresponds to

the concentration of electron and hole doping in the devices following the

equation eVCN oniSAMs / where ΔVon is the shift of the on-voltage in SAM-

treated devices with respect to that in pristine devices.[10] Table 2.1 shows the

doping concentration of electron and hole in the devices with different SAM

treatments of SiO2 gate dielectric. The negative values of the doping concentration

correspond to electron doping, while the positive values indicate hole doping.

Figure 2.5 Ids-Vg transfer characteristics of PbS FETs in semi-logarithmic scale after various

SAM treatments on the SiO2 surface.

(b)

-20 0 20 40 6010

-12

10-11

10-10

10-9

10-8

10-7

10-6

10-5

F

E

P

B

A

Dra

in C

urr

ent

(A)

Gate Voltage (V)

Vds

=5 V


36

Table 2.1 Carrier doping concentration and trap density in the devices with different SAM

treatments.

SAMs Molecules NSAMs

(1012 cm-2)

Dipole

Moment (D)

Ntraps

(1012 eV-1 cm-2)

P Pristine - - 11.6

A HMDS -1.1 -0.98 4.9

B OTS -0.54 3.03 10.2

C PEMS -0.33 -1.74 9.0

D β-PTS 0.76 0.41 9.8

E MPMS 0.97 1.21 10

F DTS 1.5 0.91 7.4

Figure 2.6 Schematic of dipole moments on the SiO2 surface after treatment with SAM A-

F. One of end groups is terminated with H atom to simplify the calculation.

Chapter 2

37

The doping concentration is related to the dipole moments induced by the

SAM molecules. The SAM dipole moments and their direction are given in Table

2.1 and displayed in Figure 2.6. These dipole moments are calculated using

Gaussian program by terminating the end group of the SAM molecules with

hydrogen atom to simplify the calculation. The magnitude and direction of the

dipole moments might be influenced by the model used for the calculation using

Gaussian program. In Figure 2.6, the negative dipole moments correspond to

their downward direction, which favor more electron doping, thus negative

concentration values. Meanwhile, upward direction is shown by the positive

values of dipole moments which promote hole doping. Interestingly, a peculiar

result with SAM B is observed, in which electron doping is produced by a positive

dipole moment. In addition, we also did not find a monotonic trend between the

magnitude of dipole moment and the number of carrier concentration at a specific

type of carrier doping. These results can be attributed to the effective arrangement

of the SAM molecules on the SiO2 surface. It is important to note that the

arrangement of the SAMs and their orientation on the SiO2 surface are very crucial

to determine the effective magnitude of dipole moments and the type of charge

carrier doping.

Figure 2.7 The characteristics of threshold voltage for electron accumulation as a function

of doping concentration induced by SAMs.

As we compare Figure 2.4 and 2.5, the variation in the Von, thus in doping

concentration, is interestingly followed by the threshold voltage shift in the same

direction. It further shows that the charges induced by the SAMs are the origin of

the shifted transfer characteristics. Figure 2.7 presents a linear relationship

between the threshold voltage of the devices and the SAM doping concentration.

The deposition of the SAM thin layer builds a series capacitance with respect to

-1 0 1 210

20

30

40

50

FE

D

CB

Thre

shold

Voltage (

V)

NSAMs

(1012

cm-2)

AP

(a)


38

the capacitance of the oxide gate dielectrics (Ci), which induces a threshold voltage

shift that can be described as follows,

i

SAMsSAMs

SAMsi

SAMsith

C

eNeN

CC

CCV

(2.1)

where CSAMS and NSAMs are the capacitance of SAMs and the SAM doping

concentration, respectively. According to equation (2.1), the inverse gradient of

the curve in Figure 2.7 corresponds to the capacitance of the SiO2 gate dielectric.

From Figure 2.7, the calculated gradient of the curve is 5.2 x 10-12 V cm2, which

corresponds to the gate dielectric capacitance of 31.1 nF/cm2. This capacitance

value shows a substantial deviation from the one of the actual gate dielectric used

in the devices, 17.3 nF/cm2. This deviation may come from an underestimation of

the calculated Vth, particularly in the devices with the characteristics shifted

towards the right direction, as we refer to Figure 2.4. The Vth value can be

extracted at different charge carrier densities, which may result in an error in the

Vth extraction.

2.3.4 Mobility and density of traps

The doping strategy using SAMs also allows determining the charge carrier

mobility in the devices. Figure 2.8 (a) displays the electron mobility in the linear

regime obtained using different SAM surface treatments. The electron mobility

increases with increasing electron doping concentration. We also observed that

the electron mobility tends to decrease as the hole doping concentration increases

with the exception of the devices treated with SAM D. In this condition, holes in

the devices reduce the film conductivity, which result in the decrease of the

electron mobility. This could be explained with the recombination of holes and

electrons, which gives rise to light emission.[16,17]

(b)

-1 0 1 20.00

0.02

0.04

0.06

0.08

P

Mobili

ty (

cm

2V

-1s

-1)

B

NSAMs

(1012

cm-2)

A

F

E

D

C

(a)

0

5

10

15

20

N

traps (

10

12 c

m-2eV

-1)

P FEDCBA

SAM

(b) SAMs

Figure 2.8 (a) Electron mobility as a function of doping density induced by SAMs. (b) The

density of traps (Ntraps) in PbS FETs with various SAM-treated SiO2 surfaces.

Chapter 2

39

In organic FETs, organosilanes have been indicated to induce additional

traps which further reduce the charge carrier mobility.[18,19] Therefore, to confirm

that the decrease of the electron mobility is caused by hole doping and not by the

additional traps, we quantify the trap density (Ntraps) in our devices using equation

(1.14). The density of traps in the devices using different surface treatments is

shown in Figure 2.8 (b) and given in Table 2.1. Obviously, the use of SAMs on the

SiO2 surface reduces the density of electron traps in the devices, which is in

agreement with the fact that the SAMs passivate the dangling bonds on the SiO2

surface. These results further confirm that the decrease of the electron mobility in

Figure 2.8 (a), particularly in the devices treated with SAM E and F, originates

from the hole doping, not from the SAM-induced traps as observed in some

organic FETs.[18,19] In addition, the reduction of the density of traps by almost a

factor of three using SAM A contributes to the highest electron mobility in the

devices (0.07 cm2V-1s-1). The improvement of the carrier mobility in the devices is

not as high as in the case of organic single crystals such as rubrene.[20,21] In rubrene

FETs, the trap density in the material is very low. Hence, a small doping level

induced by SAMs will have a great impact on the mobility of the charge carriers.

Meanwhile, the trap density in PbS FETs is rather high (1.2 x 1013 eV-1cm-2).

Because of this high trap density, the improvement of the mobility in the devices

is very reasonable considering the doping level given by the SAMs.

2.4 Conclusion

The effect of various SAM treatments of SiO2 gate dielectric on the electrical

characteristics of PbS QD-FETs has been studied. The use of SAMs resulted in the

threshold voltage shifts by inducing electron or hole doping in the devices. The

threshold voltage of the devices was found to have a linear relationship with the

SAM doping concentration, allowing tuning the electrical characteristics of PbS

QD-FETs depending on the type of the SAM molecules used. The use of particular

SAMs was also able to improve the electron mobility by a factor of three, which is

attributed to higher electron doping as well as lower interface traps than in the

devices fabricated on untreated SiO2 surface. Meanwhile, hole doping results in a

decrease of the electron mobility, probably due to the recombination of electron

and hole.

2.5 Methods

SAM treatment of SiO2 dielectric. Heavily n-doped silicon covered with

a thermally grown 200 nm thick SiO2 layer was used as substrates. Before use, the

substrates were cleaned with acetone and isopropanol for 10 min, respectively.

The substrates were then dried at 120oC to remove residual solvents. Six different


40

types of SAM molecules, namely, hexamethyldisilazane/HMDS, hereinafter

referred to as (A), n-octyltri-ethoxysilane/OTS (B), trimethoxy(2-

phenylethyl)silane/PEMS (C), trichloro-phenetylsilane/β-PTS (D), 3-

(mercaptopropyl)trimethoxysilane/MPMS (E), and dodecyltrichlorosilane/DTS

(F) were used to functionalize the SiO2 surface. The treatment with SAM A was

done by soaking the substrates in SAM A for 1 min followed by spin-coating at

1000 rpm for 1 min (drying). For the treatment with SAM B-E, the substrates were

immersed in the corresponding SAM solution (20 µL of SAM molecules in 10 mL

of toluene) for 48 h. The last SAM F treatment was done using vapor deposition

at atmospheric pressure obtained by placing the SAMs and substrates inside a

Teflon container at 120oC for 3 h. To remove the excess of unbound SAM

molecules, the substrates were cleaned with acetone and isopropanol for 5 min,

respectively. Finally, the substrates were dried at 120oC to remove the residual

solvents as well as to promote stronger bonding between the SAM molecules and

the SiO2 surface.

Device fabrication. The deposition of PbS QD films (diameter of 3.6 nm)

from 10 mg/mL of oleic acid stabilized-QD solution in chloroform on the

previously SAM-treated substrates was done using spin-casting. To improve the

conductivity of the films, the long-alkyl chain organic ligands were exchanged

with shorter organic molecules, namely 1,2-ethanedithiol (EDT), with

concentration of 1% (v/v) in acetonitrile. The film deposition and the ligand

exchange (LE) were done using layer-by-layer (LbL) spin-coating method

repeated for five times to ensure complete LE process, as previously reported.[22–

25] After each LE step, the samples were cleaned with acetonitrile to favor the

removal of the exchanged native oleic acid ligands. The devices were then

annealed at 120oC for 20 min to remove residual solvents. Finally, Au with

thickness of 50 nm was evaporated as source-drain electrode defining the channel

length and width of 50 µm and 2 mm, respectively. All device fabrication was

performed in an N2-filled glove box.

Device measurements. The electrical characteristics of FETs were

measured using an electrical probe station (placed in an N2-filled glove box) that

is connected to an Agilent B1500A semiconductor parameter analyzer.

Chapter 2

41

2.6 References

[1] M. H. Zarghami, Y. Liu, M. Gibbs, E. Gebremichael, C. Webster, M. Law, ACS Nano

2010, 4, 2475.










[7] M. J. Greaney, R. L. Brutchey, Mater. Today 2015, 18, 31.

[8] W. Koh, A. Y. Koposov, J. T. Stewart, B. N. Pal, I. Robel, J. M. Pietryga, V. I. Klimov,

Sci. Rep. 2013, 3, 2004.



[10] K. P. Pernstich, S. Haas, D. Oberhoff, C. Goldmann, D. J. Gundlach, B. Batlogg, A.

N. Rashid, G. Schitter, J. Appl. Phys. 2004, 96, 6431.

[11] J. E. McDermott, M. McDowell, I. G. Hill, J. Hwang, A. Kahn, S. L. Bernasek, J.

Schwartz, J. Phys. Chem. A 2007, 111, 12333.

[12] M. F. Calhoun, J. Sanchez, D. Olaya, M. E. Gershenson, V. Podzorov, Nat. Mater.

2008, 7, 84.


C. R. Kagan, ACS Nano 2013, 7, 2413.



[15] M. I. Nugraha, R. Häusermann, S. Z. Bisri, H. Matsui, M. Sytnyk, W. Heiss, J.

Takeya, M. A. Loi, Adv. Mater. 2015, 27, 2107.

[16] C. Rost, S. Karg, W. Riess, M. A. Loi, M. Murgia, M. Muccini, Appl. Phys. Lett.

2004, 85, 1613.

[17] M. A. Loi, C. Rost-Bietsch, M. Murgia, S. Karg, W. Riess, M. Muccini, Adv. Funct.

Mater. 2006, 16, 41.

[18] K. P. Pernstich, A. N. Rashid, S. Haas, G. Schitter, D. Oberhoff, C. Goldmann, D. J.

Gundlach, B. Batlogg, J. Appl. Phys. 2004, 109, 84510.



[20] J. Takeya, M. Yamagishi, Y. Tominari, R. Hirahara, Y. Nakazawa, T. Nishikawa, T.

Kawase, T. Shimoda, S. Ogawa, Appl. Phys. Lett. 2007, 90, 102120.

[21] J. Takeya, T. Nishikawa, T. Takenobu, S. Kobayashi, Y. Iwasa, T. Mitani, C.

Goldmann, C. Krellner, B. Batlogg, Appl. Phys. Lett. 2004, 85, 5078.

[22] A. G. Shulga, L. Piveteau, S. Z. Bisri, M. V. Kovalenko, M. A. Loi, Adv. Electron.

Mater. 2016, 2, 1500467.



42

Lett. 2014, 104, 112104.




43

Chapter 3

Dielectric Surface Passivation and

Hydroxyl-free Polymer Gating in

PbS Quantum Dot Field-Effect

Transistors

In this chapter, the effect of gate dielectric surface passivation and

hydroxyl-free Cytop polymer gating in PbS quantum dot field-effect transistors

(QD-FETs) are studied. The passivation of the gate dielectric surface through the

use of self-assembled monolayers (SAMs) results in a significant improvement

of electron mobility due to reduced interface traps and improved particle

assembly organization. With hydroxyl-free Cytop polymer gating, the charge

carrier mobility in the devices is further improved by one order of magnitude.

The calculation of the trap density of states (trap DOS) using a computer

simulation shows that a significant reduction of the trap DOS over broad energy

distribution is the origin of the improved charge carrier mobility in the devices.

M. I. Nugraha, R. Häusermann, S. Z. Bisri, H. Matsui, M. Sytnyk, W. Heiss,

J. Takeya, M. A. Loi, Adv. Mater. 2015, 27, 2107


44

3.1 Introduction

The fabrication of field-effect transistors (FETs) is one of the best methods

to evaluate charge transport properties in semiconductors, including QD

assemblies.[1,2] Since FETs are interface-based devices, charge trapping is not only

influenced by the properties of the active layer (the QD assembly) but also by the

nature of the gate dielectric and its surface. Many efforts have been done to

enhance the carrier mobility in PbS QD transistors. These attempts include

variation of crosslinking ligands,[3–6] chemical post-deposition treatments to vary

doping levels or to fill carrier traps,[7–9] increasing the chemical purity,[10] and

controlling the effect of oxygen/moisture during fabrication.[4,5] Nevertheless, the

typical mobility is still only up to 10−2 cm2V−1s−1, with the exception of sintered

PbS QDs, which however often give rise to unipolar devices with limited on/off

ratio,[8,11] and the devices which utilize ionic-liquid gating that allows

accumulating a higher carrier density than trap density.[4,12,13] In devices using

conventional dielectrics such as SiO2, the transport characteristics are still trap

dominated.

In this chapter, we demonstrate a high electron mobility and a very low trap

density in ambipolar PbS QD-FETs through the improvement of the QD assembly

and the utilization of an amorphous fluoropolymer (Cytop) thin film as gate

dielectric. Cytop is a hydroxyl-free and transparent polymer dielectric which has

a dielectric constant of 2–2.3. We first improved the assembly organization of the

3-mercaptopropionicacid (3MPA) cross-linked PbS nanocrystals on the SiO2

surface through the utilization of hexamethyldisilazane self-assembled

monolayers (HMDS SAMs). This SAM treatment passivates the silanol on the SiO2

surface that may act as electron trapping site. Cytop was deposited on top of the

PbS nanocrystal assembly as second gate structure. The dual-gated FET

structures using Cytop as a top gate and SiO2 as bottom gate dielectric (Figure 3.1),

were utilized to compare the influence of the two different dielectrics on the same

PbS nanocrystal assembly. Finally, from the obtained transport characteristics,

the simulation and numerical fitting to quantify the trap density of states (trap

DOS), we observed for both holes and electrons in the FETs a sheet trap density

lower than 1012 cm−2, which explains the high electron mobility of 0.2 cm2V−1s−1.

Figure 3.1 Configuration of PbS QD-FETs with SiO2 bottom and Cytop top gate dielectrics.

Chapter 3

45

3.2 Properties of PbS FETs with HMDS-treated SiO2

3.2.1 Morphology of PbS films

The deposition of PbS QD films for FETs as well as for solar cells, is

commonly performed using a layer-by-layer method to ensure effective ligand

exchange. Therefore, the assembly organization of the first QD monolayer is the

most crucial factor that determines the morphology of the successive layers. A

conventional method for the deposition of QDs on a clean SiO2, which has been

used to successfully demonstrate well-performing devices,[4,5] produces clusters

instead of large scale homogeneous films. The clustering is observed from the first

monolayer after the ligand exchange of oleic acid with 3MPA as shown in Figure

3.2 (a). The formed clusters can be as thick as the equivalent of 3 monolayers,

resulting in a root mean square (RMS) roughness of about 2.4 nm.

Figure 3.2 AFM images of (a) the first PbS QD layer on bare SiO2 and (b) on HMDS-

functionalized SiO2. The inset shows the water contact angle of untreated and HMDS-

treated SiO2 surfaces.

To increase the hydrophobicity of the substrate, the SiO2 surface was

functionalized using hexamethyldisilazane self-assembled monolayers (HMDS

SAMs). The HMDS-functionalized SiO2 shows a water contact angle of 60o, which

is increased significantly with respect to the contact angle measured for pristine

SiO2 (30o), indicated in Figure 3.2 (a) and (b). From the AFM micrographs, the

surface of HMDS-treated SiO2 is comparably smooth as that of the pristine SiO2

as shown in Figure 3.3 (a) and (b). The smoothness of the surface and the high

water contact angle clearly show that HMDS forms a well packed self-assembled

monolayer and passivates the silanol (hydroxyl) groups on the SiO2 surface. This

functionalization significantly improves the assembly-order of the deposited PbS

QDs. The RMS roughness of 0.8 nm indicates that no significant clustering

observed in the first monolayer of the nanocrystal assembly after ligand exchange

as displayed in Figure 3.2 (b). This indicates that the use of HMDS-SAMs


46

homogeneously reduces the surface energy for the deposition of PbS QDs from

chloroform-based solutions.

4.01 nm0.0

1 μm

(a)

0.0 4.5 nm

1 μm

(b)

Figure 3.3 AFM images of (a) bare SiO2 and (b) HMDS-treated SiO2.

3.2.2 Electrical properties of PbS QD-FETs

PbS QD-FETs prepared on HMDS-treated SiO2 were first operated as

bottom-gate bottom-contact FETs with SiO2 as gate dielectric. The configuration

of the devices is displayed in Figure 3.1. The Ids-Vds output characteristics of the

FETs with SiO2 accumulation are shown in Figure 3.4 (a). The FETs show

ambipolar properties with more electron-dominated characteristics, consistent

with previous reports on PbS QD-FETs using 3MPA ligands.[4,5] Both, n- and p-

channel output, show clear current saturation behaviors. In the small drain

voltage operation, it is obvious that the devices exhibit nearly ohmic-like injection,

both, for holes and electrons.

Figure 3.4 (b) shows the Ids-Vg transfer characteristics of electron and hole

modulations in the corresponding transistors. The electron on/off ratio achieves

a value as high as 106. The fabricated devices have a 20 µm channel length and a

10 mm channel width, the capacitance of SiO2 is 15 nF/cm2. The maximum

extracted mobility value in the linear regime is 0.07 cm2V-1s-1 for electrons and

5×10-5 cm2V-1s-1 for holes. The electron mobility is reasonably high for non-

sintered ambipolar PbS QD-FETs that show high on/off ratio of 106 using SiO2

gate dielectric and 3MPA ligands. The non-sintered PbS QD films are revealed

from the absorbance spectrum that still maintain excitonic peak even after

annealing the PbS films at 140oC as displayed in Figure 3.5.

Chapter 3

47

Figure 3.4 (a) Ids-Vds output and (b) Ids-Vg transfer characteristics of PbS QD-FETs with

HMDS-treated SiO2. The applied Vds in the transfer characteristics is ±5 V.

600 800 1000 1200 1400 1600

Absorb

ance (

a.u

)

Wavelength (nm)

PbS-OA films PbS-3MPA RT

PbS-3MPA 140oC

Figure 3.5 Absorbance spectrum of PbS QD films with oleic acid (black), 3MPA without

annealing (red), and 3MPA ligands after annealing at 140oC (blue).

(b)

-60 -40 -20 00.0

-0.2

-0.4

-0.6

-0.8

-1.0

0 20 40 60

Dra

in C

urr

ent

(A

)

Dra

in C

urr

ent

( A

)

Drain Voltage (V)

0

50

100

150

0 V

Vg -80 V Vg 80 V

0 V

-80 -40 00.00

0.05

0.10

0.15

0.20

0.25-8 -4 0

Carrier Density (1012

cm-2)

Gate Voltage (V)

10-11

10-10

10-9

10-8

10-7

10-6

10-5

0 40 80

0 4 8

|Dra

in C

urr

ent| (A

)

Dra

in C

urr

ent

(A

)

0

5

10

15

20

25

(a)


48

We compare the above-mentioned results with those from reference devices,

in which the PbS layers were deposited on the top of bare SiO2 (without HMDS

treatment) and where the clustering of QDs occurs. From the parameters

extracted from the device characteristics of the reference samples in Figure 3.6

(a), it can be deduced that the improvement of the QD assembly organization

leads to an increase of the carrier mobility of about a factor of 3 for electrons.

There is, however, no significant change in the hole accumulation. Two main

differences can be observed from the comparison of the two types of devices. In

the reference samples, the source-drain current in the n-channel saturation

regime shown in Figure 3.6 (b) decreases with the increase of Vds, which is not

observed in the case of the HMDS-treated samples. This decrease of the current

in the saturation regime can be attributed to the trapping of electrons.

(a)

(b)

-60 -40 -20 00.0

-0.5

-1.0

-1.5

0 20 40 600

40

80

120

Dra

in C

urr

ent (

A)

Dra

in C

urr

ent (

A)

Drain Voltage (V)

Vg=-80 V

0 V

0 V

Vg=80 V

-80 -40 0

0.00

0.05

0.10

0.15

10-11

10-10

10-9

10-8

10-7

10-6

10-5

Vds=5 VVds=-5 V

0 40 80

|Dra

in C

urr

ent| (A

)

Gate Voltage (V)

Dra

in C

urr

ent (

A)

0

5

10

15

20

Figure 3.6 (a) The transfer and (b) output characteristics of PbS QD-FETs with bare SiO2.

The nature of charge trapping in FET devices can also be estimated from the

subthreshold swing in the transfer characteristics of the devices. Figure 3.7 (a)

shows the comparison of the n-channel Ids-Vg transfer characteristics between the

HMDS-treated devices and the reference devices fabricated on bare SiO2.

Obviously, the devices with HMDS-treated SiO2 show a lower subthreshold swing

(SS = 2.71 V.dec-1) than the reference devices (SS = 6.77 V.dec-1). The lower

subthreshold swing corresponds to a reduced interface trap density due to the

passivation of silanol groups after HMDS treatment.

Chapter 3

49

Figure 3.7 Comparison of the transfer characteristics in the devices with bare and HMDS-

treated SiO2 in (a) semi-logarithmic and (b) linear scale.

At this point, it is also interesting to investigate the effect of HMDS surface

treatment on the doping behavior in the devices as indicated from the threshold

voltage values. By using the intercept linear extrapolation of source-drain current

to the gate voltage axis in the linear scale of transfer characteristics shown in

Figure 3.7 (b), we obtained an average Vth for bare SiO2 of 41.3 V and 12.6 V for

electrons and holes, respectively. The devices that were treated with HMDS SAMs

demonstrate an average threshold voltage of 27.2 V and -11 V for electrons and

holes, respectively. This indicates that the HMDS SAM treatment shifts the

electron threshold voltage as much as -14.1 V and the hole threshold voltage as

much as -23.6 V. The transistors that undergo the HMDS treatment show electron

doping, indicating less trapped electrons and the effect of the introduction of

interface dipoles. The influence of the attached HMDS molecules on the SiO2

surface dipole moment was then characterized using Gaussian program. After

HMDS treatment, we found that the dipole moment on the SiO2 surface was

-80 -40 00.00

0.05

0.10

0.15

0.20

0.25

0 40 80

SiO2

HMDS-SiO2

|Dra

in C

urr

ent| (A

) Vds=5 V

Dra

in C

urr

ent

( A

)

Vds=-5 V

Gate Voltage (V)

0

5

10

15

20

25

-20 0 20 40 60 80

10-11

10-10

10-9

10-8

10-7

10-6

10-5

Dra

in C

urr

en

t (A

)

Gate Voltage (V)

SiO2

HMDS-SiO2

Vds=5 V

(b)

(a)


50

changed by 0.61-0.98 D. It has been reported that the change of the dipole

moment at the dielectric interface can influence the threshold voltage values.[14,15]

The threshold voltage shift can be estimated from,[16,17]

SAMs

doxdo

soxsth

AtC

tCCV

(3.1)

where Cs, is the capacitance of semiconductor, εo is the vacuum permittivity, and

µSAMs is the SAM dipole moment. The thickness ts of the QD layer is about 30 nm

and the diameter of PbS QDs is around 3.6 nm which corresponds to a molecular

area A of about 13 nm2. The dielectric coefficient of PbS QDs has been reported as

εs = 22.5, obtained from capacitance measurement.[18] In equation (3.1), the

dielectric constant εd and the SAM thickness td are 2.27 and 0.45 nm, respectively.

The threshold voltage shift was calculated to be -23.5 V, which is very close to the

experimental result of -23.6 V for holes. The threshold voltage shift for electrons

according to our experiment is -14.1 V, which shows a little deviation with respect

to the result of the calculation. This deviation may originate either from the

approximated model used in the equation (3.1) or the magnitude of

semiconductor capacitance Cs, which is influenced by traps thus overestimating

the calculated value. These results explain in addition by the improvement of the

QD assembly organization, the use of HMDS SAMs is able to reduce the threshold

voltage for electron accumulation.

3.3 Cytop Gating in PbS QD-FETs

After having studied the devices using bottom gate structure, the FETs using

Cytop as top gate dielectric were operated (Figure 3.1). Cytop is a

perfluoropolymer with chemical structure displayed in Figure 3.8 (a). The water

contact angle of 115o demonstrated in Figure 3.8 (b) reveals that Cytop has

hydrophobic properties.

Figure 3.8 (a) Chemical structure and (b) water contact angle of Cytop.

Chapter 3

51

-80 -40 00.00

0.05

0.10

0.15

10-10

10-9

10-8

10-7

10-6

10-5

0 40 80

|Dra

in C

urr

ent| (A

)

Dra

in C

urr

ent

( A

)Gate Voltage (V)

Vds=5 VVds=-5 V

0

5

10

15

-60 -40 -20 00.0

-0.2

-0.4

-0.6

-0.8

-1.0

0 20 40 60

Dra

in C

urr

ent

(A

)

Dra

in C

urr

ent

(A

)

Vg 80 V

0 V

Vg -80 V

0 V

Drain Voltage (V)

0

20

40

60

80

100

(b)

(a)

-8 -4 00.0

0.2

0.4

0.6

0.8

1.0

0 4 80.0

0.2

0.4

0.6

0.8

1.0

Vds=5 V

Conductivity (

10

-8 S

)

Conductivity (

10

-10 S

)

Carrier Density (1012

cm-2)

Vds=-5 V

(a)

(b)

(c)

Figure 3.9 (a) Ids-Vds output and (b) Ids-Vg transfer characteristics of PbS QD-FETs

employing Cytop gate dielectric. (c) Comparison of conductivity versus carrier density in

the devices with HMDS-treated SiO2 (red) and Cytop (blue).

Figure 3.9 (a) and (b) show the Ids-Vds and Ids-Vg characteristics of the FETs

with Cytop gating. The transistors display ambipolar characteristics dominated by

electron transport. In general, the I-V characteristics look very similar to the one

measured by operating the devices with SiO2 gate dielectric. This indicates that

the deposition of the fluoropolymer does not introduce any unwanted chemical


52

reaction with the active layer. The devices show electron on/off ratio up to 105 and

a subthreshold swing of 6.4 V∙dec-1. The threshold voltages for electron and hole

accumulations are rather high, 37.2 V and -20.7 V, respectively. However, it is

important to mention that the Cytop gate dielectric is overwhelmingly thick (2

µm) and makes the capacitance rather small (0.86 nF/cm2). As a result, the field-

induced sheet carrier density was only n = 4×1011 cm-2 at Vg = 80 V. This value is

much smaller than the carrier density that could be induced with the SiO2 gating

(n = 8×1012 cm-2 at Vg = 80 V). This is the reason behind the smaller on/off ratio

and the higher threshold voltage in the Cytop gate operation.

Figure 3.9 (c) compares conductivity versus carrier density induced with

Cytop and HMDS-treated SiO2. This plot shows that the threshold carrier density

for electron accumulation using Cytop gate dielectric is much smaller than the

accumulation using HMDS-treated SiO2. The electron and hole mobility in the

linear regime of the transistor operation is as high as 0.2 cm2V-1s-1 and 8×10-4

cm2V-1s-1, respectively. Importantly, this high mobility is achieved in PbS QD

layers that still maintain the original band gap of the particles as confirmed in

Figure 3.5 and therefore the transistors have an on/off ratio higher than 105.

3.4 Distribution of Trap DOS in PbS QD-FETs

The significant mobility improvement is attributed to the lower density of

trap states at the PbS/Cytop interface. Despite the lower induced carrier density,

the Cytop gated FETs can maintain a conductivity as high as the SiO2-gated and

HMDS-treated SiO2-gated FETs as shown in Figure 3.9 (c). Figure 3.10 shows the

analyzed trap density of states (trap DOS) for the ambipolar transistors shown in

Figure 3.4 (b), Figure 3.6 (a) (with HMDS-treated and bare SiO2 gate) and Figure

3.9 (b) (with Cytop gating). The analysis uses a numerical model developed by

Oberhoff et al., which solves the coupled drift diffusion equations governing the

charge transport in semiconductors, incorporating an arbitrary distribution of

trap states in the band gap.[19] The analysis has been done for the n- as well as the

p-type transport. The range of validity of the trap DOS analysis (solid lines) has

been estimated from the position of the Fermi level at the lowest and highest

measured source-drain current. Therefore, the range of validity is narrower on the

HOMO (highest occupied molecular orbital) side, where the p-type charge

transport occurs. After treatment of the bare SiO2 surface with HMDS there is a

clear reduction of the trap DOS close to the LUMO (lowest unoccupied molecular

orbital), whereas on the HOMO side there is no reduction of the trap DOS visible,

a slight increase has even been calculated. This is in line with the measurement of

the mobility: for the n-type transport the mobility increases by more than a factor

of 3 (0.02 cm2V-1s-1 → 0.07 cm2V-1s-1), whereas for the p-type transport the

mobility is constant at 5×10-5 cm2V-1s-1. This leads to a conclusion that HMDS can

Chapter 3

53

reduce the trap DOS on the LUMO side only by passivating the SiO2 surface. The

calculated trap DOS for the bottom gate structures is comparable to results

obtained for polycrystalline organic thin-films.[20–22]

Figure 3.10 Comparison of trap DOS in PbS QD-FETs with SiO2, HMDS/SiO2, and Cytop

gate dielectrics. The use of Cytop leads to a drastically reduced density of trap states close

to both transport levels.

When the top gate configuration with Cytop gate dielectric was operated, a

drastic reduction of the trap DOS over the whole measured energy range by more

than one order of magnitude for both HOMO and LUMO sides was observed. This

is in line with the improvement of the p-type as well as n-type mobility by one

order of magnitude in this configuration. The Cytop top gate structure reduces the

density of trap states clearly below the level of organic polycrystalline thin-films,

therefore the trap density is closer to pentacene single crystals.[23] Quantitatively,

by integrating the trap DOS over the energy, the trap density of electrons and

holes in PbS QD ambipolar FETs with Cytop gating are 2.49×1017 cm-3 and

1.20×1018 cm-3, respectively. The values correspond to 3.96×1011 cm-2 and

1.13×1012 cm-2 sheet trap densities for electrons and holes, respectively. These

values are comparable to the free carrier density for electrons about 4×1011 cm-2.

These results demonstrate a high potential of solution processed PbS QDs when

they are combined with appropriate materials, which reduce the density of trap

states.

0.0 0.1 0.2 0.3

1017

1018

1019

1020

-0.4 -0.3 -0.2 -0.1 0.0

1017

1018

1019

1020

PbS on SiO 2PbS on SiO

2

PbS under Cytop

PbS on HMDS/SiO

2

Energy above HOMO (eV)

PbS on HMDS/SiO 2

PbS under CytopHO

MO Tr

ap D

OS

(eV

-1cm

-3)

Energy below LUMO (eV)

Trap

DO

S (e

V-1

cm-3

)

LUM

O


54

Figure 3.11 The measured and simulated transfer curves for all investigated FETs.

The reliability of the calculated trap DOS results is shown by a good fitting

of the simulated transfer characteristics to the measured ones as displayed in

Figure 3.11. In addition, these results are compared with the trap DOS extraction

done using transient photovoltage and thermal admittance spectroscopy (TAS)

measurements on quantum dot solar cell structures.[24,25] The measurements done

on solar cells are sensitive to the trap DOS in the bulk of the semiconductor

whereas the FETs probe the trap DOS at the interface to the dielectric as well as

in the bulk. Energy wise, transient photovoltage measurements can only measure

trap states in the middle of the band gap, whereas the data from FETs cover an

energy range which is closer to the respective transport level. This means, the

reported trap DOS values for 3MPA-crosslinked PbS QDs cover the middle of the

band gap. On the other hand, the TAS measured trap DOS values for EDT-

crosslinked PbS QDs cover the trap states close to the LUMO level only.[24] In

contrast, these results show the complete picture of the trap DOS for both

transport levels. The comparison of the top gate configuration (Cytop) with the

reported bulk measurements reveals the trap DOS at 0.3-0.4 eV away from the

LUMO to be in the same order of magnitude. This leads to the conclusion that the

use of Cytop results in a trap DOS which is limited by the number of trap states in

the bulk only and therefore the number of trap states at the interface to the Cytop

dielectric is rather low. Thus, this very low density of trap states in the top gate

configuration using Cytop is the microscopic origin of the improved mobility for

n- as well as p-type charge carriers. Further reduction of the number of carrier

traps will allow the achievement of the mobility values close to the case where

almost all carrier traps are completely filled.[4]

-80 -40 0 40 8010

-11

10-10

10-9

10-8

10-7

10-6

10-5

Vds=5 V

Cytop HMDS SiO2

Dra

in C

urr

ent

(A)

Gate Voltage (V)

Vds=-5 V

Chapter 3

55

3.5 Conclusion

Ambipolar PbS QD-FETs with improved particle assembly organization were

fabricated. Through the utilization of HMDS SAMs, the interface trap density was

reduced and better QD arrays on the SiO2 surface were achieved which led to the

high on/off ratio for PbS QD-FETs. The use of hydroxyl-free Cytop as gate

dielectric allowed obtaining high electron mobility up to 0.2 cm2V-1s-1 in

ambipolar FETs of PbS QDs. The high carrier mobility is attributed to a very low

density of trap states at the interface, which is almost 2 orders of magnitude lower

than that with conventional oxide dielectrics. The high carrier mobility and the

high on/off ratio results show that the controlled assembly of PbS QDs as well as

the trap density reduction is crucial for the utilization of this material system for

diverse optoelectronic applications.

3.6 Methods

HMDS SAM treatment on SiO2 substrate. 230 nm SiO2/Si with pre-

patterned interdigitated Au electrodes were used as substrates. The channel

length and width of the devices were 20 µm and 10 mm, respectively. HMDS was

spin-coated on the substrates, the samples were then cleaned in acetone and

isopropanol before they were dried at 120oC for 10 min. Contact angles were

measured to investigate the coverage of the SAMs and the hydrophobicity of the

substrates. The morphology of the substrates and SAMs was measured using

atomic force microscopy (Seiko Instrument Inc.) in tapping mode.

TEM and HRTEM measurement. TEM and HRTEM images were

obtained using a JEOL 2011 FasTEM microscope operating at an accelerated

voltage of 200 kV. The QDs were deposited on the carbon side of a holey carbon-

copper TEM grid by drop-casting from a 2 mg/ml toluene solution.

Device fabrication. On the substrates that were modified by HMDS SAMs,

the PbS QD films were deposited and cross-linked with 3-mercaptopropionic acid

(3MPA) via a layer-by-layer (LbL) sequential spin coating technique, following

previously reported procedures.[4,5] The Cytop thin film has hydrophobic

properties as shown by its water contact angle of 115o in Figure 3.8 (b). Cytop is

utilized as top gate dielectric, since the QD films are difficult to be deposited on

very hydrophobic surfaces. Cytop (CT-809M) was spin-coated onto the fabricated

PbS QD devices. The samples were then annealed at 100oC for 1 h. Finally, 30 nm

Al was evaporated to fabricate the top gate electrode. All device fabrication

processes were performed in an N2-filled glove box.

Device measurements and trap DOS analysis. The transistor

electrical characterizations were performed using an electrical probe station


56

(placed in an N2-filled glove box) that was connected to an Agilent B1500A

semiconductor parameter analyzer. To analyze the density of trap states (trap

DOS), we used a numerical simulation software which was developed to calculate

the trap DOS from the measured transfer curves.[19] The software is based on the

mobility edge model, which assumes the existence of a specific energy level

(mobility edge) separating the mobile from trapped states. This model has been

used to analyze a wide range of organic semiconductors.[20–22] Comparison of

various trap DOS extraction methods demonstrated that the numerical simulation

used here gives the most accurate results.[20,22]

Chapter 3

57

3.7 References

[1] J.-S. Lee, M. V Kovalenko, J. Huang, D. S. Chung, D. V Talapin, Nat. Nanotechnol.

2011, 6, 348.

[2] D. V Talapin, C. B. Murray, Science 2005, 310, 86.

[3] W. Koh, S. R. Saudari, A. T. Fafarman, C. R. Kagan, C. B. Murray, Nano Lett. 2011,

11, 4764.



Lett. 2014, 104, 112104.



[7] C. M. Chuang, P. R. Brown, V. Bulović, M. G. Bawendi, Nat. Mater. 2014, 13, 796.


C. R. Kagan, ACS Nano 2013, 7, 2413.



[10] C. Piliego, L. Protesescu, S. Z. Bisri, M. V. Kovalenko, M. A. Loi, Energy Environ.

Sci. 2013, 6, 3054.

[11] Y. Liu, J. Tolentino, M. Gibbs, R. Ihly, C. L. Perkins, Y. Liu, N. Crawford, J. C.

Hemminger, M. Law, Nano Lett. 2013, 13, 1578.



[13] S. Z. Bisri, C. Piliego, J. Gao, M. A. Loi, Adv. Mater. 2014, 26, 1176.





[16] W. Ou-Yang, X. Chen, M. Weis, T. Manaka, M. Iwamoto, Jpn. J. Appl. Phys. 2010,

49, 04DK04.

[17] D. M. Taylor, Adv. Colloid Interface Sci. 2000, 87, 183.





[20] W. L. Kalb, S. Haas, C. Krellner, T. Mathis, B. Batlogg, Phys. Rev. B 2010, 81,

155315.

[21] W. Xie, K. Willa, Y. Wu, R. Häusermann, K. Takimiya, B. Batlogg, C. D. Frisbie,

Adv. Mater. 2013, 25, 3478.

[22] W. L. Kalb, B. Batlogg, Phys. Rev. B 2010, 81, 35327.

[23] R. Häusermann, B. Batlogg, Appl. Phys. Lett. 2011, 99, 83303.

[24] D. Bozyigit, S. Volk, O. Yarema, V. Wood, Nano Lett. 2013, 13, 5284.

[25] A. H. Ip, S. M. Thon, S. Hoogland, O. Voznyy, D. Zhitomirsky, R. Debnath, L.

Levina, L. R. Rollny, G. H. Carey, A. Fischer, K. W. Kemp, I. J. Kramer, Z. Ning, A.

J. Labelle, K. W. Chou, A. Amassian, E. H. Sargent, Nat. Nanotechnol. 2012, 7, 577.

59

Chapter 4

Broadening of the Distribution of

Trap States in PbS Quantum Dot

Field-Effect Transistors with

High-k Dielectrics

This chapter presents a quantitative analysis of the trap density of states

(trap DOS) in PbS quantum dot field-effect transistors (QD-FETs), which utilize

several polymer gate insulators with a wide range of dielectric constants. With

increasing the dielectric constant of the gate insulators, the increase and the

broadening of the trap DOS are observed which are attributed to the dipolar

disorder and polaronic interactions appearing at strong dielectric polarization.

Despite the increase of these polaron-induced traps, no negative effect is

observed on the charge carrier mobility at the highest applied gate voltage. A

proposed model related to the large electron-polaron separation distance

explains the non-monotonic effect on the charge carrier mobility in high-k gated

devices.

M. I. Nugraha, R. Häusermann, S. Watanabe, H. Matsui, M. Sytnyk, W. Heiss,

J. Takeya, M. A. Loi, ACS Appl. Mater. Interfaces 2017, 9, 4719.


60

4.1 Introduction

Reducing the operating voltage of FETs is a necessary step to use them for a

broader range of applications. With conventional SiO2 gate dielectric, the FET

devices suffer from very high operating voltage due to a low gate dielectric

capacitance, which is not compatible with practical applications. A lower

operating voltage can be achieved through the use of gate insulators with high

dielectric constant (high-k).[1–3] In organic semiconductor FETs, however,

energetic disorder and polaron relaxation are enhanced at the

semiconductor/insulator interface when utilizing high-k insulators (k>3).[4–6]

This disorder and polaronic-related interaction may modify the electronic

structure, such as the nature of trap states, at the semiconductor/insulator

interface and are responsible for the reduced charge carrier mobility in some

reported high-k gated organic FETs.[4] While the study on the localized (trap)

states with the use of high-k insulators has been intensively done in organic FETs,

only little information is available for FETs based on PbS QDs. Since the trap

states can strongly determine the performance of QD-FET devices and at the same

time dielectric insulators with higher-k are important in particular for low

operating voltage, understanding the nature of trap states in PbS QD-FETs with

increasing gate dielectric constant is crucial.

In this chapter, we present an analysis of the trap density of states (trap DOS)

in PbS QD-FETs employing several polymer gate dielectrics. These solution-

deposited polymer gate insulators display dielectric constants ranging from 2 to

41. Using these insulators, we first found that the number of deep traps extracted

from the subthreshold swing of the devices increases with increasing the dielectric

constant of the insulators. To understand this behavior, we quantified the

distribution of the trap DOS versus energy in the devices by simulating the device

working mechanism. In agreement to the subthreshold swing result, we observed

the increase and broadening of the trap DOS with increasing the dielectric

constant of the insulators. These results are rationalized in terms of an increased

disorder due to polaronic interaction at the semiconductor/insulator interface in

PbS QD-FETs with increased dielectric polarization strength.

4.2 Polarons at the semiconductor/insulator interface

When a gate voltage is applied on FET devices, charge carriers are

accumulated in the semiconductor at the interface with the insulator. The

microscopic nature of this interface has great influence on the accumulated charge

carriers as well as on their transport. Sirringhaus et al., reported that dipolar

disorder at the dielectric interface leads to the broadening of interface density of

states (DOS) in polymer FETs.[5,6] This dipolar disorder originates from Fröhlich

Chapter 4

61

polarons, which are caused by the interaction of the charges with induced dipole

moments and polarization of the dielectric, as demonstrated in Figure 4.1 (a).

With increasing the dielectric constant of gate insulators, strong polaronic

interaction can be responsible for the increased disorder and carrier activation

energy in FETs.[5,6] In agreement with this, Morpurgo et al., found that the polaron

binding energy increases with increasing the dielectric constant of gate

insulators.[4] These polaronic interaction and increased disorder also explain the

origin of the reduced charge carrier mobility in some reported high-k gated

organic semiconductor FETs.[4,6]

Figure 4.1 (a) Formation of polaron (black circle) due to the interaction between charges

and dielectric polarization at the semiconductor/insulator interface. (b) Configuration of

FETs with given chemical structures of polymer dielectrics.

To understand the nature of trap DOS in PbS QD-FETs with increased gate

dielectric constant, a series of polymeric insulators with dielectric constant

ranging from 2 till 41 were utilized. The polymer insulators were used in a bottom-

contact top-gate structure of FETs as shown in Figure 4.1 (b). In addition, the used

polymers are hydroxyl-group free, which allow excluding the effect of the interface

traps due to dangling bonds on the dielectric surface. The interface traps given by

these chemical groups have been known to influence the properties of the devices,

as mentioned in the previous chapters, which may affect the analysis of results.[7]

For this reason, we did not perform analysis on the charge accumulation using

bottom SiO2 gating. Furthermore, the bottom surface of the PbS films might have

CF2

CFCF

O O

CF2

CF2

n

H2C C

C

O

CH3

O

CH3

n

Cytop PMMA

F F

F F

F CF3

a b

PVDF-HFP

PVDF-trFE-CFE

C

F F

C

H H

C

F F

C

F Ha b

C

F Cl

C

F Fc

Al

PbSAu

SiO2

n-Si

(b)

(a)

e e e

e e e

+

-

+

-

+

-

+

-

+

-

+

-

+

-

+

-

+

-

+

-

+

-

+

-

+

-+

-

+

-

+

-

+

-

+

-

+

-

+

-

+

-

+

-

+

-


62

different properties with respect to the top surface, which may influence our

analysis.

4.3 PbS QD-FETs with polymer insulator gating

4.3.1 Characteristics of polymer insulators

As a first step to study the device properties, the characterization of the

polymer insulator films including the film thickness (d) and the capacitance (C)

was performed. The data of the film thickness and capacitance are presented in

Table 4.1. The film thickness was characterized by using a Dektak Profilometer

whereas the capacitance was measured by using Electrical Impedance

Spectroscopy (EIS). To measure the film capacitance, a metal insulator metal

(MIM) structure was used by sandwiching the polymer films with indium tin oxide

(ITO)-coated glass substrates and thermally-evaporated thin aluminum (Al) layer.

The dielectric constant (k) of the polymer insulator films was extracted using a

standard parallel plate capacitor model. In Table 4.1, the terpolymer (PVDF-trFE-

CFE) shows the highest dielectric constant among others with capacitance as high

as 0.126 µF/cm2, which enables to induce high carrier density in the devices.

Table 4.1 The characteristics of polymer insulator films.

Polymer Thickness

(nm)

Capacitance

(nF/cm2)

Dielectric

constant

Cytop 650 2.7 2

PMMA 468 6.5 2.6

PVDF-HFP 308 26 10.5

PVDF-trFE-CFE 257 126 40.5

4.3.2 Electrical properties of FETs

The Ids-Vg transfer characteristics in the linear and semi-logarithmic scale of

the devices gated with different polymer insulators are shown in Figure 4.2.

Generally, the devices show normally-off operation and good current modulation

in the n-channel operation with on/off ratio of 104-105. In the p-channel operation,

a small hole current is observed which indicates the ambipolarity of the devices.

However, because of the weak hole current, the analysis on this study is focused

on the n-channel operation of the devices. With increasing the dielectric constant

of the polymer insulators, the on-current of the devices significantly increases. In

addition, it is obvious that, with the use of high-k polymer insulators, the

Chapter 4

63

operation voltage of the devices is reduced. The operation voltage can be further

suppressed by optimizing the film thickness of the high-k insulators. Moreover,

the devices show also some hysteresis in the transfer characteristics as shown in

Figure 4.2. From the measurements, the devices employing high-k insulators

show less hysteresis than those with low-k insulators (Cytop and PMMA).

Figure 4.2 Ids-Vg transfer characteristics of the devices with (a) Cytop, (b) PMMA, (c)

PVDF-HFP, and (d) PVDF-trFE-CFE polymer gate dielectrics.

Table 4.2 Mobility and trap density in the devices with several gate insulators.

Polymer Mobility (cm2V-1s-1) Trap density

(1012 cm-2eV-1) similar n high Vg

Cytop 0.12 0.12 1.3

PMMA 0.11 0.11 5.3

PVDF-HFP 0.09 0.14 9.2

PVDF-trFE-CFE 0.05 0.15 17

The average electron linear mobility in the devices using Cytop is 0.12 cm2V-

1s-1 at the highest applied gate voltage as given in Table 4.2. With this low-k

-20 0 20 40 6010

-10

10-9

10-8

10-7

10-6

10-5

Dra

in C

urr

ent

(A)

Cytop

Gate Voltage (V)

Dra

in C

urr

ent

(A

)

Vds=5 V

0

5

10

15

20

-20 0 20 40 60 8010

-9

10-8

10-7

10-6

10-5

10-4

Dra

in C

urr

ent

(A)

PMMA

Gate Voltage (V)

Dra

in C

urr

ent

( A

)

Vds=5 V

0

10

20

30

40

50

-10 0 10 20 3010

-9

10-8

10-7

10-6

10-5

10-4

0

20

40

60

Dra

in C

urr

ent

(A)

PVDF-HFP

Gate Voltage (V)

Dra

in C

urr

ent

(A

)

Vds=2 V

0 4 8 12 1610

-10

10-9

10-8

10-7

10-6

10-5

10-4

0

40

80

120

Dra

in C

urr

ent

(A)

PVDF-trfE-CFE

Gate Voltage (V)D

rain

Curr

ent

( A

)

Vds=2 V

(d)(c)

(b)(a)


64

insulator, we are only able to accumulate charge carrier concentration up to 4.7 x

1011 cm-2. By using high-k PVDF-trFE-CFE insulator, the carrier concentration can

be improved by one order of magnitude (4.6 x 1012 cm-2) at relatively low gate

voltage (15 V). In PbS QDs, carrier traps mainly come from dangling bonds on the

QD surfaces, which have strong influence on the charge carrier transport.[8–12] In

contrast to organic semiconductor FETs, the increase of carrier density in PbS

QD-FETs is expected to have great impact on charge carrier mobility particularly

due to the filling of the surface traps.[13–15] However, no significant change in the

charge carrier mobility is observed with this increased carrier density, as given in

Table 4.2. Using PVDF-trFE-CFE insulator, the average mobility is estimated to

be 0.15 cm2V-1s-1 at maximum applied gate voltage, which is only a few percent

higher than that measured with Cytop gating. Furthermore, a reduction in the

carrier mobility with the high-k dielectrics is even observed when comparing the

mobility values at similar carrier density (~4.2 x 1011 cm-2). At this point, different

phenomena are occurring when high-k dielectrics are used. The increase of

interface disorder in the devices with high-k dielectric gating, which suppresses

carrier transport, may be evoked.

4.4 Electronic structures of traps with high-k

4.4.1 Density of traps in subthreshold regime

To further investigate the reduced charge carrier mobility when comparing

the devices at similar carrier density, the number of traps (Ntraps) in the devices is

estimated using the subthreshold swing formula as given in equation 1.14. From

our measurements in Figure 4.2, it is obvious that the subthreshold swing

decreases with increasing the gate dielectric constant as expected from,[16,17]

i

trapsB

C

Ne

e

TkSS

2

110ln

(4.1)

where kB, T, and e are Boltzmann constant, temperature, and elementary charge

constant, respectively. However, if the subthreshold swing is analyzed in more

detail, the actual values do not decrease as fast as we would expect when

considering the effect only of the dielectric, meaning that an additional effect

comes into play at higher dielectric permittivity. The only unknown parameter in

equation (4.1) is the number of traps, which might increase due to an increase of

the dielectric permittivity. Figure 4.3 presents the number of electron traps

(Ntraps) extracted from subthreshold regime using equation 1.14. It is obvious that

the number of electron traps in the devices increases with increasing the dielectric

constant of gate insulators. In the devices with Cytop gating, the number of

electron traps is as low as 1.28 x 1012 cm-2eV-1, which is comparable to a previous

Chapter 4

65

report.[7] At increased gate dielectric constant with the use of PVDF-trFE-CFE

terpolymer, a significant increase in the electron traps by one order of magnitude

(1.82 x 1013 cm-2eV-1) is observed. These increased carrier traps can explain the

reduction in the mobility when comparing the mobility values at similar carrier

density. In addition, this result can also be responsible for the mobility

characteristics at maximum applied gate voltages with the high-k dielectrics.

Furthermore, the increase of carrier traps and the mobility characteristics in the

devices with the high-k dielectrics are an indication of the existence of polaronic-

related interaction at the semiconductor/insulator interface, as observed in

organic semiconductor FETs.[4–6]

Figure 4.3 The number of electron traps in the devices as a function of dielectric constant

extracted from subthreshold regime. The inset displays the number of traps in semi-

logarithmic scale.

4.4.2 Distribution of trap DOS

To have further understanding on the nature of the trap DOS in the devices

with increasing the dielectric constant of polymers, we performed a computer

simulation on the Ids-Vg transfer characteristics of the fabricated devices. The

simulation is performed by solving the drift-diffusion and Poisson equation on the

Ids-Vg transfer characteristics of the devices following a numerical model

developed by Oberhoff et al.[18] This simulator is based on general principles and

can be applied to study a wide range of semiconducting materials. Although the

subthreshold swing equation (4.1) can estimate the number of carrier traps in the

devices, it can only quantify the traps at a certain energy level in the subthreshold

0 10 20 30 40

0

6

12

18

24

Ntr

aps (

10

12 c

m-2eV

-1)

Dielectric Constant

0 20 4010

12

1013

Ntr

aps (

cm

-2eV

-1)


66

regime, whereas the simulation can analyze the number of traps in a broad energy

range.[19–22] Furthermore, this simulation can explain the origin of a significant

improvement of the charge carrier mobility in PbS QD-FETs with hydroxyl-free

dielectric gating as previously mentioned in chapter 3.[7]

(a)

(b)

-0.4 -0.3 -0.2 -0.1 0.0

1018

1019

1020

1021

CFE (=41)

PVDF-HFP (=11)PMMA (=2.6)

Tra

p D

OS

(cm

-3eV

-1)

Energy below LUMO (eV)

Cytop (=2)

Figure 4.4 (a) Distribution of trap density of states (trap DOS) close to LUMO in the devices

with different dielectric constants of gate insulators. (b) Schematic of broadening of tail

trap states with increasing gate dielectric constant where the transport level corresponds

to the LUMO of QDs.

Figure 4.4 (a) shows the analyzed density of trap states close to the LUMO

level in the devices, fabricated with different polymer gate dielectrics. In

agreement to the result in Figure 4.3, an increase of the carrier traps over a wide

energy range close to the LUMO energy (electron traps) is also observed with

increasing the dielectric constant of gate insulator. The analyzed density of trap

Chapter 4

67

states is about 0.4 eV below the transport level (LUMO) of the charge carriers. As

PbS QD-FET devices show slight ambipolar characteristics, the analysis of the

traps is limited to this energy level to minimize the error due to the minority

charge carriers (holes), which may exist close to the off-state of the devices. In

addition to the increase of the trap DOS, the broadening of the trap DOS with

increasing the gate dielectric constant is also observed as displayed in Figure 4.4

(a). The schematic of the broadening of the trap DOS with high-k dielectrics is

shown in Figure 4.4 (b). The origin of the increase and of the broadening is most

likely a consequence of the polaronic interaction at the semiconductor/dielectric

interface which modifies the already-present disorder. This analysis is supported

by the fact that the polaron relaxation has great impact on the density of states in

polymer semiconductor FETs employing gate insulator with dielectric constant

(k) > 3, as confirmed by charge-modulation spectroscopy (CMS).[5,6] These results

confirm that the polaronic interaction at the semiconductor/insulator interface

also has important effects on the behavior of PbS QD-FETs.

Finally, as we analyze the extracted mobility and the calculated trap DOS,

the increase of charge trapping is expected to greatly suppress carrier transport,

thus charge carrier mobility, in the devices. In line with this, the mobility

decreases with increasing the dielectric constant of the gate insulators when we

compare the mobility values at similar carrier density as displayed in Table 4.2.

Meanwhile, at respective maximum applied gate voltages with different dielectrics,

the mobility slightly increases with increasing the gate dielectric constant (see

Table 4.2). In contrast to these results, the mobility in organic semiconductor

FETs monotonically decreases with increasing the dielectric constant of gate

insulators at all range of the applied gate voltages.[4] To understand these results,

we propose that the interplay between charge trapping and trap filling process

might take place in the devices. With increasing the dielectric constant of gate

insulators, the increased carrier density is expected to fill the traps in the devices.

Meanwhile, because the polaron-induced traps are increased at the same time,

many gate-induced charge carriers are used to fill the trap states. Therefore, the

effective free carriers with the high-k dielectrics will be only slightly higher than

in the devices with Cytop, leading to a small improvement of the charge carrier

mobility. Another possible explanation for the less affected charge carrier mobility

than in organic transistors at high gate voltage is a large separation between

polaron and the accumulated charge carriers in PbS QDs. In PbS QD-FETs, the

top surface of the dielectrics is separated by the crosslinking EDT ligands which

have length about 0.4 nm, while the radius of QDs is around 1.8 nm. As the

accumulation of charge carriers in PbS QDs is assumed to be in the center of mass

of the QDs, therefore, the total separation distance between polaron and the

accumulated charge carriers is around 2.2 nm. Moreover, some residual oleic acid

ligands on the bottom side of QDs may also exist which can increase the


68

separation distance. This larger polaron separation distance than in the case of

polymer semiconductors (~0.3 nm) may minimize the effect of polaron on charge

carrier mobility in our devices.[5,6] However, despite the large polaron separation

distance, the trap states are still greatly influenced by the polaronic interaction.

Nevertheless, the charge carrier mobility at all range of the applied gate voltages

is expected to be greatly affected by the polaronic interaction at low temperature.

4.5 Conclusion

We have performed a study on the analysis of the trap DOS in PbS QD-FETs

employing several high-k polymer gate insulators. With increasing the gate

dielectric constant, we observed the increase of the electron traps in the devices

as extracted from subthreshold regime. By using a computer simulation, we

further analyzed the detailed distribution of trap DOS in the devices close to the

LUMO level of PbS QDs. We found a general broadening of the trap DOS which is

attributed to the increased disorder due to polaronic-related interactions at the

semiconductor/dielectric interface. While the increased trap states effectively

influence the mobility compared at similar carrier density, the extracted mobility

at maximum applied gate voltages was not significantly affected by the polaronic

interaction which is likely due to the interplay between trap filling and increased

charge trapping as well as the large separation distance between polarons and free

carriers in PbS QDs. Our results clearly show that by careful choice of dielectrics,

PbS QD FETs with low operating voltage can be built without reducing the charge

carrier mobility, which is a fundamental insight to further utilize colloidal QD

systems in optoelectronic applications.

4.6 Methods

Device fabrication. The deposition of PbS semiconducting thin films was

performed by spin-coating 10 mg/mL of oleic acid-capped PbS solution in

chloroform on SiO2/Si substrates. To improve the film conductivity, we exchanged

the long oleic acid ligands with shorter molecules, namely 1,2 ethanedithiol (EDT).

The concentration of the EDT solution was 1%v/v with acetonitrile as a solvent.

The deposition of the PbS thin films, as well as, the ligand exchange, was

performed using a layer-by-layer (LbL) spin-coating procedure. After each ligand

exchange, pure acetonitrile was dropped on the films to remove unbound EDT

and native oleic acid ligands. The PbS layer deposition and the ligand exchange

were repeated for 5 times until desired thickness was reached. After the deposition,

the devices were annealed at 120oC for 20 min to remove residual solvent and to

promote coupling between QDs, thus improving the conductivity without

sintering the QDs. As gate dielectrics, we used four different polymer insulators

Chapter 4

69

namely Cytop, polymethylmethacrylate (PMMA), polyvinylidene fluoride

hexafluoro-propylene (PVDF-HFP), and polyvinylidene fluoride-

trifluoroethylene-chlorofluoroethylene (PVDF-trFE-CFE). In this study, pure

Cytop (CT-809M) was used without further dilution. PMMA was dissolved in

ethyl acetate with concentration of 80 mg/mL. To prepare PVDF-HFP solutions,

we dissolved the polymer in dimethylformamide (80 mg/mL). The last dielectric,

PVDF-trFE-CFE, was dissolved in cyclohexanone to form a solution with

concentration of 60 mg/mL. All these polymers, were used to vary the dielectric

constant of the gate insulators in the devices in the range between 2 and 41. The

deposition of the polymer insulators was done by using spin-coating on the

previously-deposited active layer of PbS QDs. The devices were then annealed at

95oC for 1 h to remove residual solvent. Finally, a thin layer of aluminum (50 nm)

was evaporated as top gate electrode. All device fabrication was performed in an

N2-filled glove box.

FET electrical characteristic measurements. The electrical

characteristics of FETs were measured using an electrical probe station (placed in

an N2-filled glove box) that is connected to an Agilent B1500A semiconductor

parameter analyzer.


70

4.7 References

[1] J.-H. Choi, H. Wang, S. J. Oh, T. Paik, P. Sung, J. Sung, X. Ye, T. Zhao, B. T. Diroll,

C. B. Murray, C. R. Kagan, Science. 2016, 352, 205.

[2] C.-Y. Wang, C. Fuentes-Hernandez, J.-C. Liu, A. Dindar, S. Choi, J. P. Youngblood,

R. J. Moon, B. Kippelen, ACS Appl. Mater. Interfaces 2015, 7, 4804.

[3] J. Zaumseil, H. Sirringhaus, Chem. Rev. 2007, 107, 1296.

[4] I. N. Hulea, S. Fratini, H. Xie, C. L. Mulder, N. N. Iossad, G. Rastelli, S. Ciuchi, A. F.

Morpurgo, Nat. Mater. 2006, 5, 982.

[5] N. Zhao, Y.-Y. Noh, J.-F. Chang, M. Heeney, I. McCulloch, H. Sirringhaus, Adv.

Mater. 2009, 21, 3759.

[6] H. Sirringhaus, M. Bird, N. Zhao, Adv. Mater. 2010, 22, 3893.



[8] D. V Talapin, C. B. Murray, Science 2005, 310, 86.

[9] L.-H. Lai, L. Protesescu, M. V Kovalenko, M. A. Loi, Phys. Chem. Chem. Phys.

2014, 16, 736.






[13] S. Z. Bisri, C. Piliego, J. Gao, M. A. Loi, Adv. Mater. 2014, 26, 1176.




[16] B. Blülle, R. Häusermann, B. Batlogg, Phys. Rev. Appl. 2014, 1, 1.

[17] M. I. Nugraha, H. Matsui, S. Z. Bisri, M. Sytnyk, W. Heiss, M. A. Loi, J. Takeya, APL

Mater. 2016, 4, 116105.



[19] W. L. Kalb, B. Batlogg, Phys. Rev. B 2010, 81, 35327.

[20] K. Willa, R. Häusermann, T. Mathis, A. Facchetti, Z. Chen, B. Batlogg, J. Appl. Phys.

2013, 113, 133707.

[21] W. L. Kalb, S. Haas, C. Krellner, T. Mathis, B. Batlogg, Phys. Rev. B 2010, 81,

155315.

[22] R. Häusermann, B. Batlogg, Appl. Phys. Lett. 2011, 99, 83303.

71

Chapter 5

Enabling Ambipolar to Heavy n-

type Transport in PbS Quantum

Dot Solids through Doping with

Organic Molecules

This chapter discusses doping of PbS quantum dot (QD) films using benzyl

viologen (BV) donor molecules. By engineering the energy level of the dopant

and the PbS QDs through the use of particular capping ligands, the electrical

characteristics of PbS QD field-effect transistors (FETs) can be tuned from

ambipolar to strongly n-type. The doping significantly improves the charge

carrier mobility by one order of magnitude to 0.64 cm2V-1s-1 as revealed from

four terminal conductivity measurements. In addition, the doping also reduces

the contact resistance of the devices and assists the filling of carrier traps, which

can explain the origin of the increased mobility.

M. I. Nugraha, S. Kumagai, S. Watanabe, M. Sytnyk, W. Heiss, M. A, Loi,

J. Takeya, ACS. Appl. Mater. Interfaces 2017, Article ASAP.


72

5.1 Introduction

PbS colloidal quantum dots (QDs) have been shown to be promising as

semiconducting building blocks for optoelectronic devices, such as solar cells,[1–6]

photodetectors,[7–10] and light-emitting devices.[11–13] This class of materials gives

the possibility to fabricate electronic devices using solution processable methods

such as blade-coating, dip-coating, printing, and roll-to-roll processes.[14–19]

Recently, many efforts have been devoted to exploit PbS QDs as active material

for field-effect transistors (FETs).[16,17,20,21] The fabrication of FETs offers the

possibility to integrate them in more advanced electronic devices such as

complementary metal oxide semiconductor (CMOS) devices - like inverters,

integrated logic circuits, radio frequency identification (RFID) systems, etc.[22,23]

Their use in FETs, however, is still challenging because they suffer from low

charge carrier mobility due to the high number of carrier traps on their surface.

Therefore, improving charge carrier mobility in FETs based on PbS QDs is crucial

to enhance their potential for diverse applications.

Doping is an effective tool to improve charge carrier mobility in

semiconductors.[23–26] Although PbS QDs are n-type on the basis of their

stoichiometry,[4,21,27] many published studies show strategies to turn them into p-

type semiconductors.[28,29] The p-type doping is mainly achieved by exposing

samples to air, which gives rise to a significant increase of the hole mobility and

density in the films.[28,29] A better control was achieved by evaporation of sulphur

and selenium, or acting on the surface of the QDs with specific ligands.[4,21,30] On

the other hand, studies on heavy n-type doping of PbS QD films are still limited.

The energy offset often built at the interface of semiconductor and dopant is

responsible for inefficient electron transfer from the HOMO of the dopant to the

LUMO of the semiconductor.[31] Recently, benzyl viologen (BV) has been reported

as a promising n-type dopant for the carbon nanotubes and MoS2 systems.[25,32]

Due to its shallow HOMO level, BV molecule treatment induces carrier doping in

samples which favours electron transfer to the semiconducting films. To date, the

use of BV as n-type dopant in PbS QD films has not been investigated yet. This

leaves a question on the possibility to use BV for obtaining strong n-type doping

of the PbS films and improving the performance of FET devices based on these

QDs.

In this chapter, we report a strategy for doping PbS quantum dot solids using

BV as the donor molecules. By combining the use of BV with engineering of the

quantum dot energy levels through the use of several capping ligands, we are able

to effectively tune the electrical properties of PbS QD-FETs from ambipolar to

heavily n-type. With this BV treatment, we improved the electron mobility by one

order of magnitude and we reduced the contact resistance down to 0.77 kΩcm.

Furthermore, the four-terminal (4T) conductivity transistor measurements

Chapter 5

73

confirmed the efficient doping of PbS QD films after BV treatment leading to

electron mobility as high as 0.64 cm2V-1s-1, the highest value reported for the low-

temperature processed PbS QD-FETs employing SiO2 as a gate dielectric.

5.2 Doping strategy using Benzyl Viologen (BV)

The successful doping of a semiconductor device is determined by the

effective charge transfer from the dopant molecules to the semiconducting films

or vice versa. Several methods have been used to introduce efficient doping of QD

films including mixing a solution of dopants and QDs prior to film deposition,

infiltrating a semi-metallic material into the active channels, and dipping the

deposited semiconducting films into the dopant solution.[22,31,33,34] Among others,

the dipping method has been shown to enable highly efficient optoelectronic

devices fabricated with heavily-doped PbS QD films.[34] Furthermore, this method

has also been used on a broad range of semiconductors leading to significant

increase of the film conductivity in the fabricated transistors.[25,32,35–36]

To heavily dope the PbS QD films, we treated the semiconducting films with

BV donor molecules, which have a redox potential of -0.79 V (BV0/BV+) relative

to standard hydrogen electrode (SHE).[25,32] This redox potential corresponds to a

HOMO level of -3.65 eV with respect to the vacuum level. Kiriya et al. reported

that the BV molecules have a second redox potential after releasing an electron,

which results in the BV+ state.[25] In this state, the redox potential (BV+/BV2+)

turns to -0.33 V relative to SHE, which corresponds to a HOMO level of -4.11 eV

with respect to the vacuum level. The chemical structure of BV is shown in Figure

5.1 (a). In this study, doping of PbS films is done by dipping the deposited films

into the BV solution for a specific time. The configuration of the BV-treated PbS

QD-FETs is displayed in Figure 5.1 (b). To promote the transport of electrons from

the dopant to the semiconductor, the LUMO level of the PbS films should be

deeper than the HOMO level of the dopant. Recently, it has been reported that the

HOMO/LUMO level of PbS QDs is strongly influenced by the cross-linking

ligands.[37] Therefore, by varying the ligands, we are able to potentially tune the

doping strength of the PbS QD films. Here, we use three kinds of ligands, namely

3-mercaptopropionic acid (3MPA), tetrabuthylammonium iodide (TBAI), and

methylammonium iodide (MAI). The chemical structures of the ligands are shown

in Figure 5.1 (a). These ligands have been reported to enable good performing FET

devices based on PbS QDs.[12,14,28] By crosslinking PbS QDs with 3MPA ligands,

the LUMO level of the materials is estimated to be around –3.6 and –3.7 eV, which

are quite close to the HOMO level of BV.[37] With this energy level offset, some

electrons are inefficiently transferred from BV to PbS films as shown in the

schematics of Figure 5.1 (c). After releasing an electron, the BV0 turns to BV+ state

which has HOMO of -4.11 eV. This HOMO value is significantly deeper than the


74

LUMO of 3MPA-capped PbS films, which blocks electron transfer from BV+ to

PbS, leading to an inefficient n-type doping of the PbS films after the BV layer

deposition. This unfavourable energy offset could also explain the previously-

reported inefficient n-type doping of lead chalcogenide films with cobaltocene.[31]

With cobaltocene doping, the transport of charge carriers turns to n-type from

ambipolar with a reduced current.

Other types of ligands, such as TBAI and MAI have been reported to result

in a deep LUMO level for PbS QDs. The reported LUMO level using this class of

ligands is as deep as –4.4 eV.[37] This LUMO level is importantly deeper than both

the HOMO levels of BV0 and of BV+. Therefore, it opens the possibility to

successfully obtain n-type doping in PbS QD films.

(b)

(c)

(a)

O

OHHS N+H3C

H

H

HI-

BV

3MPA

TBAI

MAI

N+

H3C CH3

I-

H3C CH3

-3.6 eV

HOMO

PbS(3MPA)

BV

e-X

-4.4 eV

PbS(TBAI,MAI)

BV

e--3.65 eV (BV0/BV+)

-4.11 eV (BV+/BV2+)e-X e-

HOMO

Figure 5.1 (a) Chemical structure of the BV molecules and the capping ligands used in this

study; (b) device structure, and (c) schematic of the electron transfer mechanism from BV

to PbS QDs with different capping ligands. After transferring an electron, BV0 (black) turns

to BV+ state (orange) with deeper HOMO level.

5.3 Electrical characteristics of BV-doped PbS QD-FETs

The transfer characteristics of the pristine devices (before BV doping

treatment) with different capping ligands are shown in Figure 5.2 (a)–(c).

Obviously, the devices show ambipolar properties with more electron-dominated

transport using all the three ligands. A pronounced difference is observed in the

threshold voltages (Vth) of the devices. The devices with iodide ligands clearly

show lower Vth than those with 3MPA ligands, which indicates a good passivation

against carrier traps on the QD surfaces. The lower number of carrier traps in the

PbS QD films with iodide ligands than those with 3MPA is also demonstrated by

steeper transfer characteristics of the devices in the semi logarithmic scale as

Chapter 5

75

displayed in Figure 5.2 (a)–(c). Meanwhile, in the p-channel characteristics, we

also observe a slight hole current. However, in this study, we limit our analysis to

the n-type transport because the hole current is much weaker than the electron

current.

d

0 40 8010

-10

10-9

10-8

10-7

10-6

10-5

Dra

in C

urr

ent

( A

)

Gate Voltage (V)

Dra

in C

urr

ent

(A)

Vds

=5 V3MPA undoped

0

1

2

3

4a

0 40 8010

-11

10-10

10-9

10-8

10-7

10-6

10-5

TBAI undoped

Dra

in C

urr

ent

(A

)

Gate Voltage (V)D

rain

Curr

ent

(A)

Vds

=5 V

0

2

4

6

8

10(a) (b)

f

0 40 8010

-10

10-9

10-8

10-7

10-6

10-5

10-4

0

5

10

15

20

MAI undoped

Dra

in C

urr

ent

( A

)

Vds

=5 V

Gate Voltage (V)

Dra

in C

urr

ent

(A)

c(c)

Figure 5.2 The transfer characteristics of the pristine devices with (a) 3MPA, (b) TBAI, and

(c) MAI ligands.

TABLE 5.1 Electrical properties of PbS FETs with different capping ligands before and after

BV treatment.

Ligands 2T Mobility (cm2V-1s-1) Vth (V) Doping

concentration

(cm-2) Pristine BV-treated Pristine BV-treated

3MPA 2.6 x 10-3 5.1 x 10-3 36 18.8 1.6 x 1012

TBAI 5.3 x 10-3 1.4 x 10-2 16.5 -17.1 3.2 x 1012

MAI 0.03 0.32 12.2 -35 4.4 x 1012

The extracted electron linear mobility, μ, in the pristine devices with

different capping ligands is shown in Table 5.1. Obviously, the devices with MAI

ligands show the highest μ among the other capping ligands, which is comparable

to a previous report.[14] The lower μ in the devices with TBAI respect to the MAI


76

ones is attributed to the presence of remaining oleic acid ligands on the PbS QD

surface which suppresses charge transport within the QD films. The remaining

oleic acid is a result of the poor reactivity of TBAI in the ligand exchange process,

due to non-acidity of the cation of TBAI ligands.[14]

-80 -40 0 40 80

10-6

10-5

10-4

10-3

0.0

0.2

0.4

0.6

MAI doped

Dra

in C

urr

ent

(mA

)

Vds

=5 V

Gate Voltage (V)

Dra

in C

urr

ent

(A)

f

-80 -40 0 40 8010

-9

10-8

10-7

10-6

10-5

10-4

TBAI doped

Dra

in C

urr

ent

(A

)

Gate Voltage (V)D

rain

Curr

ent

(A)

Vds

=5 V

0

20

40

60(b)

-80 -40 0 40 80

10-10

10-9

10-8

10-7

10-6

10-5

0

2

4

6

8

3MPA doped

Dra

in C

urr

ent

(A

)

Vds

=5 V

Gate Voltage (V)

Dra

in C

urr

ent

(A)

d

(c)

(a)

Figure 5.3 The transfer characteristics of the devices after BV doping treatment with (a)

3MPA, (b) TBAI, and (c) MAI ligands.

The transfer characteristics of the devices after BV treatment are shown in

Figure 5.3 (a)–(c). In the devices with 3MPA ligands, we observe that the devices

still show ambipolar characteristics with a slight increase of the source–drain

current (Ids) even after BV doping treatment, as shown in Figure 5.3 (a). The

unaffected ambipolar properties are explained by our previous hypothesis that an

unfavourable offset between the HOMO level of BV and the LUMO level of 3MPA-

crosslinked PbS QDs leads to a blockade of the electron transfer from the BV layer

to the PbS films. Nevertheless, some weak electron transfer from the BV0 HOMO

to the PbS LUMO may result in a shifting of the transfer characteristics to a

negative direction, indicating the presence of a certain level of n-type doping.

Instead, with TBAI and MAI ligands that enable the shift of the LUMO level of

PbS QDs, we observe that the device characteristics turn to heavily n-type from

ambipolar after BV doping treatment, as displayed in Figure 5.3 (b)–(c). In

addition, the devices show a normally “on” operation as indicated by the transfer

Chapter 5

77

characteristics in linear scale, which demonstrates the strong electron doping of

the active material.

Figure 5.4 Comparison of on-current of the devices before and after BV doping treatment.

By analysing the transfer characteristics further, the devices with MAI

ligands show the highest on-current after BV treatment among the other ligands

as given in Figure 5.4. The on-current in the MAI-capped PbS FET devices is

improved by more than one order of magnitude, whereas an improvement by only

a factor of six is observed in the 3MPA-crosslinked devices after BV treatment.

The extracted linear μ in all of the fabricated devices with different ligands before

and after BV treatment is shown in Table 5.1. In the devices capped with 3MPA

ligands, the μ is improved only by a factor of two. Importantly, a significant

improvement in the μ (the maximum μ is 0.45 cm2V-1s-1; the average μ is 0.32

cm2V-1s-1) is observed in the devices with MAI ligands after treatment with BV,

indicating a more efficient doping with respect to the case of PbS decorated by the

other ligands. The devices with TBAI, which are suggested to have a doping

mechanism similar to that of MAI, have a lower increase of the μ than that of the

devices with MAI. This result can be associated to the more effective removal of

oleic acid ligands with MAI than that with TBAI due to the acidity of the

methylammonium cation.[15] In addition, among the other ligands, we observe

that the BV doping treatment reduces the bias stress in devices with MAI ligands.

This result is supported by the smaller hysteresis observed in devices with MAI

after BV treatment with respect to the ones treated with the other ligands, as

10-6

10-5

10-4

10-3

MAITBAI

undopeddoped

on-c

urr

ent

(A)

Ligands3MPA


78

shown in Figure 5.3 (c). Therefore, the proper choice of ligands combined with the

use of BV results in n-type doping and more stable PbS QD transistors.

Figure 5.5 Threshold voltages of the devices before and after BV doping treatment.

We are then interested in estimating the doping concentration in devices

after BV treatment. The doping concentration in FETs can be calculated by

measuring the difference in Vth before and after doping (ndoping=CiΔVth/e) using

equation (1.6). The Vth values of the devices with different capping ligands are

given in Table 5.1. All devices show n-type doping, indicated by the shifting of Vth

into the negative direction as is displayed in Figure 5.5. The doping concentration

in all fabricated devices is shown in Table 5.1. The highest doping concentration

is achieved in the devices with MAI ligands after BV treatment and is estimated to

be about 4.4 1012 cm–2, which is comparable to the accumulated charge carriers

induced by the gate voltage (4.3 1012 cm–2 at Vg = 60 V). This high doping

concentration can be the origin of the significant increase of the electron mobility

in the devices with MAI, as it allows a more efficient filling of carrier traps. It is

also worth noting that the doping concentration in the TBAI-capped devices is

quite close to the one obtained in the MAI-capped devices. However, the degree

of mobility improvement is remarkably different: in the MAI-capped devices, the

μ is higher by one order of magnitude after BV doping treatment, whereas it is

only a factor of two in the TBAI-capped devices. Although the doping

concentration is quite close in the devices with both iodide ligands after BV

treatment, some remaining oleic acid ligands on the PbS surfaces due to the

incomplete removal of the native oleic acids with TBAI ligands might supress the

charge transport between neighbouring QDs, as previously suggested.[14]

-60

-30

0

30

60

MAITBAI

undopeddoped

Thre

shold

Voltage (

V)

Ligands3MPA

b

Chapter 5

79

0 20 40 600

1

2

3

4

5D

rain

Curr

ent

(mA

)

Drain Voltage (V)

Vg=-40;-20;...;60 V

(a) (b)

0 5 10 15 200

6

12

18

RC

hW

(k

cm

)

Channel Length (m)

Vg=60 V

0 5 10 15 200.0

0.4

0.8

1.2

RC

hW

(M

cm

)

L (m)

7.7 kcm

Figure 5.6 (a) Output characteristics and (b) channel resistances of the BV-doped devices.

The inset shows the channel resistances of the pristine devices.

At this point, it is also interesting to measure the contact resistance (Rc) of

the devices after BV treatment. Since the devices with MAI ligands show the most

efficient n-type doping, we choose these systems for our next investigation. At a

first sight, we did not observe a contact-limited transport in the output

characteristics of the devices at low Vds as shown in Figure 5.6 (a), suggesting low

Rc in these devices. To estimate Rc, we fabricated FET devices to apply

transmission-line method (TLM) with channel lengths of 2.5, 5, 10 and 20 μm.

The measured channel resistance dependent on the channel length is shown in

Figure 5.6 (b). The Rc is estimated from the intercept of the curve at the y-axis

(zero channel length). With the BV doping treatment, the extracted contact

resistance (normalized by W; RcW) of the devices is 0.77 kΩcm, one order of

magnitude lower than in the pristine devices as displayed in the inset of Figure

5.6 (b). This low Rc can also have a great impact on the improvement of the charge

carrier mobility in the devices. It is expected that further improvement of the

charge carrier mobility can be achieved by reducing the contact resistance; for

instance, by the use of other metals with shallow work function, for the fabrication

of source and drain electrodes.

5.4 4-terminal conductivity of BV-doped PbS QD-FETs

We then performed 4-terminal conductivity measurements to investigate the

charge carrier mobility, μ in our devices. With these measurements, we are able

to exclude the effect of contact resistance, which can limit the charge transport in

the PbS FETs. The configuration of the devices for 4-terminal conductivity

measurements is displayed in Figure 5.7 (a). In order to measure the 4-terminal

voltage properly, we performed laser-etching treatment on the PbS films as


80

displayed in the schematic of Figure 5.7 (a). L and W of the 4-terminal transistor

are 150 μm and 30 μm, respectively.

Figure 5.7 (a) Device configuration for 4T conductivity measurements. (b) 4T conductivity

characteristics of BV-doped devices.

The 4-terminal conductivity in the devices is displayed in Figure 5.7 (b) and

the mobility (μ4T) is calculated using the equation,

g

T

i

TVC

4

4

1 (5.1)

where σ4T is the 4-terminal conductivity. The maximum μ4T among the devices

with MAI ligands after BV doping is 0.64 cm2V-1s-1 (the average mobility = 0.58

cm2V-1s-1). To our knowledge, this value is the highest among the electron mobility

reported so far in PbS QD-FETs with SiO2 gate dielectric. Moreover, the high

mobility after the BV treatment can be further improved by optimizing the

interface quality of the PbS semiconducting films and the gate dielectric, for

instance by using hydroxyl-free dielectrics, as in our previous report, opening

great opportunities for the fabrication of highly performing solution processable

electronic devices with PbS QDs.[16,39]

5.5 Conclusion

We have demonstrated n-type doping of PbS QD-FETs with the use of

electron-donating BV molecules. By engineering the LUMO level of PbS

semiconducting films through the use of different capping ligands, we successfully

controlled the electrical characteristics of the PbS QD-FETs from ambipolar to

heavily n-type. In the devices with MAI ligands, we observed a significant

improvement of the electron mobility by more than one order of magnitude after

the BV doping treatment. This high mobility is associated with an effective filling

of carrier traps and a reduced contact resistance of the devices. The 4-terminal

(a)

-80 -40 0 40 800

200

400

600

4T

-conductivity (

nS

)Gate Voltage (V)

Vds

=5 V

(b)

n-Si

AuBV

SiO2

S

G

V2V1

V3 V4

D

Chapter 5

81

conductivity transistor measurements revealed mobility as high as 0.64 cm2V-1s-1

in the devices after BV treatment. These doping results open great opportunities

for the exploitation of PbS QDs as n-type materials for broad electronic and

optoelectronic applications.

5.6 Methods

Material preparation. PbS colloidal quantum dots of 3.6 nm in diameter

were synthesized following a previously reported method.[39,40] For ligand

exchange, we used three kinds of molecules, namely 3-mercaptopropionic acid

(3MPA), tetrabuthylammonium iodide (TBAI), and methylammonium iodide

(MAI). 3MPA ligand solution was prepared by dissolving 3MPA in methanol (115

mM). TBAI and MAI powders were dissolved in methanol (30 mM) to form TBAI

and MAI ligand solution, respectively. The solutions were then filtered by PTFE

filter (0.45 μm) before use.

The benzyl viologen (BV) solution was prepared according to previous

reports with some modifications for the use in glove box.[25,32] 51 mg (0.12 mmol)

of 1,1-dibenzyl-4,4-bipyridinium dichloride hydrate (TCI) was dissolved in

distilled water (4.5 mL) inside a vial. Toluene (9.0 mL) was carefully layered on

the aqueous layer, and 97 mg (2.5 mmol) of NaBH4 was added into the bilayer

system. The colourless aqueous layer immediately started to turn into deep violet

with a generation of hydrogen gas. After 12 hours, the aqueous layer turned to

colourless, and the top toluene layer became yellow. The toluene layer was

separated and dried over MgSO4, and filtered into a glass Schlenck flask. The

solvent was removed under vacuum and heating, and then dry hexane/toluene

(1:1 (v/v); 32 mL) was added into the yellow oily residue, affording a yellow

solution. The BV solution was transferred into a glove box after argon bubbling

for 15 minutes.

Device fabrication. We used SiO2/n-Si substrates with lithographically-

defined pre-patterned interdigitated Au electrodes. The thickness of the SiO2

dielectric was 230 nm. The channel length and width of the devices were 20 μm

and 1 cm, respectively. Before use, the substrates were cleaned with acetone and

isopropanol using ultrasonicator for 10 min. The substrates were then dried at

120oC for 10 min to remove residual organic solvents.

On the clean substrates, PbS films were then deposited by spin-coating the

oleic acid-stabilized PbS solution in chloroform (10 mg/mL). To improve the

conductivity of the films, the long oleic acid ligands were replaced by shorter

molecules or halide atoms. The deposition of semiconducting thin film and ligand

exchange (LE) were performed using layer-by-layer (LbL) for seven times to

ensure complete LE process. For the LE, the ligand solution was dropped onto the

previously-deposited oleic-acid capped PbS films for 30 s and then spin-casted for


82

60 s. After each LE process, pure methanol was dropped for another 30 s and then

spin-casted for 60 s to remove native oleic acid ligands. The devices were then

annealed at 120oC for 20 min to remove residual solvents and to enhance coupling

between quantum dots. The BV doping treatment was done by dipping the

previously-fabricated devices into BV solution for 3 minutes. The samples were

then dried at room temperature under argon atmosphere. All device fabrication

was done in glove box.

For the fabrication of 4-terminal (4T) FETs, we used bare SiO2/n-Si

substrates. Before use, the substrates were cleaned following the cleaning

procedure mentioned above. As source-drain electrode, thermally-grown bottom

contact Au (30 nm) with Cr (10 nm) as buffer layer was patterned using 4T

transistor shadow mask. The deposition of PbS semiconducting thin films, ligand

exchange, and BV doping treatment were done following the previously

mentioned procedures.

Electrical measurement. The electrical characteristics of the fabricated

devices were measured using an Agilent B1500A semiconductor parameter

analyser connected to a probe station in a glove box.

Chapter 5

83

5.7 References

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Takeya, M. A. Loi, Adv. Mater. 2015, 27, 2107. [17] T. P. Osedach, N. Zhao, T. L. Andrew, P. R. Brown, D. D. Wanger, D. B. Strasfeld, L.

Y. Chang, M. G. Bawendi, V. Bulović, ACS Nano 2012, 6, 3121. [18] E. H. Sargent, Nat. Photonics 2012, 6, 133. [19] J. Yang, M. K. Choi, D.-H. Kim, T. Hyeon, Adv. Mater. 2016, 28, 1176. [20] W. Koh, S. R. Saudari, A. T. Fafarman, C. R. Kagan, C. B. Murray, Nano Lett. 2011,

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Muramoto, C. B. Murray, C. R. Kagan, Nano Lett. 2014, 14, 1559. [22] F. S. Stinner, Y. Lai, D. B. Straus, B. T. Diroll, D. K. Kim, C. B. Murray, C. R. Kagan,

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Sun, J. Minor, K. W. Kemp, H. Dong, L. Rollny, A. Labelle, G. Carey, B. Sutherland, I. Hill, A. Amassian, H. Liu, J. Tang, O. M. Bakr, E. H. Sargent, Nat. Mater. 2014, 13, 822.

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[32] S. M. Kim, J. H. Jang, K. K. Kim, H. K. Park, J. J. Bae, W. J. Yu, I. H. Lee, G. Kim, D. D. Loc, U. J. Kim, E.-H. Lee, H.-J. Shin, J.-Y. Choi, Y. H. Lee, J. Am. Chem. Soc. 2009, 131, 327.

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85

Chapter 6

Strain-Modulated Charge

Transport in Flexible PbS

Quantum Dot Field-Effect

Transistors

This chapter presents a study on the effect of mechanical strain on the

charge transport properties in flexible PbS quantum dot field-effect transistors

(QD-FETs). By applying compressive strain, the mobility is improved up to 45%

at 2% strain, whereas a decrease of the mobility is observed with the application

of tensile strain. The change of the mobility in the strained devices is attributed

to the decrease/increase of the inter-QD distance due to the bending of the

capping ligands. Moreover, strain is also found to affect the carrier traps in the

devices as indicated from the modulated threshold voltages, because of the

change of inter-QD transfer integral. From the analysis of the applied strain

versus ligand length, a certain strain direction results in the activation of the

ligand chains leading to the increase of the tunnelling barrier potential in the QD

films.

M. I. Nugraha, H. Matsui, S. Watanabe, T. Kubo, R. Hausermann, S. Z. Bisri, M.

Sytnyk, W. Heiss, M. A. Loi, J. Takeya, Adv. Electron. Mater. 2017, 3, 1600360.


86

6.1 Introduction

Extensive progresses in understanding charge carrier transport in PbS

semiconducting colloidal quantum dots (QDs) have provided hope to exploit this

class of materials for low-temperature processed electronic and optoelectronic

devices. Due to their solution processability, PbS QDs are compatible with

solution processable fabrication methods such as spin-coating, dip-coating, ink-

jet printing, etc.[1–6] This solution processability, combined with low temperature

processing, opens up opportunities to use this material to fabricate electronic and

optoelectronic devices on flexible plastic substrates.[7,8]

As the active materials are deposited onto flexible substrates, bending,

folding, or stretching of the substrates is able to induce mechanical strain on the

active layer which influences the characteristics of the fabricated devices. Recently,

mechanical strain effects have been intensively investigated on organic

semiconductor thin film transistors (TFTs).[9–11] The application of compressive

strain on pentacene films has allowed improving the film conductivity and carrier

mobility in the TFT devices as a consequence of reduced molecular spacing.

Oppositely applied strain produces increased molecular spacing which leads to

the decrease of the carrier mobility.[10–13] Meanwhile, the effect of mechanical

strain on lead chalcogenide QD devices, particularly in field-effect transistors

(FETs), is still poorly investigated. As the bulk moduli of organic ligands has been

reported to be lower than the QD cores,[14,15] the introduction of mechanical strain

is expected to have a great impact on the properties of the devices, with the

potential to improve carrier mobility in this system. Therefore, the effect of strain

on the electrical properties of QD-FETs needs to be addressed to further

understand their physical properties and to strengthen the applicability of QDs

for diverse applications.

In this chapter, we report a study of the effect of mechanical strain on the

electrical characteristics of PbS FETs. As a gate dielectric, we use an ion gel, which

is able to accumulate high carrier concentration leading to electron mobility as

high as 2.1 cm2V-1s-1. Upon the application of compressive strain, we observed an

improvement in the source-drain current, which leads to an increase in the

electron mobility up to 45% at 2% strain. This improvement is associated to the

reduced barrier length between QDs due to the bending of crosslinking ligands.

In the opposite strain direction, we observed a reduction in the electron mobility

which is an indication of the increase of the QD distance. Interestingly, we found

that the change in the electron mobility is followed by the variation in the

threshold voltages of the devices depending on the direction of the strain. The

decreased threshold voltages as the compressive strain is applied can be

attributed to the increase of the transfer integral between the QD arrays, which

results in a more efficient trap filling, thus reducing carrier trapping. Meanwhile,

Chapter 6

87

the increased carrier traps can be responsible for the increase of the threshold

voltages with the application of tensile strain. Furthermore, the observed larger

effect during the application of tensile strain than that with compressive strain

can be associated to the increase of barrier potential due to the activation of one

or more ligand chains.

6.2 PbS QD-FETs on flexible substrates

To perform strain effect measurement on the PbS QD films, flexible PbS QD-

FETs were fabricated using polyethylene naphthalate (PEN) as a substrate. As

crosslinking ligands, 1,2-ethanedithiol (EDT) was used to replace the native oleic

acid ligands on the QD surfaces, which improves the conductivity of the

semiconducting films. In the devices, an ion gel derived from a mixture of the ionic

liquid: 1-hexyl-3-methyl imidazolium bis(trifluoromethanesulfonyl)imide

(HMIM-TFSI) and the gelling polymer, poly(vinylidene fluoridehexafluoro

propylene) (PVDF-HFP) was employed as the gate dielectric. This mixture allows

obtaining a solid gate dielectric film which is easy to handle and suitable for

electronic devices fabricated on plastic substrate. The ion gel is used to

accumulate high charge carrier concentration at the dielectric/semiconductor

interface, which can effectively fill the carrier traps in the QD films. As a result of

the effective trap filling, ion gel has been demonstrated as a promising gate

dielectric that enables good performing PbS QD-FETs with high electron mobility

of 2 cm2V-1s-1.[16] Figure 6.1 (a) shows the final configuration of bottom contact top

gate PbS QD-FETs fabricated on PEN substrate. In the devices, Au is used as

source, drain, and gate electrode. The flexibility of the fabricated devices is

displayed in Figure 6.1 (b).

Figure 6.1 (a) Device structure, (b) photograph of PbS QD-FETs on flexible substrate.

The transfer characteristics of the fabricated devices in pristine condition

(without applying strain) are shown in Figure 6.2 (a). The devices show a small

hysteresis (< 1.3 V) in the transfer curves, indicating that the ion gel provides good


88

protection for the devices against bias stress and an effective filling of the traps.[17]

Importantly, the devices show clear current modulation with very low operation

voltage (<2 V), which is promising for future low energy consuming solution

processable electronic devices. In addition, a weak hole current in the negative

gate voltage is also measured indicating the ambipolarity of the devices. However,

since the hole current is much lower than the electron current and quite close to

the level of the gate leakage current, the investigation of the strain effect in this

study is focused on the electron transport.

Figure 6.2 (a) Ids-Vg transfer and (b) Ids-Vds output characteristics of PbS QD-FETs with

HMIM-TFSI ion gel gating on PEN substrate.

The capacitance of the ion gel film (Ci) is as high as 2.7 µF/cm2 at 10 Hz,

allowing a very low threshold voltage of 0.9 V in the devices. The sweeping speed

used for the FET measurements was 100 mV/s. In the devices, the channel length

-0.3 0.0 0.3 0.6 0.9 1.2

0.00

0.05

0.10

0.15

Dra

in C

urr

ent

(A

)

Gate Voltage (V)

Vds

=0.2 V

(a)

0.0 0.2 0.4 0.60.00

0.04

0.08

0.12

0.16

Vg=0,0.2,...,1.2 V

Dra

in C

urr

ent

(A

)

Drain Voltage (V)

(b)

Chapter 6

89

was designed to be 150 µm to minimize the effect of contact resistance. Moreover,

a channel width of 70 µm was used to avoid localized surface morphology defects

formed during film deposition as well as during ligand exchange, which may

obscure the effect of mechanical strain. The electron linear mobility extracted

from the transfer characteristics in Figure 6.2 (a) is as high as 2.1 cm2V-1s-1. It is

important to note that this very high electron mobility is achieved in the devices

fabricated on plastic substrate. In addition, the output characteristics shown in

Figure 6.2 (b) indicate that the devices do not show any contact limitation at low

drain voltage. Moreover, the clear saturation profiles confirm that the fabricated

FETs are well performing.

6.3 Strain effect on flexible PbS QD-FETs

The fabrication of PbS QD-FETs on flexible plastic substrate allows applying

compressive and tensile strain on the devices, continuously up to 2% without

breaking the devices. The schematic of the application of compressive and tensile

strain is shown in Figure 6.3. The radius of curvature of the samples upon the

application of strain is given as,[18,19]

2

22

122

l

h

l

dl

lR

(6.1)

where h, l, and dl are the total thickness, the initial length, and the change of

length of the samples, respectively. The strain can be simply estimated from

ε=(h/2R)·100%.[18,19]

Figure 6.3 Schematic of (a) compressive (bent downward) and (b) tensile strain (bent

upward) applied on the devices.

At first, the surface morphology characterization of the PbS QD films was

performed to investigate the presence of cracks on the films after the application

of strain. Figure 6.4 shows the AFM images of the PbS QD films on PEN substrate

with different strain magnitudes. Obviously, no significant change is observed on

(a) (b)

PEN substrate

Strain Direction

Compressive

PEN substrate

Strain Direction

Tensile


90

the PbS films indicating the absence of cracks after applying compressive and

tensile strain up to 2%.

Figure 6.4 Surface morphology of the PbS films with (a) no strain and compressive strain

of (b) 1%, (c) 1.5%, and (d) 2%. AFM images of the PbS films with tensile strain of (e) 1.5%

and (f) 1.8%.

Chapter 6

91

Figure 6.5 Ids-Vg transfer characteristics with the application of (a) compressive and (b)

tensile strain.

Figure 6.5 (a) presents the transfer characteristics of the devices under

several static compressive strains. The applied compressive strain is started from

0.75% up to 2% with a strain interval of 0.25%. An improvement in the on-current

of the devices is measured when the compressive strain is applied on the devices.

Meanwhile, no significant change is observed in the off-current of the devices with

the application of the strain as shown in Figure 6.6 (a). Furthermore, the

improvement of the on-current is also followed by the shifting of the transfer

curve towards more negative voltages, i.e, showing a reduced threshold voltage as

displayed in Figure 6.5 (a) and 6.6 (a). Importantly, the variation of the transfer

curve upon the application of compressive strain is reversible, demonstrating that

the devices are still elastic after the strain is applied and that the current increase

is not caused by its drifting. When the opposite strain direction (tensile strain) is

applied on the devices, the decrease of the on-current is observed. The transfer

0.3 0.6 0.9 1.2

0.00

0.05

0.10

0.15

0% 0.75% 1% 1.25% 1.5% 1.8%

Vds

=0.2 V

|Dra

in C

urr

ent| (A

)

Gate Voltage (V)

0.3 0.6 0.9 1.2

0.00

0.05

0.10

0.15

0.20

0.25

0% 0.75% 1% 1.25% 1.5% 1.75% 2%

Vds

=0.2 V|Dra

in C

urr

ent| (A

)

Gate Voltage (V)(b)

(a)(a)


92

characteristics measured after the application of the tensile strain are displayed

in Figure 6.5 (b) and 6.6 (b). In addition, we also observed the shift of the transfer

curve towards more positive voltages, thus an increased threshold voltage.

(a)

-0.4 0.0 0.4 0.8 1.2

10-11

10-10

10-9

10-8

10-7

2%

Vds

=0.2 V

Dra

in C

urr

ent

(A)

Gate Voltage (V)

0%

-0.4 0.0 0.4 0.8 1.2

10-11

10-10

10-9

10-8

0% 0.75% 1% 1.25% 1.5% 1.75% 2%

Vds

=0.2V

|Gate

Curr

ent| (

A)

Gate Voltage (V)

(b)

(a)

-8

Gate Voltage (V)

(b)

-0.4 0.0 0.4 0.8 1.210

-11

10-10

10-9

10-8

0% 0.75% 1% 1.25% 1.5% 1.8%V

ds=0.2V

|Gate

Curr

ent| (

A)

Gate Voltage (V)

(a) (b)

(c) (d)

-0.4 0.0 0.4 0.8 1.210

-11

10-10

10-9

10-8

10-7

1.8%

0%

Vds

=0.2 V

Dra

in C

urr

ent

(A)

Gate Voltage (V)

Figure 6.6 Semi-logarithmic scale of Ids-Vg transfer characteristics in the devices after the

application of (a) compressive and (b) tensile strain. Semi-logarithmic scale of gate leakage

Ig-Vg characteristics in the devices after the application of (c) compressive and (d) tensile

strain.

To have a confirmation that the variation of the on-current is not caused by

changes in the dielectric properties of ion gel, the gate leakage Ig-Vg characteristics

of the devices under several applied mechanical strain were measured, as

displayed in Figure 6.6 (c) and (d). The measurements confirm the absence of

significant changes in the gate leakage characteristics indicating that the carrier

density, thus the capacitance of the ion gel, is not influenced by the application of

strain.

To have better description about the influence of the mechanical strain on

the electrical characteristics of the devices, the electron mobility in the devices is

extracted for each strain condition. Figure 6.7 shows the electron mobility versus

strain. Under compressive strain (grey region), the electron mobility increases

Chapter 6

93

with increasing strain. These results are attributed to the reduced barrier length,

thus the reduction of the QD-interspacing. At 2% strain (R=3.1 mm), an

improvement in the electron mobility up to 45% is observed resulting in the

mobility value of 3 cm2V-1s-1. To date, the electron mobility is the highest reported

value achieved in PbS QD-FETs fabricated on flexible plastic substrate. Similar to

the current-voltage characteristics, the variation of mobility is reversible in the

range of the applied strain, which confirms that the devices are still elastic. With

given mechanical strain up to 2%, no cracks are observed on the PbS films as

referred to Figure 6.4.

Figure 6.7 Electron mobility as compressive and tensile strain are applied.

In the region of the applied tensile strain, the decrease of the electron

mobility is observed with increasing the strain magnitude as shown in Figure 6.7

(white region). These results can be ascribed to the increase of the barrier length

(longer inter-QD distance) when the tensile strain is applied. The variation of the

inter-QD distance by applying external pressure was reported in PbS colloidal

quantum dots.[14,15] In this system, uniaxial compressive pressure results in a red

shift of the excitonic peak absorption. Due to higher bulk modulus of the QD cores

than that of the ligands, this shift can be mainly associated to the reduced particle

spacing due to the bending of the ligands. The application of compressive strain

on organic semiconductor FETs has also been reported to lead to improvement of

carrier mobility due to reduced molecular spacing. The introduction of tensile

strain in organic FETs results in an increased molecular spacing leading to

reduced charge carrier mobility.[11,13] For organic TFTs, it has also been proposed

that suppressed molecular vibration can be a possible origin of the increased

charge carrier mobility.[20]

(c)

-2 -1 0 1 2

0

1

2

3

4

Forward Backward

CompressiveMobili

ty (

cm

2V

-1s

-1)

Strain (%)

Tensile

(c)

(a)

4


94

6.4 Traps and barrier potential in strained devices

The increase of the electron mobility by applying compressive strain in

Figure 6.7 can also be associated with the reduction of the trap density in the

devices. In quantum dot solids, the charge carrier transport mechanism is

generally governed by quantum tunnelling of charge carriers between QDs. This

process strongly depends on the exchange coupling energy (β), which can be

written as,[3]

dEm b2

12*22exp (6.2)

where ħ, m*, and Eb are reduced Planck constant, the effective mass of carriers,

and barrier potential height, respectively. The distance between QDs, which is

proportional to the length of the ligands, is given by d. When compressive strain

is applied, the bending of the crosslinking ligands leads to the reduced inter-QD

distance, thus improving the exchange coupling energy. This increased exchange

coupling energy will, in turn, reduce the carrier traps near the QD band-edge as

indicated in the schematics reported in Figure 6.8.

Figure 6.8 Schematics of the density of states (DOS) (a) without strain and (b) with

compressive strain. The bandwidth increases due to the increased transfer integral.

Conduction band

trap states

Valence band

trap states

Energy

DOS

(a)

trap states

trap states

Energy

DOS

(b)

Conduction band

Valence band

Chapter 6

95

Conversely, the application of tensile strain will result in the reduction of the

exchange coupling energy. As a consequence, some carrier traps will be

introduced in the band edge of quantum dots. The analysis on this trap

modulation is also supported by the observed threshold voltage shifts upon the

application of the strain as shown in Figure 6.9. As compressive strain increases,

the threshold voltage decreases indicating a lower energy for electron

accumulation, which is related to the reduction of the traps in the devices. When

tensile strain is applied, the increase of the threshold voltage in the devices is

observed. This threshold voltage shift explains the increase of energy for electron

accumulation, which can be attributed to the increased number of carrier traps.

This fluctuation of density of states due to the change of the exchange coupling

bandwidth was previously observed in organic semiconductors. [21–24]

-2 -1 0 1 20.75

0.80

0.85

0.90

0.95

1.00

Forward Backward

Compressive

Thre

shold

Voltage (

V)

Strain (%)

Tensile

Figure 6.9 Threshold voltage of the devices with the application of compressive and tensile

strain.

Interestingly, a non-fully-symmetrical profile in the variation of the device

characteristics by comparing the conditions between compressive and tensile

strain is observed, as referred to Figure 6.7 and 6.9. At this point, the effect of

tensile strain on the device characteristics is larger than that with compressive

strain. This result can be explained by the induction of a barrier potential with the

introduction of tensile strain. To understand this effect, the change of the inter-

QD distance due to the applied strain (ε) is firstly estimated using equation Δx =

xε, where x is the distance between the center of mass of QDs. When compressive

strain is applied, the inter-QD distance is the only parameter changed due to the

bending of the ligands. When the tensile strain is applied on the QD films, the

inter-QD distance is increased by bending the crosslinking organic ligands. Due


96

to this bending, at some points, one of thiol end groups on the QD surfaces can

also become active as demonstrated in Figure 6.10 (a). These active thiols may

increase the barrier potential between QDs and result in the reduced number of

the ligands interconnecting the PbS QDs, thus reducing the tunnelling probability

between QDs as indicated in equation (6.2). In addition, the change of the ligand

dielectric constant when the ligands are stretched can be another possible origin

for the change of barrier potential height.

(c)Strain (%)

(c)

0.35 0.40 0.45 0.50

0

1

2

3

4

CompressiveMobili

ty (

cm

2V

-1s

-1)

Estimated Ligand Length (Å)

Tensile

(b)

(a) Activex

d

Figure 6.10 (a) Unbound (active) ligand chains during the application of tensile strain. (b)

The electron mobility as a function of the ligand length when compressive and tensile strain

are applied.

To estimate the change of the tunnelling barrier potential (Eb) in the PbS QD

films, we use Wentzel–Kramers–Brillouin (WKB) approximation

βe=(2m*Eb/ħ2)1/2.[25] The tunnelling decay constant (βe) can be calculated from the

gradient of the curve of the calculated mobility versus estimated ligand length

(d+Δx). From Figure 6.10 (b), βe is a factor of 5 higher in the regime with tensile

Chapter 6

97

strain application (βe=4.3/Å) than that with compressive strain (βe=0.86/Å)

indicating the increase of barrier potential by referring to the WKB approximation.

These results are in line with the previous reports showing that HOMO-LUMO

gap for unbound (active) alkane chains is as high as 8-10 eV which is about 2 eV

higher than that for bound (non-active) ligands. The lower barrier potential in the

ligands bound on the QD surfaces can be attributed to the hybridization of the

organic ligand chains and the orbitals of the QD surface atoms, which can

introduce some density of states in the molecular junction.[25]

6.5 Conclusion

We have conducted a study of the effect of mechanical compressive and

tensile strain on the electrical characteristics of PbS QD-FETs. After the

application of the mechanical strain, the electron mobility was improved up to

45% (mobility of 3 cm2V-1s-1) at 2% compressive strain, which is attributed to the

reduced inter-QD distance due to the bending of ligands. The inter-QD distance

can be increased by applying tensile strain, which results in a reduced electron

mobility. The variation of the electron mobility by applying mechanical strain was

followed by a variation of the threshold voltage of the devices. With the

application of compressive strain, the threshold voltage increases due to the

increased transfer integral between the QD arrays and reduced carrier traps. In

the opposite strain direction, carrier traps are induced by reducing the exchange

coupling energy, which in turn leads to a decreased transfer integral of the QD

arrays. The application of tensile strain gave rise to a larger effect than that of

compressive strain. This finding can be associated to an increase of the barrier

potential due to the activation of some of the thiol ligands. These results provide

fundamental understanding of the effect of mechanical forces on PbS films which

can enhance and broaden the applicability of these materials for flexible cheap

solution processable electronic devices and also open new prospective towards the

fabrication of mechanical force sensors.

6.6 Methods

Device Fabrication. Polyethylene naphthalate (PEN) with thickness of

125 µm was used as a substrate. Before use, the substrate was annealed at 150oC

for 3 h on a hot plate to remove residual monomer on the PEN surfaces. The

substrate was cleaned with isopropanol for 10 min and dried with nitrogen. Cr and

Au (10 nm/30 nm) were then evaporated on the clean PEN substrate as source-

drain contacts.

PbS quantum dots were synthesized following a method previously reported

in literature.[26] The deposition of the PbS semiconducting thin film was done by


98

spin coating 10 mg/mL of the oleic acid-capped QD solution in chloroform. To

improve the film conductivity, the long-alkyl-chain oleic acid ligands were

replaced by shorter organic molecules, 1,2-ethanedithiol (EDT) with

concentration of 1% v/v in acetonitrile. The film deposition and ligand exchange

(LE) were done using layer-by-layer spin coating procedures for 7 times to ensure

complete LE process. After each LE process, the film was cleaned with pure

acetonitrile to remove old native ligands. The devices were annealed at 120oC for

20 min to remove residual solvents and promote stronger coupling between QDs.

Ion gel based on 1-hexyl-3-methyl-imidazolium bis(trifluoromethane

sulfonyl) imide (HMIM-TFSI) ionic liquid was used as gate dielectric. To prepare

the solution of ion gel, 80 mg of poly(vinylidene fluoride hexa- fluoropropylene)

(PVDF-HFP) pellets was first dissolved in 1 mL dimethylformamide. The solution

was stirred at 60oC overnight. 20 mg of HMIM-TFSI ionic liquid was then added

into the PVDF-HFP solution and stirred at room temperature for 3 h. The ion gel

solution was then spin-coated on the PbS film and annealed at 90oC for 2 h.

Finally, Au with thickness of 50 nm was evaporated on the top of the ion gel film

as top gate electrode. All device fabrication was performed in an N2-filled glove

box

Device Measurement and Strain Effect Experiment. The FET

electrical characteristics were measured using an Agilent B1500A semiconductor

parameter analyser connected to a probe station in an N2-filled glove box. For

strain effect measurement, the devices were stressed using strain measurement

apparatus. The change of the device length was measured by using a calliper and

then used in equation (6.1) to further calculate the strain. The initial ligand length

(without strain) was estimated using the Gaussian software. Before performing

the electrical transport measurement, we waited for 10 minutes after changing

each level of strain to relax some slow ionic migration of the ion gel.

Chapter 6

99

6.7 References





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[6] E. J. D. Klem, H. Shukla, S. Hinds, D. D. MacNeil, L. Levina, E. H. Sargent, Appl.

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[7] F. S. Stinner, Y. Lai, D. B. Straus, B. T. Diroll, D. K. Kim, C. B. Murray, C. R. Kagan,

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[8] J.-H. Choi, H. Wang, S. J. Oh, T. Paik, P. Sung, J. Sung, X. Ye, T. Zhao, B. T. Diroll,

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[9] S. H. Nam, P. J. Jeon, S. W. Min, Y. T. Lee, E. Y. Park, S. Im, Adv. Funct. Mater.

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[10] P. Cosseddu, G. Tiddia, S. Milita, A. Bonfiglio, Org. Electron. 2013, 14, 206.

[11] T. Sekitani, Y. Kato, S. Iba, H. Shinaoka, T. Someya, T. Sakurai, S. Takagi, Appl.

Phys. Lett. 2005, 86, 1.

[12] T. Sekine, K. Fukuda, D. Kumaki, S. Tokito, Jpn. J. Appl. Phys. 2015, 54, 04DK10.

[13] K. Fukuda, K. Hikichi, T. Sekine, Y. Takeda, T. Minamiki, D. Kumaki, S. Tokito, Sci.

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[14] K. Bian, B. T. Richards, H. Yang, W. Bassett, F. W. Wise, Z. Wang, T. Hanrath, Phys.

Chem. Chem. Phys. 2014, 16, 8515.

[15] K. Bian, A. K. Singh, R. G. Hennig, Z. Wang, T. Hanrath, Nano Lett. 2014, 14, 4763.


[17] Y. Zhang, Q. Chen, A. P. Alivisatos, M. Salmeron, Nano Lett. 2015,

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[18] S. Il Park, J. H. Ahn, X. Feng, S. Wang, Y. Huang, J. A. Rogers, Adv. Funct. Mater.

2008, 18, 2673.

[19] S. P. Timoshenko, J. M. Gere, in Theory Elastic Stab., McGraw Hill, New York,

1961, p. Ch 2 and 9.

[20] T. Kubo, R. Häusermann, J. Tsurumi, J. Soeda, Y. Okada, Y. Yamashita, N.

Akamatsu, A. Shishido, C. Mitsui, T. Okamoto, S. Yanagisawa, H. Matsui, J. Takeya,

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[21] G. Lu, J. Blakesley, S. Himmelberger, P. Pingel, J. Frisch, I. Lieberwirth, I.

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100

Lett. 2010, 10, 1960.


101

Summary

Electronic devices nowadays have become an integral part of our day-to-day

needs. Their great advancement has given remarkable impact in our lives, which

covers many sectors including energy, healthcare, sensor, light industry, etc. To

date, most of the electronic devices available in the markets are constructed from

silicon and other highly crystalline semiconductors. These materials are mainly

deposited using epitaxial growth method which requires ultra-high vacuum

environment, high temperature, and energy intensive process resulting in high

manufacturing cost.

In the past few years, colloidal quantum dots (QDs) have emerged as

promising future semiconducting building blocks for electronic devices. These

materials can potentially compete with epitaxial-based semiconductors as they

can be processed by solution methods, which are compatible with low

temperature processes and with device fabrication on plastic substrate. Thanks to

the quantum confinement, their band gap is size-tunable ranging from ultraviolet

to near-infrared, making them prospective candidates for well-controllable

electronics and highly efficient optoelectronic devices. Among other types of QDs,

lead sulfide (PbS) is one of the most promising because they can show strong

quantum confinement in relatively large particle size (<20 nm). As the research

on the PbS QD synthesis has been well developed, the size range can be achieved

together with the precise control of shape, chemical composition, and surface

properties.

QDs have a large surface to volume ratio, a typical characteristic of nano-

objects. As a consequence, QDs have defect states on their surfaces which are

responsible for charge carrier trapping within these materials. This charge

trapping is one of main obstacles in further utilizing these materials for broad

electronic and optoelectronic applications. For instance, in the application of

field-effect transistors (FETs) based on PbS QDs, the charge transport is still

limited. A problem further arises as some additional defects appear on the surface

of gate insulators, one of main components in FET devices, lowering the carrier

mobility in the fabricated devices. Several methods to improve the surface

properties of insulators and to modify the properties of semiconducting films have

been reported. These will be key strategies to understand and further improve

charge transport in the FETs based on PbS QDs. The studies of these strategies

are the focus of this thesis.

The surface properties of gate insulators are crucial in determining the

electrical properties and the performance of FETs. In chapter two, we


102

introduced molecular dipoles on the surface of SiO2 gate dielectric using self-

assembled monolayers (SAMs). Using SAMs, the threshold voltages of the devices

are shifted and show a linear relationship with the SAM doping concentration,

providing an opportunity to tune the FET properties towards n-type or p-type

depending on the used SAMs. The SAMs are also found to reduce the trap density

in the devices, leading to the improvement of the electron mobility up to a factor

of three.

The use of gate dielectrics with better surface properties together with

comprehensive understanding on the nature of charge trapping in FETs is a

necessary step to improve charge transport in PbS QD-FETs. In chapter three,

we passivated the SiO2 surface using hexamethyldisilazane (HMDS) and utilized

hydroxyl-free Cytop dielectric. The HMDS treatment is found to improve the QD

assembly organization and indeed passivate the dangling bonds on the SiO2

surface, leading to the improvement of electron mobility by a factor of three. The

use of Cytop gate dielectric further improves the mobility by one order of

magnitude. Using a simulation, we showed that a significant decrease of the trap

density of states (trap DOS) by almost two orders of magnitude is responsible for

the improvement of the mobility in the devices.

In chapter four, we presented an analysis of the trap DOS in PbS QD-FETs

utilizing several polymer gate dielectrics with a wide range of dielectric constants

(2-41). We observed that the number of traps in the subthreshold regime increases

with increasing the dielectric constant of the gate insulators. A consistent result

was obtained from analysis using a computer simulation, where the increase and

broadening of the trap DOS in the devices were observed with increasing the

dielectric constant of the insulators. These results suggest the presence of

increased disorder due to polaronic interaction at the semiconductor/insulator

interface in PbS QD-FETs with increased dielectric polarization strength.

Doping is an effective tool to improve carrier mobility in semiconductors. In

chapter five, we reported a strategy to heavily dope PbS QDs combining the use

of benzyl viologen (BV) dopant with the engineering of the QD energy levels

through the use of several capping ligands. With this doping, the electron mobility

is improved by one order of magnitude. From the 4-terminal conductivity

transistor measurement, the BV doping of the PbS QD films resulted in an

electron mobility as high as 0.64 cm2V-1s-1 in devices employing SiO2 gate

dielectric.

The modulation of the inter-QD distances using mechanical strain is

expected to determine the charge carrier transport in PbS QD-FETs. In chapter

six, we demonstrated the effect of mechanical strain on the electrical properties

of flexible ion gel-gated PbS QD-FETs. Using ion gel gating, a high electron

mobility of 2.1 cm2V-1s-1 in the devices was achieved. The application of

compressive strain results in the bending of the capping ligands and reduced

Summary

103

inter-QD distances, leading to the improvement of the mobility up to 45% (3

cm2V-1s-1) at 2% strain. Meanwhile, the oppositely applied strain leads to an

increase of the inter-QD distances resulting in the reduction of the electron

mobility in the devices. In addition, we also found that the compressive strain

reduces the threshold voltage of the devices, which explains an efficient trap filling.

Instead, the increase of the threshold voltage is observed with the application of

tensile strain, which increases the carrier traps in the devices. Furthermore, we

found that the tensile strain also results in the activation of the ligand chains,

increasing the tunnelling barrier potential between QD solids.

To conclude, we investigated and improved charge transport in PbS QD-

FETs by modifying the surface properties of gate insulators, doping of PbS QDs

using organic molecules, and introducing mechanical strain on the devices. We

demonstrated high mobility FETs based on PbS QDs, showing the importance of

these materials as colloidal inks for future low cost and high performance plastic

electronics.

105

Samenvatting

Elektronica is niet meer weg te denken uit ons dagelijks leven. Grote

technologische vooruitgangen hebben een opmerkelijke invloed gehad op veel

gebieden, zoals energie, gezondheidszorg, sensor- en verlichtingsindustrie, etc.

Tot op heden zijn de meeste elektronische apparaten op de markt gemaakt van

silicium en andere hoogkristallijne halfgeleiders. Deze materialen zijn

hoofdzakelijk gefabriceerd met behulp van epitaxiale groei, wat een ultrahoog

vacuüm, hoge temperatuur en veel energie vereist. Dit resulteert weer in hoge

productiekosten.

In de afgelopen jaren zijn colloïdale Quantum Dots (QDs) ontsproten tot

veelbelovende toekomstige halfgeleidende elementen voor elektronische

apparatuur. Deze materialen hebben het potentieel om te kunnen concurreren

met epitaxiaal-gebaseerde halfgeleiders, omdat ze vanuit oplossing als vloeistof

verwerkt kunnen worden. Dit is verenigbaar met een lage

verwerkingstemperatuur en met verwerking op plastic substraten. Dankzij

kwantumopsluiting is hun bandkloof in grootte te variëren, met een bereik van

ultraviolet tot nabij-infrarood waardoor ze potentiele kandidaten zijn voor goed

afgestemde elektronica en hoog-efficiënte opto-elektronische apparaten. Onder

de verschillende types QDs, is loodsulfide (PbS) een van de meest veelbelovende

omdat het een sterke kwantumopsluiting vertoont in een relatief groot deeltje

(<20 nm). Het onderzoek naar PbS QD synthese is goed ontwikkeld; het bereik in

deeltjesgrootte kan geregeld worden alsmede precieze controle over vorm,

chemische samenstelling en oppervlakte-eigenschappen.

QDs hebben een groot oppervlak-tot-volume ratio, een typisch kenmerk van

nano-objecten. Daarom hebben QDs defecttoestanden op hun oppervlak, die

verantwoordelijk zijn voor gevangen ladingsdragers in deze materialen. Deze

ladingsvallen zijn één van de voornaamste hindernissen voor verder gebruik van

deze materialen voor brede elektronische en opto-elektronische toepassingen.

Bijvoorbeeld bij gebruik van veldeffecttransistoren (FETs) gebaseerd op QDs is

het ladingstransport nog begrensd. Een ander probleem doet zich voor als enkele

additionele defecten op het oppervlak van gate-isolatoren verschijnen, een van de

hoofdcomponenten in FET apparaten, waardoor de mobiliteit van de

ladingsdragers in de gefabriceerde apparaten afneemt. Er zijn verschillende

methodes gepubliceerd om de oppervlakte-eigenschappen van isolatoren en de

eigenschappen van halfgeleidende laagjes te verbeteren. Dit zijn belangrijke

strategieën om ladingtransport in FETs gebaseerd op PbS QDs te begrijpen en

verder te verbeteren. De studie van deze strategieën is de focus van dit proefschrift.

Ladingstransport en ladingsvallen in PbS QD veld-effect transistors

106

De oppervlakte-eigenschappen van gate-isolatoren zijn doorslaggevend voor

de elektrische eigenschappen en prestaties van de FETs. In hoofdstuk twee

introduceren we moleculaire dipolen op het oppervlak van SiO2 gate-diëlektrica

met behulp van zelf-geassembleerde monolagen (SAMs). Met behulp van SAMs

worden de drempelspanningen van de apparaten verschoven en wordt een

lineaire relatie vertoond met de SAM doteringsconcentratie, hetgeen een

mogelijkheid geeft om de eigenschappen van de FET richting n-type of p-type te

modificeren afhankelijk van de gebruikte SAM. De SAMs blijken ook de

ladingsval-dichtheid te verminderen, wat weer leidt tot een elektron mobiliteit die

tot wel drie keer zo hoog is.

Het gebruik van gate-diëlektrica met betere oppervlakte-eigenschappen

samen met een uitgebreide kennis over de aard van ladingsvallen in de FETs is

een noodzakelijke stap om het ladingstransport in PbS QD-FETs te verbeteren. In

hoofdstuk drie neutraliseren we het SiO2 oppervlak door middel van

hexamethyldisilazaan (HMDS) en gebruik te maken van het hydroxyl-vrije Cytop

diëlektricum. De HMDS behandeling blijkt de QD-assemblageorganisatie te

verbeteren en neutraliseert inderdaad de bungelende bindingen op het SiO2

oppervlak, wat leidt tot een verbetering van elektronmobiliteit met een factor van

drie. Het gebruik van Cytop-gate-diëlektricum verbetert de mobiliteit verder met

een ordegrootte. Met behulp van een simulatie hebben we laten zien dat een

significante vermindering van de toestandsdichtheid van ladingsvallen (trap

DOS), met bijna twee orders van grootte, verantwoordelijk is voor de verbetering

van de mobiliteit in de apparaten.

In hoofdstuk vier presenteren we een analyse van de toestandsdichtheid

van ladingsvallen in PbS QD-FETs gebruikmakend van verscheidene polymeer

gate-diëlektrica met een breed scala aan permittiviteiten (2-41). We merken op

dat het aantal ladingsvallen in het sub-drempelregime afneemt bij vergroting van

de permittiviteit van de gate-isolatoren. Een consistent resultaat is verkregen

door analyse met een computersimulatie, waar het vermeerderen en verbreden

van de ladingsvaltoestandsdichtheid in de apparaten is opgemerkt bij vergroting

van de permittiviteit van de isolatoren. Deze resultaten suggereren aanwezigheid

van verhoogde wanorde door polaronische interactie op de halfgeleider/isolator

interface in PbS QD-FETs met verhoogde diëlektrische polarisatiesterkte.

Dotering is een effectief middel om de mobiliteit van ladingsdragers in

halfgeleiders te verbeteren. In hoofdstuk vijf beschrijven we een strategie om

PbS QDs zwaar te doteren, door gecombineerd gebruik van benzyl-viologen (BV)

doteermiddel en de aanpassing van QD energieniveaus door verscheidene

afdekkende liganden. Met deze dotering is de elektron mobiliteit verbeterd met

een ordegrootte. Uit geleidbaarheidsmetingen, in een vier-terminal

transistorconfiguratie, is gebleken dat de BV dotering van de PbS QD films

Samenvatting

107

resulteert in een elektronmobiliteit zo groot als 0.64 cm2V-1s-1 in apparaten

gebruikmakend van SiO2 gate-diëlektricum.

De modulatie van inter-QD afstanden met behulp van mechanische

belasting zal naar verwachting het transport van ladingsdragers in PbS QD-FETs

bepalen. In hoofdstuk zes demonstreren we het effect van mechanische

belasting op de elektrische eigenschappen van flexibele ion-gel gate PbS QD-FETs.

Gebruikmakend van ion gel gates is een elektronmobiliteit van 2.1 cm2V-1s-1 in de

apparaten verkregen. De toepassing van drukspanning leidt tot het buigen van de

afdekkende liganden en reduceert inter-QD afstanden, wat leidt tot een

verbetering van de mobiliteit tot 45% (3 cm2V-1s-1) bij 2% rek. Ondertussen leidt

de tegengesteld aangebrachte spanning tot een verhoging van inter-QD afstanden,

wat resulteert in een verlaging van elektronmobiliteit in de apparaten. Daarnaast

merken we op dat de drukspanning de drempelspanning van de apparaten

vermindert, wat een efficiënte vulling van ladingsvallen verklaard. In plaats

daarvan wordt een verhoging van drempelspanning geobserveerd met de

aanbrenging van trekbelasting, hetgeen het aantal ladingsvallen in de apparaten

vergroot. Verder hebben we gevonden dat de trekbelasting ook resulteert in de

activatie van ligandketens, hetgeen het tunnelbarrièrepotentiaal tussen QD vaste

stoffen verhoogd.

Ter samenvatting: we hebben ladingstransport in PbS QD-FETs onderzocht

en verbeterd door het modificeren van oppervlakte-eigenschappen van gate-

isolatoren, dotering van PbS QDs door gebruik van organische moleculen en

aanbrenging van mechanische belasting op de apparaten. We hebben FETs

gebaseerd op PbS QDs met hoge mobiliteit gedemonstreerd, die het belang van

deze materialen demonstreren als colloïdale inkten voor toekomstige elektronica

met lage kosten en hoge prestaties.

109

Acknowledgement

Alhamdulillah, all praises to Allah Subhanahu Wata’ala for the strengths,

His guidance, and His blessings in completing this thesis.

A 4-year PhD is indeed a tough part of life, yet is very wonderful because of

many amazing people surrounding. They have made my PhD life more colorful

and full of happiness. From the deepest part of my heart, I would like to dedicate

this thesis to them because of their support, motivation, and prayer during this 4-

year long PhD journey.

First, I would like to send my gratitude to my supervisor, Prof. Maria

Antonietta Loi, for her kind support, supervision, and guidance during my PhD.

Maria, thank you for giving me an opportunity to study abroad and to join your

lab, the place where I developed my knowledge and research experiences. Thank

you for helping me with the paper writing, presentations, and some opportunities

to attend international conferences. Thank you for providing me a great

opportunity to have a collaboration in high quality research group at the

University of Tokyo, Japan.

Second, I would like to sincerely acknowledge Prof. Jun Takeya at the

University of Tokyo for giving me few years of life and research collaboration in

Japan. The place where I have been dreaming of visiting since I was a kid. I really

enjoyed living in Japan and learned a lot from the good Japanese culture in life

and work activities. Thank you for sharing me your idea and for discussions

during the collaboration. All of those as well as your typical Japanese pressure a

bit are indeed very helpful to finish this PhD.

I would like to thank Prof. Justin Ye from University of Groningen, Prof.

Cherie R. Kagan from University of Pennsylvania, and Prof. Matt Law from

University of California Irvine for accepting to be the members of the reading

committee for my PhD thesis.

I would like to specially thank Matsui-san, my great daily supervisor, for your

patience in supervising me and arranging everything during my first visit in Japan.

When I had a problem in research, you never blamed students. You always came

up with solutions and brilliant ideas. You always have positive thoughts to

students so that they can get highly motivated afterwards. Those what I can learn

from you when I become a supervisor in the future. I cannot say anything but

thank you very much for your valuable supports and kindness. Shun Watanabe, I

also would like to express my gratitude to you for your supervision during few

months of my last stay in Japan. Thank you for your great ideas and motivations.

It is a great honor to be supervised by one of great material scientists like you.


110

During my research, I collaborated with many people. I would like to

acknowledge Prof. Wolfgang Heiss and Dr. Mykhailo Sytnyk for providing

quantum dot solutions; Prof. Chen and Prof. Wu for other side projects and

fruitful discussions. This thesis would never have been completed without your

valuable works and help.

A special acknowledgement goes to my both paranymphs: Wytse Talsma and

Abdurrahman Ali. Thank you for accepting to be my paranymphs and preparing

everything for my defense. Wytse, a funny Dutch friend and a good physicist with

additional expertise in farming, we shared everything in the lab and you also had

helped me a lot. Thank you also for translating the summary of my thesis into

Dutch. Thanks for allowing me to have a picture with your beautiful horse and

giving me a nice sunflower. Please let me know if you have a plan to visit Indonesia.

Ali, we come from the same university in Indonesia and now we meet in

Groningen. I hope we can have a strong research collaboration when we build a

laboratory in Indonesia, in the future.

I would like to thank Renate Hekkema, our group secretary, for helping me

with all paper and administrative works. I also would like to thank our research

technicians: Arjen Kamp, Frans van der Horst, and Jan Harkema for your

significant contribution to my research. Without your help, my research would

never have run smoothly.

I would like to thank the members of photophysics and optoelectronics

group at University of Groningen. Satria, thank you very much for giving me

information about PhD position in Maria lab and supervision in Groningen. Widi,

a friendly and nice Indonesian lab mate, thank you for everything and the

discussion in the lab. We discussed everything including research, life, gadget, etc.

Thank you also for your valuable inputs on the cover of my PhD thesis. Good luck

with your postdoctoral research in RIKEN. It was great to meet you! Lai Hung, a

funny Taiwanese and a food lover, I am really pleased to have met you in

Groningen. I hope we can meet again somewhere and some time. I wish you the

best in your careers. Musty, it was very fun to meet you, we frequently discussed

about Indonesia and Nigeria. It was very surprising that you could spell some

Indonesian words almost perfectly. Thank you also for your help in checking the

English of my thesis. Nisrina, we met only in a short time but we discussed a lot.

I am sure you can be a great person and I wish you a successful (love and) life.

Furthermore, I would like to thank the other group members: Marianna, Sampson,

Matthijs, Vlad, Jorge, Hong Hua, Shuyan, Artem, Mark, Daniel, and Simon.

Thank you also for Jan Anton, Davide, Niels, Tejas, and Solmaz.

As part of my PhD research, I have a great chance to do research

collaboration in organic electronics research group, the University of Tokyo,

Japan. Therefore, I would like to thank the members of the group. Roger: it was

my best luck to meet you in Tokyo because you provided me many great ideas and

Acknowledgement

111

did some successful simulation. Without your help, it is indeed very difficult for

me to finish my thesis. I hope I can visit Switzerland some time. Yu Yamashita:

thank you for discussion and sharing all about Japanese things. Fujishima: my

very best Japanese friend, the most open-minded Japanese I have ever met. You

have helped me a lot. I am really pleased to meet you and please let me know if

you visit Indonesia. Hikari is asking about you. Thank you also for the other group

members especially Kumagai, Balthasar, Sybille, Miyake, Kishi, Kubo, and

Yamamura (I am so sorry I cannot mention all of other members here, but thank

you very much for your hospitality and help).

I would have never been at this stage without genuine prayer and support

from two greatest persons in my life, Mamah dan Bapak. Mamah, terima kasih

ya atas doa, motivasi, dan dukungannya selama ini. Terima kasih udah ngasih

pendidikan yang sangat baik dari kecil sampai sekarang ini. Dengan ridho dan

doa Mamah, alhamdulilah selesai juga PhD ini. Semoga ini bisa membuat

Mamah bangga dan semoga Mamah selalu sehat, panjang umur, dan ikut

merasakan kesuksesan selanjutnya. Bapak, mungkin Bapak ga baca tulisan ini.

Tulisan ini untuk nunjukin betapa besar peran Bapak selama ini. Bapak, orang

yang keras untuk masalah pendidikan khususnya pendidikan Agama. Bapak

selalu ngajarin berprestasi di sekolah itu penting tapi tidak ada gunanya kalau

meninggalkan sholat dan tidak bisa baca Alquran. Walau Bapak sekarang udah

di sana, Bapak, selalu bisa membuat semangat dan termotivasi untuk

menyelesaikan pendidikan ini. Semoga pencapaian ini bisa membuat Bapak

bangga dan senyum di sana.

For my two beloved and beautiful angels: Prawistin and Ara. Bunda, terima

kasih ya atas doa dan cinta tulusnya selama ini. Makasih ya udah selalu sabar,

selalu ada di samping, dan selalu kasih semangat pas lagi mumet riset dan nulis.

Sering kasih masukan juga untuk paper dan tesis, untungnya riset kita sebidang

ya. Mau lanjut PhD ga nih? :P Makasih juga ya udah ngasih semangat baru dan

kado terbaik di akhir-akhir PhD, jadinya makin semangat ngerjain eksperimen

dan nulis tesisnya. Mohon maaf selama ini belum jadi imam yang baik. Maafin

juga ya selama PhD sering ditinggal sendirian malem-malem ke lab. :D Emang

bener, dibalik suksesnya pria ada wanita hebat disampingnya. Ayo kita sukses

selanjutnya! Abis dari Belanda dan Jepang, kemana lagi nih kita? Untuk Ara,

ini dia nih kadonya dari Bunda. Makasih ya udah jadi spirit booster-nya Papah.

Hadiahnya ikut jalan-jalan ke Belanda ya. Insya Allah Ara, Hikari Nazafarin

Humaira, bisa jauh lebih baik dari Papah dan Bunda. Sehat, pinter, dan jadi

anak sholihah ya.

Untuk keluarga besar di Tangerang: Teteh Leli, Teteh Rita, Aa Ari, Bang

Boy, Om Fajar, Ka Ana, dan semua keluarga di Tangerang (maaf ga bisa

disebut satu-satu). Terima kasih ya atas doa dan dukungannya. Mohon maaf

selama merantau banyak ngerepotin. Makasih ya udah bantu jagain Mamah.


112

Jangan lupa doain terus untuk kesuksesan selanjutnya ya. Untuk Bapak dan Ibu

di Semarang, terima kasih ya atas doa dan dukungannya untuk kelancaran

pendidikan S3 dan selesainya tesis ini. Terima kasih juga udah nitipin Wistin,

jadinya lebih semangat kuliah dan ngerjain tesisnya. Terima kasih juga atas

bantuannya selama tinggal di Semarang dan jalan-jalannya juga. Terima kasih

juga untuk Hanif, Mbah, semua keluarga Boyolali dan Sragen atas doa dan

dukungannya selama hidup merantau.

My life in Groningen is unforgettable and I cannot forget to thank my

Indonesian friends in Groningen: Om Pi’I, Mba Erlin, Idrus “Biber”, Mas Edy,

Mas Zaky-Mba Sella, Pak Tatang-Bu Rohmah, Pak-Bu Asmoro, Pak Taufik-Mba

Tina, Om Lutfi, Almas, Mas Doni, Guntur, Adhyat-Mba Nuri, Mas Didik-Mba

Rosel, Mas Kus-Mba Fitri, Om Hegar, Mas Zainal-Mba Ayu, Mas Fean, Om Fikri,

Radit-Nia, Didin, Mba Susan-Mas Bino, Mas Yusuf, Salma, Shiddiq, Cacha, Mbak

Adel, Mas Bintoro, Mba Shofi, Mba Tiur, Mba Nur, Mas Azis-Amalina, grup

sandwich ITB-Groningen (Felix, Ali, Liany, Ulfa, Reren, Anis, Resti, Raisa,

Mamay), Mas Krisna-Mba Icha, temen-temen deGromiest and PPI Groningen

that are not mentioned here. Being far away from family is not a big problem,

because I have met all of you. Thank you for making my life in Groningen more

colorful and full of happiness.

Some parts of my PhD life were done in Japan. Therefore, I would not forget

to give special thanks to my Indonesian friends in Tokyo, Japan especially Windy,

Ronald, Mbak Ety, Helbert, Mbak Ambar, Mbak Dian, Ikhlas, and Mas Ardhi. It

is well-known that living in Japan as researcher/student is full of pressure,

especially in Kashiwa where almost nothing around. But, it is not a big problem

when I meet all of you. I hope we can meet again in Tokyo and Indonesia, in the

future. See you on top.

I also would like to thank Anggita Putri Wibowo (Ghe) for your valuable time

in discussing and giving some initial ideas about the cover of my PhD thesis. I

wish you the best in your career and life.

For my best friends in Tangerang: Candra, Indra, Muklis, Avan, Boby, Tyo,

Adit, Budi, Alin, dan yang lainnya. Terima kasih ya atas doa dan sharingnya

selama ini. Terima kasih juga udah mengisi hari-hari nulis tesis ini sambil

diskusi Bahasa Inggris dan kerja bakti. Kapok ga? :P

I also would like to acknowledge all of my teachers and supervisors during

my study especially my lecturers and supervisors in Department of Physics,

Institut Teknologi Bandung (ITB): Pak Yudi, Pak Ferry, Pak Mikra, and Bu Inge.

Last but not least, also for my great teachers in SMA Negeri 7 Tangerang. Thank

you for your great support, contribution, and prayer during my study which

brought me at this stage.

~For all readers of this thesis, thank you very much for reading~

113

List of Publications

1. Daniel M. Balazs, Mohamad Insan Nugraha, Satria Zulkarnaen Bisri,

Mykhailo Sytnyk, Wolfgang Heiss, Maria Antonietta Loi, Reducing charge

trapping in PbS colloidal quantum dot solids, Appl. Phys. Lett. 2014, 104,

112104.

2. Mohamad Insan Nugraha, Roger Hausermann, Satria Zulkarnaen Bisri,

Hiroyuki Matsui, Mykhailo Sytnyk, Wolgang Heiss, Jun Takeya, Maria

Antonietta Loi, High Mobility and Low Density of Trap States in Dual-Solid-

Gated PbS Nanocrystal Field-Effect Transistors, Adv. Mater. 2015, 27, 2107-

2112.

3. Mohamad Insan Nugraha, Hiroyuki Matsui, Satria Zulkarnaen Bisri,

Mykhailo Sytnyk, Wolgang Heiss, Maria Antonietta Loi, Jun Takeya, Tunable

Doping in PbS Nanocrystal Field-Effect Transistors using Surface Molecular

Dipole, APL Materials, 2016, 4, 116105.

4. Mohamad Insan Nugraha, Hiroyuki Matsui, Roger Hausermann, Shun Watanabe, Takayoshi Kubo, Satria Zulkarnaen Bisri, Mykhailo Sytnyk, Wolgang Heiss, Maria Antonietta Loi, Jun Takeya, Strain-Modulated Charge Transport in Flexible PbS Nanocrystal Field-Effect Transistors, Adv. Electron. Mater. 2017, 3, 1600360.

5. Jeng-Ting Li, Li-Chih Liu, Jen-Sue Chen, Jiann-Shing Jeng, Po-Yung Liao,

Hsiao-Cheng Chiang, Ting-Chang Chang, Mohamad Insan Nugraha,

Maria Antonietta Loi, Localized tail state distribution and hopping transport

in ultrathin zinc-tin-oxide thin film transistor, Appl. Phys. Lett. 2017, 110,

023504.

6. Mohamad Insan Nugraha, Roger Hausermann, Hiroyuki Matsui, Shun

Watanabe, Mykhailo Sytnyk, Wolgang Heiss, Maria Antonietta Loi, Jun

Takeya, Broadening of the Distribution of Trap States in PbS Quantum Dot

Field-Effect Transistors with High-k Dielectrics, ACS Appl. Mater. Interfaces

2017, 9, 4719.

7. Mohamad Insan Nugraha, Shohei Kumagai, Shun Watanabe, Mykhailo

Sytnyk, Wolfgang Heiss, Maria Antonietta Loi, Jun Takeya, Enabling

ambipolar to heavy n-type transport in PbS quantum dot solids through

doping with organic molecules, ACS Appl. Mater. Interfaces 2017, Article

ASAP.

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