unit 1 transistors, ujts and thyristors. unit 1: transistors, ujts and thyristors objectives:...
DESCRIPTION
1.1 Operating (Q) Point To design an amplifier: 1.DC & AC analysis 2.Operating Point in active region by biasing circuits 1.Fixed bias 2.Emitter bias 3.Collector-to-base bias 4.Voltage divider bias with emitter biasTRANSCRIPT
Unit 1
Transistors, UJTs and Thyristors
Unit 1: Transistors, UJTs and Thyristors
• Objectives:• Operating Point• CE configuration• Thermal runaway• UJT• SCR
1.1 Operating (Q) Point
To design an amplifier:1. DC & AC analysis
2. Operating Point in active region by biasing circuits
1. Fixed bias2. Emitter bias3. Collector-to-base bias4. Voltage divider bias with emitter bias
…selecting suitable Q point
…selecting suitable Q point
• Point A no biasCut-off region
• Point B near to knee portion Do not allow more output swing
• Point C close to PD(max) curve Output’s +ve swing is limited
• Point D middle of active regionAllows +ve & -ve excursions of output
1.2 CE configuration• Popular as provides considerable AV & AI
To learn:• Biasing Circuits:
1. Fixed bias2. Emitter bias (self bias)3. Voltage divider bias with emitter bias
• Analysis: DC, load-line
• merits & demerits
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fixed bias circuit• Simplest
• Biasing components:– 2 resistors (RB & RC)– Vcc
• BE junction FB by Vcc through RB (100s of kΩ)
• CB junction RB by Vcc through Rc (few k Ω)
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DC analysis
To get DC equivalent circuit:
Open Circuit all capacitors, and redraw the circuit
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…From fundamentals• VBE = VB – VE
Similarly• VCE = VC – VE
Next, by KVL to BE loop
VCC – IBRB – VBE = 0
VCC – VBE IB = ----------------- RB
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…But IC = β IB where β is transistor gain
VCC - VBE
IC = β ( ---------------- ) RB
VCC
IC = β ( ---------- ) -----(1) RB
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…
β VCC
IC ≈ ------------ RB
IC
Where β is transistor current gain = ------ IB
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…
Next, apply KVL to output loop,
VCC = ICRC + VCE
VCE = VCC – ICRC ----(2)
Put Ic = 0 in eqn (2)∴ VCE = Vcc
Put VCE = 0 in eqn (2)∴ Ic = Vcc / Ic
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…
• Q point is influenced by
– IB – base current– RC – collector resistance– VCC – supply voltage
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Numerical example:
Find values ofICQ & VCQ
Find values ofIC & VCE,
forcing each value to zero,
each time
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Solution:
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• Thus,
ICQ = 1.43 mA & VCEQ = 9.28 V
Which are the coordinates of Q point
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Emitter bias / self bias configuration• Additional resistor RE, improves stability,as it produces negative feedback.
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DC analysis
• By KVL to input base loop,
VCC – IB RB – VBE – IE RE= 0
VCC – VBE
IB = -------------------- ----(1) RB + (β+1)RE
…
neglecting VBE VCC
IB = -------------------- RB + (β+1)RE
Vin
Compare this equation with Iin = -------- Rin
…
We get input resistance = RB + (β+1)RE
Next, applying KVL to output collector loop,
VCC – IC RC – VCE – IE RE = 0
VCE = VCC – IC (RC + RE) ------(2)
From basics, IC = IB + IEIB is << IE = IC
…Also VE = IE RE = IC RE
From eqn. (1) & (2)
VCC – VBE
ICQ = β -------------------- RB + (β+1)RE
VCEQ = VCC – IC (RC + RE)
The coordinates of Q point
Load line analysis
We have
VCE = VCC – IC (RC + RE)
Put IC = 0
VCE = VCC│IC = 0 is point of load line on x – axis (VCC, 0)
…
For second point,
Put VCE = 0
VCC
IC = ---------------(RC + RE) VCE = 0
…thus we have
on y- axis
(0, VCC/(RC + RE))
as another
point on load line.
How stability increased:
VCC – VBE
ICQ = β -------------------- RB + (β+1)RE
VCEQ = VCC – IC (RC + RE)
RE introduces negative (ac emitter) feedback, due to which• Stability of Av increases
How stability is improved by RE:
IEVE
VBE
IB
IE ≈ Ic IE = VE / RE
VCC = IB RB + VBE + VE
VBE = IB RBIB = β IB
Due to temperature or else, ICIC
Initial increase and later decrease proves that RE improves stability
Small Signal Operation:
AC and DC Currents in an Amplifier:
IBQ
ib
IB = IBQ + ib
ieIEQ
IE = IEQ + ie
ICQ
ic
IC = ICQ + ic
Numerical example:• Refer to figure. Find the values of RB, RC &
RB, given that IB=40µA, VE=2V, IC=4mA, VCE=12V & supply voltage VCC=15V. Assume silicon transistor.
Numerical:
Numerical:
3. Voltage-divider-bias with emitter-bias configuration:
• Stability further improved, ( but gain decreases)
• Most commonly used configuration
• Gain can be improved by bypass capacitor, later studied.
DC equivalent circuit:
To get DC equivalent circuit:
Open Circuit all capacitors,
and redraw the circuit
DC analysis2 methods:
1. Accurate method (uses Thevenin’s theorem)
2. Approximate method
1. Accurate Method:Using Thevenin’s Theorem:
DC Equivalent Circuit
Thevenin’s Equivalent Circuit
Redrawn showing Vcc
Calculating RTH & VTH:RTH:
Identify the 2 points short circuit all DC voltages
RTH
Little consideration will show that –RTH is = parallel combination of RB1 & RB2
RTH = RB1 ║ RB2
VTH:Consider the circuit, again –
VTH is nothing but – the voltage across the 2 points OR across RB2
RB2 VCC
VTH = ---------------- (RB1 + RB2)
VTH
Now replace the base circuit with Thevenin’s equivalent circuit -
• Applying KVL to the base loop –
VTH – IB RTH – VBE – IE RE = 0
Substituting IE = (β+1)IB
VTH - VBE
IB = ---------------------- RTH + (β+1)RE
IE = IC + IBDividing by IC, as it is to be eliminated,
IE IC + IB---- = ----- -----IC IC IC
1 = 1 + ----
β
β + 1 = ---------- β
IC (β + 1) = -------------- IC / IB
IE = IB (β + 1)
Proof
… VTH - VBE
IB = β --------------------- -----(1) RTH + (β+1)RE
By KVL to output collector loop,
VCC –IC RC – VCE – IE VE = 0
VCE = VCC – IC RC – IC RE as IC = IE
VCE = VCC – ICQ (RC + RE) -----(2)
Hence equations (1) & (2) represent Q point.
Q
Q
Load line analysis:
• Same as that of emitter bias:
Advantages & disadvantages of VDB:
• Excellent stability (against temperature & β), because of –ve feedback introduced by RE.
• But RE reduces gain AV.
• Again CE bypasses ac signal, increasing AV, also maintaining stability.
IE ie
DC do not pass through CE asf=0 in XC = 1 / (2πfC)= resistance
Numerical:
Solution:
4. Collector-to-base bias configuration:Little bit looking back:We have studied –1. base bias2. emitter (self) bias3. voltage-divider-bias with emitter-biaswith,• DC analysis (to know Q point/ICQ & VCEQ) • load-line analysis (points A & B of load-
line)
• RB provides negative feedback, voltage-shunt feedback
• Better (not excellent, as VDB with EB) stability
DC analysis:
IB + IC
IB IC
• KVL to base-emitter loop,VCC – (IB + IC) RC – IB RB – VBE = 0
• Substitute IC = β IB
VCC – VBE
IB = --------------------- RB + (β + 1) RC
VCC – VBE
ICQ = β --------------------- -----(1) RB + (β + 1) RC
• KVL to collector-emitter loop, VCC – (IB + IC) RC –VCE = 0
VCE = VCC – (IB + IC) RC
• Ignoring IB, VCE = VCC – IC RC
At quiescent conditions, VCEQ = VCC – ICQ RC -----(2)
Advantages & disadvantages:• Provides stability
• Reduced gain, due to –ve feedback, can be reduced by bypassing capacitor, as shown below,
We are not studying …
• 4.3 Common base circuit• 4.4 Common collector circuit• 4.5 Bias stabilization• 4.6 Bias compensation
But let us now study …
• 4.7 Thermal Runaway
4.7 Thermal Runaway
• Power dissipation depends on• Physical size• Its construction• Mounting arrangement
• Maximum power rating is limited by• Temperature that CB junction can withstand• Ambient temperature
• When ambient temperature , power rating , is known as “power derating”
…• Power dissipation capability range – 100s
milliwatts to 250 Watts
• Max. CB temperature – Si – 150 °C to 225 °C – Ge – 60 °C to 100
°C
Case temperature °C
Power dissipation PD
PD(MAX)
Typical power derating curve100 200
Maximum operating temperature
Defn.:when the transistor is in operation it
dissipates power & its junction temperature rises, which in turn causes collector current to increase. This may lead to more power dissipation & further increase in temperature & subsequent increase in collector current. If this cycle continues, it may result in permanent damage to the transistor. This phenomenon is known as “Thermal Runaway”.
PD Tj IC
…• Steady state junction temperature,
Tj – TA = θ PD
Where Tj – junction temperature TA – ambient temperaturePD – power dissipated in transistor
θ – thermal resistance °C/W
Thermal Resistance:ratio of the rise in transistor junction
temperature to the amount of power dissipated.
Which depends on –
• Transistor size• Size of heat sink• Other cooling method, such as forced air
Thermal resistance (θ):
Tj – TA dTj
θ = ----------- = -------- PD dPD
dPD 1 ----------- = -------- dTj θ
Operating Point considerations against thermal run-away:
At Q2:IC ↑ Q2 to move on
100mW curve PD ↓ thermally stable
At Q3:IC ↑ Q3 to move on
200mW curve PD ↑ thermally instable checked for thermal runaway
4.8 Transistor switch
• Another major application of transistor is Switch
…While designing,Transistor is heavily saturatedIC(sat) = VCC / RC
IB(sat) = IC(sat)/ βUsually IB(max) = IB(sat) x 0.25The minimum i/p voltage to drive
transistor in saturation isVIH = IB(max) RB + VBE
Rsat = VCE(sat) / IC(sat) ≈ few tens of Ohms
Transistor Switching Delay:
During ON:tD=delay time=to 10%tr=rise time=10% to
90%turn-ON time=tD+tr
During OFF:ts=storage time=fall to
10%tf=fall time=90% to
10%toff=turn-OFF time =ts+tf
Numerical:
An input pulse is applied to the transistor switch shown in figure. What is the minimum input voltage required to make the LED glow? It is given that the minimum current required by the LED to glow is 10mA, voltage drop across LED is 1.5V, BE voltage 0.7V, CE voltage at saturation is 0.5V.
IE=IC=10mA 1.5V
VBE = 0.7V
IB=IC / β =10mA / 100 = 1µA
VCE(sat) = 0.5V
1..Vp ?
2..IC(sat) ?
3..IB(sat) ?
=β x IC(sat)
4..IB(max) ?
=1.25 x IB(sat)
UJT (unijunction transistor)
• Only 1 pn junction, unlike 2 (BE & CB)• Current controlled• Negative resistance exists• May be used as switch
Construction:
Equivalent Circuit:
Intrinsic stand-off ratio:
= RBB1 / (RBB1 + RBB2)
VI characteristics:VP = VBB + V
Operation:when VE ↑ -IEO reaches 0, then ↑ to IP at VP, IE ↑ with VE ↓ up to IV & VV known as negative resistance, further behaves as a normal resistance.
UJT Relaxation Oscillator:
SCR (silicon controlled rectifier):Operation:A momentary pulse
applied to the gate increases the base current of npn transistor initiating regenerative feedback action;. This action ultimately drives both transistors to saturation causing switching-ON by conducting heavily.
Characteristics:
CB
BEFB
BE FB
CB
Questions:
1. Explain selecting a suitable operating point (104)
2. Explain DC & load-line analysis of fixed bias (105)
3. What are the parameters that vary the Q –point (ans:- IB, RC, VCC -108)
4. Problem 4.1 (109)5. Explain DC & load-line analysis of emitter /
self bias (110)6. Problem 4.2 & 4.3 (113)
7. Explain DC & load-line analysis of VDB with EB circuit (115)
8. Problem 4.4 (119)9. Explain DC & load-line analysis of collector-to-
base bias (124)10. Problem 4.7 (127)11. Define thermal runaway. Explain operating point
considerations in thermal runaway (147)12. Explain transistor as a switch. Brief about switching
delays (152)13. Explain UJT, relaxation oscillator (215)14. Explain SCR (227)
End
ofUnit 1: Transistors, UJT & Thyristors
IC (Integrated Circuit)
Overview
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Vin = HIGH (≈5Volts)Saturation region, IC(sat)=VCC / RC
VCE = VCC - IC(sat) RC
= 0 Volt = logic LOW
Cut-off region, IC ≈ 0VCE = VCC - IC RC
= logic LOW