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Technion - IITDept. of Electrical Engineering

Tutorial 6 RF Integrated Circuits046903

Tutorial 6

S-parameters

November 28, 2012

Topics:

S-parameter Definitions

S-matrix Calculation For a 2-port Network

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Question 1

Calculate the S-parameter matrix of a parallel 100 resistor in a 50 system.

Solution:

S = 0.2 0.8

0.8 0.2

Question 2

(a) Write the S-parameter matrix of an ideal MOSFET in CS configuration.

Solution:

S =

1 0

2gmZ0 1

(b) Repeat with Cgs, Cgd = 0, r0 < . Assume that S12 0.

Solution:

S =

1

j[Cgs+Cgd(1+gm(r0||Z0))]Z0

1

j[Cgs+Cgd(1+gm(r0||Z0))]+Z0

0

2(jCgdgm)(r0||Z0)(1+jZ0[Cgs+Cgd(1+gm(r0||Z0))])(1+jCgd(r0||Z0))

r0|| 1jCgd

Z0

r0|| 1jCgd+Z0

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Important Formulas:

Wave - Voltage/Current Transformations:

V1 = E1i + E1r V2 = E2i + E2rI1 =

E1iE1rZ0

I2 =E2iE2r

Z0

Power Waves:

a1 =E1iZ0 a2 =

E2iZ0

b1 =E1rZ0

b2 =E2rZ0

S-matrix: b1b2

=

S11 S12S21 S22

a1a2

S-parameters:

S11 =b1a1

a2=0

- Input reflection coefficient S12 =b1a2

a1=0

- Reverse transducer gain

S21 =b2a1a2=0

- Forward transducer gain S22 =b2a2a1=0

- Output reflection coefficient

Reflection Coefficients with Arbitrary Load:

in = s11 = s11 +

s12s21L1 s22L

out = s22 = s22 +

s12s21S1 s11S

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Notes on Miller Effect:

Our goal is to disconnect Cgd to prevent feedback and get S12 = 0 . We need to do this to simplifythe solution which is very difficult otherwise. However, we should do so while minimizing damageto the accuracy of the results well get. Therefore, we will take the following steps to replicate asmuch of Cgds influence on the circuit as possible.

Input Capacitance:When we put a test voltage vin on the gate, we need to look at the current drawn from it. Onepart of the current is drawn by Cgs:

iin,Cgs = j Cgsvin

The second component is drawn by Cgs, and for that we need to know the voltage on the drain. Atlow frequencies it is safe to assume that the drain voltage is determined by the low-frequency gain:

vd = Avvin = gm (r0||Z0) vin

This assumption eventually wont be valid of course, but its the only tool we have for an easy

manual approximation.We can see that compared to simply vin, the voltage drop on Cgd is actually increased because ofthe gain:

vCgd = vin vd = vin (1 + Av) = vin (1 + gm (r0||Z0))

The current which Cgd draws from the source is:

iin,Cgd = j Cgdvin (1 + Av) = jCgdvin (1 + gm (r0||Z0))

This is interpreted by the source as the following capacitor, parallel to Cgs:

CM = Cgd (1 + gm (r0||Z0))

Output Current Source:The current which flows through Cgd needs to be accounted for in the output. This is done byadding the following controlled current source, parallel to gmvgs:

idrain,Cgd = j Cgd (vg vd)

This is simply the admittance ofCgd, multiplied by the voltage that would fall on it were it still in themodel. Note that when testing output impedance, vg = 0 and this current source degenerates intoa capacitor with the value of Cgd, which is probably the familiar form of the Miller approximationto most of you.Gain and Unilaterality:

In class we disconnected the feedback using the Miller Effect and got S12 = 0 as requested. We

will see in later tutorials examples of S12 and its implications. We saw in the tutorial that for highfrequencies the voltage gain is shorted out by Cgd . In spite of that, S21 is dominated by the effectof the Miller pole which starts to degrade it at much lower frequencies. Note, however, that asidefrom this reduction of S21 , the shorting of the voltage between gate and drain will also cause S12to increase with frequency! Therefore this CS stage is plagued with both reduction of gain withfrequency and reduction of unilaterality, as frequencies grow.

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