ts-7800 schematic rev. g...rev: designer sheet of title: technologic systems date ts-7800...

12
of Sheet Designer Re v: Tit le : Da t e Technologic Systems TS-7800 Documentation 1 12 G July 23, 2015 TS-7800 Changes from Rev. E to G Fixed Left Ethernet LED (reversed polarity) Changed to new Full-size SD card socket Due to EOL on old socket Added TVS and res on DIO Header for keypad Added Console TVS on COM3 Improve clearance for bottom parts Added R15 (0 Ohms) to connect Frame to GND Improved board design with more by pass caps

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  • ofShe e tDe s igne rRe v:

    Tit le :

    Da teTe chnologic Sys t e ms

    TS-7800 Docume nta t ion

    1 12G

    July 23, 2015

    TS-7800

    Changes from Rev. E to G

    Fixed Left Ethernet LED (reversed polarity)

    Changed to new Full-size SD card socket Due to EOL on old socket

    Added TVS and res on DIO Header for keypad

    Added Console TVS on COM3

    Improve clearance for bottom parts

    Added R15 (0 Ohms) to connect Frame to GND

    Improved board design with more by pass caps

  • Te chnologic Sys t e ms Da te

    Tit le :

    Re v: De s igne r She e t of

    TS-7800 Ma rve ll 88F5182 CPU

    2RLM

    33MHz

    12

    July 23, 2015

    G

    Byte La ne s Swa ppe d

    Sta rt_Burs t le ngth = Ave of 4 da t a la ne s + CLK

    166MHz

    (PCI_CLK_OUT0)

    (PCI_CLK_OUT1)

    (UART1_RTS)

    (UART1_CTS)

    (UART1_RXD)

    (UART1_TXD)

    (Input )

    K8S_AVDD

    Y2MPP_0

    Y1MPP_1

    W4MPP_2

    Y3MPP_3

    W1MPP_5

    V4MPP_6

    W3MPP_7

    P3MPP_8

    N3MPP_9

    N4MPP_10

    M4MPP_11

    M3MPP_12

    L4MPP_13

    L3MPP_14

    M2MPP_15

    F4MPP_16

    F2MPP_17

    F1MPP_18

    F3MPP_19

    T4MPP_20

    U4MPP_21

    V3MPP_22

    U3MPP_23

    R4MPP_24

    T12VDD_O

    P4MPP_25

    E11NC

    M5NC

    P1NC

    W20SATA_RES

    V20SATA_TP

    T19NC

    W19NC

    Y19NC

    W2MPP_4

    V22SATA_R1-

    V21SATA_R1+

    AB21SATA_R0+

    AB22SATA_R0-

    U21SATA_T1-

    Y21SATA_T0-

    Y22SATA_T0+

    U22SATA_T1+

    T3USB_TP

    R3USB_ISET

    T2USB_DP0

    U2USB_DM1

    U1USB_DP1

    T1USB_DM0

    P2SATA_USB_CLK

    E2UA0_TXD

    E4UA0_RXD

    E1UA0_CTS

    E3UA0_RTS

    H9VDD_CPU

    H14VDD_CORE

    G10VDD_M

    G8VDD_M

    G9VDD_M

    G11VDD_M

    H15VDD_O

    G12VDD_M

    G13VDD_M

    K9VDD_GE

    G14VDD_M

    G15VDD_M

    H8VDD_M

    H13VDD_M

    L9VDD_GE

    AA21NC

    AA

    22

    GN

    D

    AA

    7G

    ND

    AA

    2G

    ND

    H10VDD_CPU

    H11VDD_CPU

    H12VDD_CPU

    J8VDD_CPU

    M18VDD_CPU

    J9VDD_O

    J15VDD_O

    K15VDD_O

    M9VDD_O

    T8VDD_O

    T10VDD_O

    T11VDD_O

    L14PEX_AVDD

    L11VDD_CORE

    L12VDD_CORE

    N9VDD_CORE

    N11VDD_CORE

    N12VDD_CORE

    N15VDD_CORE

    R12VDD_CORE

    T9VDD_CORE

    V12VDD_CPU

    P1

    3G

    ND

    P1

    4G

    ND

    P1

    1G

    ND

    P1

    2G

    ND

    P2

    0G

    ND

    R1

    GN

    DR

    2G

    ND

    R5

    GN

    DR

    9G

    ND

    R1

    0G

    ND

    R1

    4G

    ND

    R1

    8G

    ND

    R2

    0G

    ND

    T2

    1G

    ND

    T2

    2G

    ND

    U2

    0G

    ND

    P8USB_AVDD

    R8USB_AVDD

    R1

    3G

    ND

    V1

    GN

    DV

    2G

    ND

    V5

    GN

    DV

    8G

    ND

    T13VDD_O

    T14VDD_O

    L15PEX_AVDDH

    P9

    GN

    D

    AA

    20

    GN

    D

    M8T_AVDD

    M15PEX_AVDDL

    R15SATA_SVDD

    T15SATA_SVDD

    AA

    11

    GN

    DA

    A1

    5G

    ND

    N8T_AVSS

    V1

    1G

    ND

    V1

    5G

    ND

    V1

    8G

    ND

    R1

    1G

    ND

    W2

    1G

    ND

    AB

    20

    GN

    D

    W2

    2G

    ND

    L8S_AVSS

    Y2

    0G

    ND

    L5G

    ND

    K1

    4G

    ND

    K1

    3G

    ND

    K1

    2G

    ND

    K1

    1G

    ND

    K1

    0G

    ND

    J21

    GN

    D

    J14

    GN

    D

    J13

    GN

    D

    J12

    GN

    D

    J11

    GN

    D

    J10

    GN

    D

    H1

    8G

    ND

    H5

    GN

    D

    G2

    GN

    D

    E2

    0G

    ND

    E1

    8G

    ND

    E1

    5G

    ND

    E1

    2G

    ND

    E8

    GN

    D

    E5

    GN

    D

    C2

    0G

    ND

    C1

    7G

    ND

    C1

    4G

    ND

    C1

    1G

    ND

    C8

    GN

    D

    B2

    GN

    D

    C5

    GN

    D

    E19TCLK_OUT

    N1CORE_REF_CLK

    G3CPU_REF_CLK

    W7SYS_RESET#

    N1

    4G

    ND

    N2

    GN

    D

    M1

    4G

    ND

    M1

    3G

    ND

    M1

    2G

    ND

    M1

    1G

    ND

    M1

    0G

    ND

    M1

    GN

    D

    L18

    GN

    D

    L13

    GN

    D

    L10

    GN

    D

    N1

    0G

    ND

    N1

    3G

    ND

    AB3SYSRST_OUT#

    C3

    GN

    D

    B2

    1G

    ND

    AB1JT_CLK

    W5JT_TDI

    AA3JT_TDO

    AB2JT_TMS_CPU

    Y4JT_TMS_CORE

    AA1JT_RTST#

    D5M_DQS1

    A3M_DQS0

    A20M_DQS2

    C19M_DQS3

    A8M_START

    B8M_START_IN

    B6M_CLKOUT0 A6

    M_CLKOUT0#

    B7M_CLKOUT1 A7

    M_CLKOUT1#

    C13M_RAS#

    A1M_DQ0 A2M_DQ1 B5M_DQ2 A5M_DQ3 C1M_DQ4 B1M_DQ5 B4M_DQ6 A4M_DQ7 C2M_DQ8 D4M_DQ9 C6

    M_DQ10 C7M_DQ11 D2M_DQ12 D3M_DQ13 D6M_DQ14 D7M_DQ15 B18M_DQ16 A19M_DQ17 A22M_DQ18 B22M_DQ19 A17M_DQ20 A18M_DQ21 B20M_DQ22 A21M_DQ23 D17M_DQ24 C18M_DQ25 D20M_DQ26 C22M_DQ27 D16M_DQ28 B17M_DQ29 D19M_DQ30 C21M_DQ31

    J4GE_TXD0

    H1GE_TXD1

    H2GE_TXD2

    H3GE_TXD3

    K1GE_RXD0

    K2GE_RXD1

    K3GE_RXD2

    L1GE_RXD3

    G1GE_CLK_125

    H20DEV_D7

    M21DEV_D11 M22DEV_D12 L22DEV_D13 L21DEV_D14 L20DEV_D15

    E21DEV_READY#

    D22DEV_BURST#

    L19DEV_A0

    H4GE_MDIO

    G4GE_MDC

    H19DEV_D8

    J3GE_TXCTL

    H21DEV_D6

    L2GE_RXCTL

    M19DEV_D9

    J2GE_TXCLK

    M20DEV_D10

    K4GE_RXCLK

    J1GE_TXCLK_OUT

    K22DEV_A1

    G20DEV_WE0#

    F19DEV_OE#

    E22DEV_BOOT_CE#

    H22DEV_D5

    K20DEV_D0 K19DEV_D1 J22DEV_D2 J20DEV_D3 J19DEV_D4

    AA14PCI_CBE1#

    AB12PCI_CBE2#

    AA9PCI_CBE3#

    AB5PCI_CLK

    AB13PCI_DEVSEL#

    W12PCI_FRAME#

    Y7PCI_GNT#

    W10PCI_IDSEL

    W6PCI_INT#

    AA12PCI_IRDY#

    AA18PCI_AD5 Y17PCI_AD6 AB18PCI_AD7 AA17PCI_AD8 Y16PCI_AD9 AA16

    PCI_AD10 W15PCI_AD11 AB16PCI_AD12 Y15PCI_AD13 AB15PCI_AD14 W14PCI_AD15 Y12PCI_AD16 AB11PCI_AD17 Y11PCI_AD18 AB10PCI_AD19 W11PCI_AD20 AA10PCI_AD21 Y10PCI_AD22 AB9PCI_AD23 Y9PCI_AD24 AB8PCI_AD25 W9PCI_AD26 AA8PCI_AD27 Y8PCI_AD28 AB7PCI_AD29 W8PCI_AD30 AB6PCI_AD31

    W16PCI_CBE0#

    K21DEV_A2

    G22DEV_ALE0

    G21DEV_ALE1

    B13M_BA0

    D12M_BA1

    A16M_ODT0 A15M_ODT1 C16M_ODT2 B16M_ODT3

    P1

    0G

    ND

    D8M_CKE0

    D9M_CKE1

    D1M_CAL

    D21P_CAL

    D10M_SSTL_VREF

    G19DEV_WE1#

    F22DEV_CE0#

    F21DEV_CE1#

    F20DEV_CE2#

    P15SATA_SVDD

    N2

    2G

    ND

    D14M_CAS#

    B14M_WE#

    A14M_CS0# C15M_CS1# D13M_CS2# D15M_CS3#

    B12M_A1

    C12M_A0

    A12M_A2 A11M_A3 B11M_A4 D11M_A5 A10M_A6 C10M_A7 B10M_A8 B9M_A9 A13

    M_A10 A9M_A11 C9M_A12 B15M_A13

    C4M_DM1

    B3M_DM0

    V19TW_SDA

    B19M_DM2

    U19TW_SCK

    D18M_DM3

    N21PEX_ISET

    W18PCI_AD0 AA19PCI_AD1 Y18PCI_AD2 AB19PCI_AD3 W17PCI_AD4

    Y14PCI_PAR

    AA13PCI_PERR#

    AA6PCI_REQ#

    W13PCI_STOP#

    AB14PCI_SERR#

    Y13PCI_TRDY#

    Y5PCI_ENUM#

    AA4PCI_LED

    Y6PCI_HS

    AA5PCI_VIO

    AB4PCI_CAL

    AB17PCI_M66_EN

    R19PEX_CLK+

    P19PEX_CLK-

    R22PEX_R

    R21PEX_R#

    P22PEX_T

    P21PEX_T#

    N20PEX_HSDAC+

    N19PEX_HSDAC-

    T20PEX_TP

    U8

    MV_88F5182

    R99

    51

    R92

    51

    R78

    4.99K

    R22

    6.04K

    R69100

    R68100

    C218.1 uF

    C222.1 uF

    R65100

    R66100

    R40

    22

    R82

    4.99K

    R20

    6.04K

    R21

    6.04K

    78RN15-D

    2.2K

    R804.99K

    R814.99K

    GE_TXD0

    GE_TXD1

    GE_TXD2

    GE_TXD3

    GE_RXD0

    GE_RXD1

    GE_RXD2

    GE_RXD3

    GE_CLK_125

    GE_MDIO

    GE_MDC

    GE_TXCTL

    GE_RXCTL

    GE_RXCLK

    GE_TXCLK_OUTADD[00:13]

    ADD00ADD01ADD02ADD03ADD04ADD05ADD06ADD07ADD08ADD09ADD10ADD11ADD12

    DATA[00:31]

    M_BA0

    M_BA1

    M_CS#

    M_RAS#

    M_CAS#

    M_WE#

    M_DM1

    M_DM0

    M_DM2

    M_DM3

    M_DQS1

    M_DQS0

    M_DQS2

    M_DQS3

    M_CLK0

    M_CLK0#

    2.5V

    VDD_CPU

    1.2V

    3.3V

    USB_0_P

    USB_0_M

    USB_1_P

    USB_1_M

    PCI_AD[00:31]

    PCI_FRAME#

    PCI_REQ#

    PCI_IRDY#

    PCI_PAR

    PCI_STOP#

    $$$20

    3.3V

    UART0_TXD

    UART0_RXD

    CPU_RESET#

    JTAG_DOUT

    JTAG_CLK

    JTAG_DIN

    UART1_RXD

    UART1_TXDDEV_D[00:15]

    DEV_D00

    DEV_D02

    DEV_D04

    DEV_D12

    DEV_D15

    2.5V

    2.5V

    M_CKE1

    M_CLK1

    M_CLK1#

    2.5V

    3.3VSATA_2.5V

    3.3V

    VDD_CPU

    USB_3.3V

    PCI_CBE0#

    PCI_CBE1#

    PCI_CBE2#

    PCI_CBE3#

    PCI_DEVSEL#

    PCI_GNT#

    PCI_PERR#

    PCI_SERR#

    TW_CLK

    TW_DATA

    PCI_HS

    CPU_25MHZ

    PCI_INT#

    PCI_TRDY#

    JTAG_TMS

    SATA1_TX_M

    SATA1_TX_P

    SATA1_RX_P

    SATA1_RX_M

    DATA00DATA01DATA02DATA03DATA04DATA05DATA06DATA07DATA08DATA09DATA10DATA11DATA12DATA13DATA14DATA15DATA16DATA17DATA18DATA19DATA20DATA21DATA22DATA23DATA24DATA25DATA26DATA27DATA28DATA29DATA30DATA31

    SYSRST_OUT#

    MPP_6

    MPP_7

    PCI_AD18

    JTAG_CLK

    JTAG_DIN

    JTAG_CPU_DOUT

    JT_TMS_CPU

    JTAG_TMS

    CPU_RESET#

    PCI_AD00PCI_AD01PCI_AD02PCI_AD03PCI_AD04PCI_AD05PCI_AD06PCI_AD07PCI_AD08PCI_AD09PCI_AD10PCI_AD11PCI_AD12PCI_AD13PCI_AD14PCI_AD15PCI_AD16PCI_AD17PCI_AD18PCI_AD19PCI_AD20PCI_AD21PCI_AD22PCI_AD23PCI_AD24PCI_AD25PCI_AD26PCI_AD27PCI_AD28PCI_AD29PCI_AD30PCI_AD31

    MPP_3

    $$$27971

    $$$27241

    3.3V

    SATA0_TX_M

    SATA0_TX_P

    SATA0_RX_M

    SATA0_RX_P

  • Te chnologic Sys t e ms Da te

    Tit le :

    Re v: De s igne r She e t of

    TS-7800 DDR RAM Fla s h

    3

    NAND Fla s h

    DEV_D00 high e na ble s

    CPU Init ia liza t ion

    DDR1 SDRAM

    Te mp Se ns or

    CPU_SPEED high = 500 MHz

    Low = 333 MHz

    Boot us ing I2C init ia liza t ion

    Ma rve ll s t a t e s t he s e two

    line s mus t be in t he s e s t a t e s

    Jumpe rs

    JP1 = Fa s t Boot t o NAND Fla s h

    JP2 = Ena ble cons ole on COM1

    JP3 = CPU Spe e d is 333 MHz

    12G

    July 23, 2015

    29A030A131A232A335A436A537A638A739A840A928A1041A1142A12

    26BA0

    27BA1

    23 RAS#

    22 CAS#

    21 WE#

    44CKE

    45 CLK

    24 CS#

    1VCCINT 18VCCINT

    14NC

    3VCCIO 9VCCIO 55VCCIO 61VCCIO

    2DQ0 4DQ1 5DQ2 7DQ3 8DQ4 10DQ5 11DQ6 13DQ7

    54DQ8 56DQ9 57

    DQ10 59DQ11 60DQ12 62DQ13 63DQ14 65DQ15

    6GNDIO 12GNDIO

    34GND 48GND

    52GNDIO 58GNDIO

    47UDM

    49VREF

    50DNU

    51UDQS

    53NC

    66GND

    64GNDIO

    16LDQS

    17NC/A13

    19DNU

    20LDM

    25NC 43NC

    46CLK#

    33VCCINT

    15VCCIO

    U14

    DDR1_RAM

    29A030A131A232A335A436A537A638A739A840A928A1041A1142A12

    26BA0

    27BA1

    23 RAS#

    22 CAS#

    21 WE#

    44CKE

    45 CLK

    24 CS#

    1VCCINT 18VCCINT

    14NC

    3VCCIO 9VCCIO 55VCCIO 61VCCIO

    2DQ0 4DQ1 5DQ2 7DQ3 8DQ4 10DQ5 11DQ6 13DQ7

    54DQ8 56DQ9 57

    DQ10 59DQ11 60DQ12 62DQ13 63DQ14 65DQ15

    6GNDIO 12GNDIO

    34GND 48GND

    52GNDIO 58GNDIO

    47UDM

    49VREF

    50DNU

    51UDQS

    53NC

    66GND

    64GNDIO

    16LDQS

    17NC/A13

    19DNU

    20LDM

    25NC 43NC

    46CLK#

    33VCCINT

    15VCCIO

    U15

    DDR1_RAM

    9CS#

    8RD#

    18WR#

    17ALE

    16CMD

    19WP#

    12VCC1

    37VCC2

    29D0

    30D1

    31D2

    32D3

    41D4

    42D5

    43D6

    44D7

    13GND2 36GND3

    7BUSY#

    6GND1

    U9

    NAND_512MB_SLC

    R57100

    R58100

    C131.1 uF

    R73100

    R74100

    C130.1 uF

    C129.1 uF

    C139.1 uF

    C121.1 uF

    C174.1 uF

    C140.1 uF

    C141.1 uF

    C116.1 uF

    C133.1 uF

    C132.1 uF

    C136.1 uF

    C142.1 uF

    C143.1 uF

    C138.1 uF

    R72100

    R67100

    R61100

    R62100

    R60100

    R59100

    R70100

    R71100

    R63100

    R64100

    3NC1

    7CS#

    1DATA

    2CLK

    8VCC

    6NC2

    5ALERT

    4GND

    U16

    TMP124_SOIC8

    12RN15-A

    2.2K

    3 4RN15-B

    2.2K

    5 6RN15-C

    2.2K

    1 2RN16-A

    2.2K

    5 6RN16-C

    2.2K

    3 4RN16-B

    2.2K

    7 8RN16-D

    2.2K

    56RN11-C

    2.2K

    321

    642

    531

    HD3

    JUMPER_2X3

    R25

    1.5K

    1

    2

    RN10-A2.2K

    VCCGND

    3

    2

    1

    4

    5

    6

    U27

    74LVC2G04DCK_SMT

    3

    4

    RN10-B

    2.2K

    C134.1 uF

    C75

    10 uF

    C71

    10 uF

    C175.1 uF

    C105.1 uF

    C104.1 uF

    C103.1 uF

    C102.1 uF

    C114.1 uF

    C115.1 uF

    C110.1 uF

    DATA[00:31]

    ADD[00:13]

    ADD00ADD01ADD02ADD03ADD04ADD05ADD06ADD07ADD08ADD09ADD10ADD11ADD12

    ADD00ADD01ADD02ADD03ADD04ADD05ADD06ADD07ADD08ADD09ADD10ADD11ADD12

    M_BA0

    M_BA1

    M_BA0

    M_BA1

    M_RAS#

    M_CAS#

    M_WE#

    M_CS#

    M_CS#

    M_RAS#

    M_CAS#

    M_WE#

    M_DM1

    M_DM0

    M_DM2

    M_DM3

    M_DQS2

    M_DQS3

    M_DQS1

    M_DQS0

    M_CKE1

    M_CKE1

    M_CLK1#

    M_CLK1

    M_CLK0#

    M_CLK0

    3.3V

    NAND_BUSY#

    3.3V

    FD[0:7]

    DEV_D[00:15]

    DEV_D04

    2.5V

    2.5V

    2.5V

    2.5V

    NAND_ALE

    NAND_CLE

    NAND_CS#

    NAND_RD#

    NAND_WR#

    2.5V 2.5V

    2.5V2.5V

    TMP_CS#

    3.3V

    SPI_MISO

    SPI_CLK

    DEV_D02

    DEV_D15

    DEV_D12

    JP3#

    3.3V DEV_D00

    $$$27971

    $$$272413.3V

    3.3V

    5V

    JP3

    JP1#

    JP2#

    3.3V

    SPI_MISO BUF_SPI_MISO

    JP3 JP3#

    FD0

    FD1

    FD2

    FD3

    FD4

    FD5

    FD6

    FD7

    DATA11DATA10DATA15DATA14DATA09DATA08DATA13DATA12

    DATA03DATA02DATA07DATA06DATA01DATA00DATA05DATA04

    DATA19DATA18DATA23DATA22DATA17DATA16DATA21DATA20

    DATA27DATA31DATA26DATA30DATA25DATA24DATA29DATA28

    $$

    $8

    $$$7

  • ofShe e tDe s igne rRe v:

    Tit le :

    Da teTe chnologic Sys t e ms

    TS-7800 Bypa s s Ca ps

    4 12G

    July 23, 2015

    Ne a r CPU

    Ne a r CPU

    Ne a r FPGA

    Ne a r CPU

    Ne a r CPU

    Ne a r FPGA

    C219.1 uF

    C221.1 uF

    C223.1 uF

    C224.1 uF

    C225.1 uF

    C226.1 uF

    C227.1 uF

    C228.1 uF

    C229.1 uF

    C230.1 uF

    C231.1 uF

    C232.1 uF

    C233.1 uF

    C234.1 uF

    C235.1 uF

    C236.1 uF

    C237.1 uF

    C238.1 uF

    C173.1 uF

    C168.1 uF

    C172.1 uF

    C126.1 uF

    C127.1 uF

    C125.1 uF

    C258.1 uF

    C128.1 uF

    C257.1 uF

    C210.1 uF

    C211.1 uF

    C212.1 uF C213.1 uF

    C214.1 uF

    C215.1 uF

    C216.1 uF C217.1 uF

    C241.1 uF

    C242.1 uF

    C243.1 uF

    C244.1 uF C245.1 uF

    C248.1 uF

    C249.1 uF

    C250.1 uF

    C251.1 uF

    C246.1 uF

    C259.1 uF

    C262.1 uF

    C260.1 uF

    C261.1 uF

    C264.1 uF

    C263.1 uF

    C107.1 uF

    C190.1 uF

    C179

    .1 uF

    C178.1 uF

    C265.1 uF

    C266.1 uF

    C267.1 uF

    C268.1 uF

    C247.1 uF

    C239.1 uF

    C240.1 uF

    C220.1 uF

    C40

    47 uF

    1.2V

    VDD_CPU

    3.3V

    2.5V

    3.3V

    1.2V

  • ofShe e tDe s igne rRe v:

    Tit le :

    Da teTe chnologic Sys t e ms

    10/100/1000 Ethe rne t

    5RLM

    TS-7800 Ethe rne t a nd USB Hos t Port s

    1.8V

    USB Port s

    (To CPLD)

    (To FPGA)

    July 23, 2015

    G 12

    C37

    15 pF

    C38

    15 pF

    GNDVCC

    3

    2

    1

    4

    5

    6

    U26

    74LVC2G04DCK_SMT

    51RXD1

    54RXD2

    55RXD3

    45MDIO

    53RX_CLK

    35HSDACN

    58TXD0

    59TXD1

    61TXD2

    62TXD3

    60TX_CLK

    50RXD0

    63TX_CTRL

    48MDC

    31MDI_P0

    19MDI_N3

    8LED_1

    10RESET#

    11J_RST#

    38XTAL_IN

    39XTAL_OUT

    33RSET

    21AVDD_1

    22AVDD_2

    44J_TDO

    42J_TCK

    41J_TMS

    43J_TDI

    3CONFIG3

    2CONFIG2

    1CONFIG1

    64CONFIG0

    9LED_2

    6LED_0

    14AVDDR_1

    37AVDDC_2

    34AVDDC_1

    29AVDD_4

    27AVDD_3

    49RX_CTRL

    36HSDACP

    32TST_PT

    57VREF

    4CLK_125MHZ

    30MDI_N0

    25MDI_N1

    23MDI_N2

    13DVDD_2

    56VDDOR_2

    46VDDO_2

    7VDDO_1

    28NC

    65

    EP

    AD

    12DIS_REG12

    18NC

    17CNTRL18

    47DVDD_4

    5DVDD_1

    52VDDOR_1

    40DVDD_3

    16AVDDX

    15AVDDR_2

    26MDI_P1

    24MDI_P2

    20MDI_P3

    U13

    MV_88E1118

    2

    1

    3

    Q1

    R794.99K1%

    C74

    10 uF

    C112

    .1 uF

    C111

    .1 uF

    C7610 uF

    R39

    22

    R9551

    R9651

    R9351

    R9451

    R9751

    R9851

    R9151

    R9051

    R271.5K

    C90

    10 uF

    C802.2 nF

    C812.2 nF

    C113

    .1 uF

    USBDua l

    4

    123

    5678

    9FRAME 10FRAME

    11FRAME 12FRAME

    J2

    CONN_USB_DUAL_RA

    PF1

    1100 mA

    FB3

    220 ohm

    R18

    680K

    C122

    .1 uF

    C177

    .1 uF

    C109

    .1 uF

    C185

    .1 uF

    C145

    .1 uF

    C108

    .1 uF

    R31226

    R34

    226

    C124 .1 uF

    C120 .1 uF

    C197 .1 uF

    C123 .1 uF

    Le ft

    8

    7

    5

    4

    6

    3

    2

    1

    POE

    POEShie ld

    Alignme ntPe gs

    11

    12

    10

    4

    6

    5

    3

    1

    2

    8

    7

    9

    22

    15

    14

    16

    13

    19 20

    17

    18

    21

    T1

    MAGJACK_GIG_7800

    R16

    1 ohmR17

    1 ohm

    2

    1

    3

    Q3

    C73

    10 uF

    C135

    .1 uF

    C137

    .1 uF

    C176

    .1 uF

    FB6

    220 ohm

    1 2

    Y1

    25 MHz

    R83

    4.99K

    C144.1 uF

    C117.1 uF

    C118.1 uF

    C119.1 uF

    TP44

    TP45

    3.3V

    CPU_RESET#

    GE_RXCLK

    GE_RXD0

    GE_RXD1

    GE_RXD2

    GE_RXD3

    GE_RXCTL

    GE_MDIO

    GE_MDC

    GE_TXCLK_OUT

    GE_TXD0

    GE_TXD1

    GE_TXD2

    GE_TXD3

    GE_TXCTL

    2.5V

    GE_CLK_125

    PHY_LED0

    PHY_LED1

    2.5V

    1.2V

    USB_0_P

    USB_0_M

    USB_1_P

    USB_1_M

    5V

    PHY_LED1

    PHY_LED1

    PHY_LED0

    1.8V

    1.8V

    2.5V

    2.5V

    CLK_25MHZ

    CPU_25MHZ

    2.5V

    2.5V

    JTAG_CLK

    JTAG_CPLD_DOUT

    JTAG_DOUT

    JTAG_TMS

    2.5V

    2.5V

    FRAME

    $$$12506

    $$$29908

    $$$8919$$$8917

  • Te chnologic Sys t e ms Da te

    Tit le :

    Re v: De s igne r She e t of

    TS-7800 FPGA a nd PLD

    6

    SPI Fa s t Mode is s e le ct e d

    whe n pin M16 is bia s e d low

    Pin K11 is Da ta Input for Se r. Config

    It is t he Se ria l Fla s h CS# for SPI Mode

    Config_CLK is output in SPI Mode

    a nd is a n input in Se ria l Config Mode

    SPI Mode re quire s re s is t or pull-down

    Se ria l Fla s h

    All PBxx pins ha ve PCI cla mp diode s

    The s e a re a ll in Ba nk4 a nd Ba nk5

    SPI

    CPLD5V Tole ra nt

    on a ll pins (Globa l opt ion)

    Ena ble Re s is tor Pull-ups

    G

    July 23, 2015

    12

    C8

    GN

    D5

    B5

    GN

    D4

    E2

    GN

    D6

    B1

    2G

    ND

    3

    A1

    6G

    ND

    2

    A1

    GN

    D1

    H8

    GN

    D8

    E1

    5G

    ND

    7

    H9

    GN

    D9

    H1

    4G

    ND

    10

    J3G

    ND

    11

    J8G

    ND

    12

    J9G

    ND

    13

    M2

    GN

    D1

    4

    M1

    5G

    ND

    15

    P9

    GN

    D1

    6

    R5

    GN

    D1

    7

    T15VCCIO8

    R1

    2G

    ND

    18

    T1

    GN

    D1

    9

    T1

    6G

    ND

    20

    K10V_CORE

    N15MODE_0

    N14MODE_1

    G8VCC_AUX

    H10VCC_AUX

    J7VCC_AUX

    E3VCCIO7

    G5VCCIO7

    K5VCCIO6

    M3VCCIO6

    K9VCC_AUX

    C5VCCIO0

    P5VCCIO5

    G7V_CORE

    G9V_CORE

    G10V_CORE

    M10VCCIO4

    J10V_CORE

    K8V_CORE

    H7V_CORE

    P12VCCIO4

    K12VCCIO3

    M14VCCIO3

    E14VCCIO2

    G12VCCIO2

    C12VCCIO1

    M7VCCIO5

    E7VCCIO0

    E10VCCIO1

    P3TDO

    N3TMS

    M4TCK

    N4TDI

    M13DONE#

    R14CONFIG_CLK

    N13PROGRAM#

    L12INIT#

    R15MODE_2

    K7VCC_JTAG

    E6X_RES

    J14PLLCAP_RIGHT

    J6PLLCAP_LEFT

    R11PB48B

    T11PB51A

    P11PB50B

    T10PB48A

    T13PB53A

    R13PB54A

    M8PB26B_CLK5-

    M9PB47B

    C9PT33A

    A9PT35B

    B9PT35A

    A10PT36A

    B10PT36B

    A11PT48A

    B11PT48B

    F10PR9A

    K6PB3A

    M16PR29A_FAST#

    K16PR21A_PLL_FB+

    G16PR13B_CLK2-

    F15PR11B

    D16PR7B

    C16PR5B

    B16PR5A

    J16PR20B_PLL_IN-

    H13PR17A_DLL_IN+

    H15PR16B

    F14PR11A

    E13PR2A

    F12PR12A

    D13PT51A

    C14PT51B

    E12PT53B

    A14PT52A

    C13PT50B

    A12PT49A

    E11PT55A

    D11PT47B

    F11PT55B

    P15PR30B

    L16PR27A

    K14PR24B

    J13PR18B_DLL_FB-

    K15PR21B_PLL_FB-

    J12PR18A_DLL_FB+

    L14PR26A

    N16PR29B

    J15PR20A_PLL_IN+

    G15PR13A_CLK2+

    G13PR10A

    G11PR12B

    N7PB26A_CLK5+

    T7PB34B

    R7PB34A

    T6PB32B

    R6PB23B

    P6PB23A

    T5PB32A

    T4PB24B

    A8PT34B

    D14PR4A

    D10PT37B

    H11PR15B_CLK3-

    L8PB35A

    R4PB24A

    B3PT26A

    B2PT25A

    C3PL2A

    B1PL7A

    D3PL5A

    C2PL2B

    E4PL4B

    C1PL7B

    F3PL11A

    D1PL10A

    G4PL8B

    E1PL10B

    F2PL12A

    F1PL12B

    J4PL18A_DLL_FB+

    J5PL18B_DLL_FB-

    L4PL26A

    K1PL25B

    L3PL24B

    N5PB21A

    L6PB25A

    L1PL27A

    N6PB21B

    N2PL28A

    P4PB5B

    M1PL27B

    T2PB22A

    P2PL28B

    R3PB5A

    P1PL29B

    F4PL8A

    G1PL13B_CLK7-

    R2PL30B

    K3PL20B_PLL_IN-

    K4PL20A_PLL_IN+

    H1PL17B_DLL_IN-

    H2PL17A_DLL_IN+

    G2PL13A_CLK7+

    G3PL11B

    R8PB31B_CLK4-

    J1PL21A_PLL_FB+

    L5PL26B

    P7PB31A_CLK4+

    M6PB2B

    H12PR17B_DLL_IN-

    T12PB51B

    D9PT33B

    C6PT23A

    C7PT24B

    C10PT37A

    A3PT26B

    A2PT25B

    B7PT32B

    A6PT30B_CLK1-

    B4PT21A

    A4PT27A

    A5PT27B

    D7PT24A

    A7PT32A

    D4PL4A

    D8PT31A

    C4PT21B

    J11PR15A_CLK3+

    L7PB25B

    N8PB36B

    T14PB53B

    P14PR30A

    L15PR27B

    F16PR8B

    E16PR8A

    D15PR7A

    C15PR4B

    B15PT54A

    A15PT54B

    G14PR10B

    F13PR2B

    B14PT52B

    B13PT50A

    A13PT49B

    D12PT53A

    C11PT47A

    E9PT31B

    F7PT22B

    H6PL15A_CLK6+

    R16PR28B

    P16PR28A

    M12PB55B

    N12PB55A

    L11PB52B

    P13PB54B

    N11PB50A

    M11PB52A

    N10PB49B

    L9PB35B

    D5PT2B

    F6PT22A

    F8PT28B_CLK0-

    H3PL16B

    E8PT28A_CLK0+

    F9PR9B

    E5PT2A

    F5PL9A

    H4PL16A

    D6PT23B

    G6PL9B

    K11SPI_CS# _PR25A

    L10SPI_MISO_PR25B

    K13SPI_MOSI_PR24A

    H16PR16A

    L13PR26B

    B8PT34A

    T3PB22B

    M5PB2A

    B6PT30A_CLK1+

    P10PB49A

    H5PL15B_CLK6-

    N9PB47A

    T8PB33A

    R9PB37A

    R10PB37B

    T9PB33B

    P8PB36A

    J2PL21B_PLL_FB-

    L2PL24A

    N1PL29A

    R1PL30A

    D2PL5B

    K2PL25A

    U10

    LATTICE_ECP2_256

    1 CS#

    5DIN

    6CLK

    8VCC

    4GND

    7HOLD#

    3WP#

    2DOUT

    U20

    FLASH_SPI_4MBIT_SOIC8

    R8410K1%

    24TCK

    2TDI

    74TDO

    52TMS

    79IO

    50IO

    48IO

    41IO

    37IO

    49IO

    100IO

    94IO

    36IO

    27I

    23I

    64IO

    93IO

    62I

    84IO

    12I

    71IO

    29IO

    53IO

    34IO

    87IO

    31IO

    42IO

    15IO

    14IO

    8IO

    6IO

    47IO

    3IO

    55IO

    44IO

    1GND7GND18GND26GND

    40VCCINT

    25VCCINT

    90VCCINT

    75VCCINT

    13VCCIO 33VCCIO 45VCCIO

    81IO

    86IO

    80IO

    72IO

    58IO

    5IO

    78IO

    91IO

    35IO

    70IO

    66IO

    92IO

    69IO

    60IO

    61IO

    4IO

    73I

    77I

    10IO

    85IO

    98IO

    67IO

    65IO

    97IO

    19IO

    17IO

    16IO

    20IO

    43IO

    30IO

    11IO

    21IO

    9IO

    22IO

    96GND

    82GND

    68GND 76GND

    32GND 46GND

    38CLK1

    39CLK2

    88CLK3

    89CLK4

    54IO

    99IO

    28IO

    63VCCIO 83VCCIO 95VCCIO

    51GND 57GND

    56IO

    59IO

    U19

    MACH4064ZC

    R32

    226

    TP7

    1

    2

    RN11-A2.2K

    3

    4

    RN11-B

    2.2K

    7

    8

    RN14-D2.2K

    1

    2 D1

    Gre e n

    TP1

    TP28

    TP2

    TP5

    CONFIG_CLK

    3.3V

    CONFIG_CLK

    1.2V

    3.3V

    3.3V

    JTAG_FPGA_DOUT

    JTAG_TMS

    JTAG_CLK

    JTAG_CPU_DOUT

    PCI_AD11

    PCI_AD16

    PCI_AD18

    PCI_AD22

    PCI_AD24

    PCI_AD29

    PCI_AD30

    PCI_STOP#

    PCI_FRAME#

    PCI_IRDY#

    PCI_REQ#

    $$$20

    PCI_AD[00:31]

    ISA_A[01:31]

    FD[0:7]

    NAND_BUSY#

    PCI_CBE0#

    PCI_CBE1#

    PCI_CBE2#

    PCI_CBE3#

    PCI_DEVSEL#

    PCI_GNT#

    PCI_PERR#

    PCI_SERR#

    TW_CLK

    TW_DATA

    CLK_25MHZ

    PCI_INT#

    PCI_PAR

    PCI_TRDY#

    MPP_6

    NAND_ALE

    NAND_CLE

    NAND_CS#

    NAND_RD#

    NAND_WR#

    PROGRAM#

    FD7

    FD0

    FD5

    FD6

    FD4

    FD1

    FD2

    FD3

    DONE#

    PCI_AD17

    PCI_AD31

    PCI_AD28

    PCI_AD19

    PCI_AD13

    PCI_AD15

    PCI_AD12

    PCI_AD20

    PCI_AD23

    PCI_AD14

    PCI_AD10

    PCI_AD07

    PCI_AD08

    PCI_AD06

    PCI_AD03

    PCI_AD04

    PCI_AD05

    PCI_AD02

    PCI_AD09

    PCI_AD25

    PCI_AD27

    PCI_AD21

    PCI_AD26

    PCI_AD00

    PCI_AD01

    ISA_A01

    ISA_A10

    ISA_A11

    ISA_A12

    ISA_A13

    ISA_A14

    ISA_A15

    ISA_A16

    SD_D0

    SD_D1

    SD_D2

    SD_D3

    SD_CMD

    SD_FULL_CLK

    SD_MICRO_CLK

    PLD_RD#

    PLD_WR#

    PLD_A2

    PLD_A1

    PLD_A0

    3.3V

    1.8V

    TXD3

    PLD_CLK

    CTS1

    CTS3

    DCD1

    RXD3

    DSR1

    PLD_D[0:5]

    PLD_D4

    PLD_D5

    PLD_A0

    PLD_A1

    PLD_A2

    LCD_[03:14]

    LCD_03

    LCD_04

    LCD_05

    LCD_06

    LCD_07

    LCD_08

    LCD_09

    LCD_10

    LCD_11

    LCD_12

    LCD_13

    LCD_14

    DIO_[01:15]

    DIO_07

    DIO_08

    DIO_09

    DIO_11

    DIO_13

    DIO_15

    SD_POWER#

    SPI_CLK

    SPI_MOSI

    SPARE1

    SPI_FRAME

    IRQ6

    3.3V

    IRQ11

    IRQ12

    IRQ14

    IRQ15

    LOW_VOLT#

    SYSRST_OUT#

    ISA_DAT[00:15]

    ISA_DAT00

    ISA_DAT01

    ISA_DAT02

    ISA_DAT03

    ISA_DAT04

    ISA_DAT05

    ISA_DAT06

    ISA_DAT07

    ISA_DAT08

    ISA_DAT09

    ISA_DAT10

    ISA_DAT11

    ISA_DAT12

    ISA_DAT13

    ISA_DAT14

    ISA_DAT15

    MPP_7

    ISA_A17

    ISA_A18

    ISA_A19

    ISA_A20

    ISA_A21

    ISA_A22

    ISA_A23

    ISA_A24

    ISA_A25

    ISA_A26

    ISA_A27

    ISA_A28

    ISA_A29

    ISA_A30

    ISA_A31

    ISA_C[01:10]

    ISA_C01

    ISA_C03

    ISA_C04

    ISA_C05

    ISA_C06

    ISA_C07

    ISA_C08

    ISA_C09

    ISA_C10

    ISA_C02

    ISA_D[01:17]

    ISA_D01

    ISA_D02

    ISA_D09

    ISA_D10

    ISA_D11

    ISA_D12

    ISA_D13

    ISA_D14

    ISA_B[02:30]

    ISA_B02

    ISA_B04

    ISA_B06

    ISA_B08

    ISA_B11

    ISA_B12

    ISA_B13

    ISA_B14

    ISA_B15

    ISA_B16

    ISA_B17

    ISA_B18

    ISA_B19

    ISA_B20

    ISA_B25

    ISA_B26

    ISA_B27

    ISA_B28

    ISA_B30

    PLD_D1

    PLD_D4

    JP2#

    BUF_IRQ10

    RTC_CS#

    SPARE1

    BUF_IRQ5

    DIO_01

    DIO_03

    DIO_04

    DIO_05

    PLD_D1

    PLD_D0

    ISA_D15

    ISA_D17

    PLD_D0

    PLD_D5

    PLD_CLK

    PLD_RD#

    PLD_WR#

    CPU_RESET#

    IRQ7

    TMP_CS#

    ISA_B32

    AVR_MOSI

    AVR_RESET#

    AVR_SCK

    AVR_MISO

    JTAG_CLK

    JTAG_TMS

    JTAG_FPGA_DOUT

    MPP_3

    SD_WP

    JP3#

    JTAG_CPLD_DOUT

    3.3V

    JP1#

    RTC_IRQ#

    TXEN2_485

    TXD2_485

    JTAG_CLK

    JTAG_DOUT

    RXD1_485

    RXD2_485

    BUF_SPI_MISO

    SD_POWER_LOW

    TXD1_485

    TXEN1_485

    DTR1

    SPARE2

    RTS1

    5V

    SPARE2

    RTS3

    GRN_LED#

    $$

    $1

    FLASH_DIN

    FLASH_DOUT

    FLASH_CS#

    X_RES

  • ofShe e tDe s igne rRe v:

    Tit le :

    Da teTe chnologic Sys t e ms

    7

    TS-7800 Powe r

    2.5V Powe r Supply

    1.2V or 1.42V Powe r Supply

    1.2V Powe r Supply

    1.425V

    Whe n FETs a re on

    Re gula tor a t 1.2V

    (JP3 ON)

    Powe r Se que ncing

    2.5V a nd 3.3V mus t come

    up be fore 1.2V a nd 1.4V

    up to 1500 mA

    3.3V Re gula tor

    500 uS ris e t ime

    July 23, 2015

    12G

    SATA 0

    SATA 1

    SATA ca n NOT ha ve

    pola rit y s wa ppe d

    SATA a nd PCIe Diff pa irs do

    NOT ha ve t o be le ngth ma tche d

    Wa s a 10 uF

    C64

    10 uF

    C65

    10 uFC72

    10 uF

    C188

    .1 uF

    7PVIN

    8SVIN

    11VSET

    12PSET

    10SHUTDN

    6SW

    5SFB

    1NC1

    4SGND

    9NC4

    3NC3

    13

    PGND

    2NC2

    U6

    MVPG31_DFN12

    L3

    2 uHC67

    10 uF

    C68

    10 uF

    C69

    10 uF

    R47165K

    R1210

    C187

    .1 uF

    7PVIN

    8SVIN

    11VSET

    12PSET

    10SHUTDN

    6SW

    5SFB

    1NC1

    4SGND

    9NC4

    3NC3

    13

    PGND

    2NC2

    U5

    MVPG31_DFN12

    L1

    2 uHC62

    10 uF C70

    10 uF

    C41

    47 uF

    R1010

    C189

    .1 uF

    R5531.6K

    C94

    100 uF

    FB4

    220 ohm

    R5431.6K

    R2953.6K

    R4376.8K

    R13

    20K

    R8610K

    2

    1

    3

    Q7

    R5331.6K

    C42

    47 uF

    L2

    3.3 uH

    5VIN

    4PIN

    6EN

    3SW

    2PGND

    1FB

    7

    AGND

    U7

    REG_FAN2012_DFN6

    2

    1

    3Q10

    R30

    53.6K

    R77

    4.99K

    R8510K

    3VIN

    43.3V 23.3V

    1GND

    U29

    REG_LM1117MP-3.3V_SOT223

    C92

    10 uF

    D

    S

    G2

    6

    1

    Q6-A

    D

    S

    G5

    3

    4

    Q6-B

    C66

    10 uF

    1

    2

    3

    D6

    C63

    10 uF

    TP10

    TP11

    TP18

    1GND

    4GND

    7GND6 RX+5

    RX-

    3TX-2TX+

    9FR

    M

    8FR

    M

    CN10

    CN_SATA_VERT_TH

    C304

    10 nF

    C305

    10 nFC306

    10 nF

    1GND

    4GND

    7GND6 RX+5

    RX-

    3TX-2TX+

    9FR

    M

    8FR

    M

    CN11

    CN_SATA_VERT_TH

    C300

    10 nF

    C301

    10 nFC302

    10 nF

    C303

    10 nF

    C307

    10 nF

    5V

    5V

    5VVDD_CPU

    1.2V

    JP3

    EN_1.4V_1.2V#

    EN_1.4V_1.2V#

    5V

    EN_1.4V_1.2V#

    5V

    3.3V

    3.3V2.5V

    2.5V

    2.5V

    SATA1_TX_P

    SATA1_TX_M

    SATA1_RX_M

    SATA1_RX_P

    SATA0_RX_P

    SATA0_RX_M

    SATA0_TX_M

    SATA0_TX_P

  • Te chnologic Sys t e ms Da te

    Tit le :

    Re v: De s igne r She e t of8

    TS-7800 Powe r

    5VPowe r In

    5V Swit ch

    60 mohm typ

    Int e rfa ce t o Buck Re g.

    ON re s is t a nce

    July 23, 2015

    12G

    Ne a r PLD

    Ne a r PLD

    FB5

    220 ohm

    D3

    5V

    C198

    .1 uF

    C99

    330 uF

    2

    1

    3

    Q8

    R56

    31.6K

    2

    1

    3

    Q9

    C193.1 uF

    1

    3

    5

    2

    4

    6

    HD2

    HD_2X3_2.54MM

    R28

    53.6K

    7

    8

    RN6-D4.7K

    R19680K

    DS

    G3

    4 1

    2

    5

    6

    Q4

    FET_PC_FDC634_SOT23-61

    +

    2-

    CN3

    CONN_PWR_2POS_5MM

    C252.1 uF

    C253.1 uF

    FB1

    220 ohm

    C254.1 uF

    C255.1 uF

    C256.1 uF

    C106.1 uF

    FB2

    220 ohm

    C191.1 uF C167

    .1 uF C169.1 uF

    C308

    10 nF

    C311

    10 nF

    C309

    10 nFC312

    10 nFC310

    10 nF

    EN_5V

    5V

    AVR_5V

    4.3V

    EN_BUCK8V_30V

    USB_3.3V

    SATA_2.5V2.5V

    3.3V

    3.3V

    1.8V

    5V

    $$

    $2

    22

    77

  • Te chnologic Sys t e ms Da te

    Tit le :

    Re v: De s igne r She e t of9

    TS-7800 RTC, COM Port s , JTAG He a de r

    COM1

    COM2

    Re a l Time ClockRS-232 Tra ns ce ive r

    RS-485 Drive rs

    He a de r

    DB9M

    He a de r

    COM3

    Re s is tors will a dd a s much

    a s 100 nS of e xt ra de la y

    40 nS min ALE puls e (high)

    40 nS min be twe e n ALE de a s s e rt ion

    t o RD# or WR# a s s e rt ion

    20nS (+ 100) a ddre s s s e t -up t o ALE de a s s e rt ion

    30nS (+ 100) da t a s e t -up t o WR# de a s s e rt ion

    60nS min WR# puls e a s s e rt ion

    70nS (+ 100) da t a va lid a ft e r RD# a s s e rt ion

    15nS de la y from WR# or RD#

    de a s s e rt ion t o ALE a s s e rt e d

    JTAGHe a de r

    COM1

    12

    July 23, 2015

    G

    DB-9M

    6TX-_(DSR)

    4RX+ _(DTR)

    9RX-_(RI)

    1TX+ _(DCD)

    3TXD

    7RTS

    5GND

    2RXD

    8CTS

    11FRAME2

    10FRAME1

    J1

    CONN_DB9M_RA_TH

    C184

    .1 uF

    C183

    .1 uF C181

    .1 uF

    C186

    .1 uF

    T1

    T2

    R1

    R2

    C1+

    C1-

    C2+

    C2-

    GND

    Vcc

    V+

    V-

    R3

    R4

    R5

    T3

    T4

    1213

    14

    15

    16

    17

    3

    25SD#24

    EN_RX

    6

    7

    22 23

    2

    10

    11

    20

    21

    8

    5

    26

    19 18

    27

    4

    9

    28

    1

    U11

    SP213_SOIC28

    14ALE

    13 CS#

    17 RD#

    15 WR#

    4AD05AD16AD27AD38AD49AD510AD611AD7

    24VCC

    21RCLR#

    23SQW

    22VBAUX

    18RST# /KS#

    1MOT/PWR

    19IRQ#

    12GND

    U23

    DS1687

    RN7-A

    2.2K

    RN7-B

    2.2K

    RN7-C

    2.2K

    RN7-D

    2.2K

    RN8-A

    2.2K

    RN8-B

    2.2K

    RN8-C

    2.2K

    RN8-D

    2.2K

    RN3-A

    4.7K

    RN3-B

    4.7K

    RN3-C

    4.7K

    RN3-D4.7K

    RN4-A4.7K

    RN4-B4.7K

    RN4-C4.7K

    RN4-D4.7K

    RN5-A4.7K

    RN5-B4.7K

    RN5-C4.7K

    RN5-D4.7K

    T1

    T2

    R1

    R2

    C1+

    C1-

    C2+

    C2-

    GND

    Vcc

    V+

    V-

    1

    2

    3

    4

    5

    6

    7

    89

    10

    11

    12 13

    14

    15

    16

    U28

    SP202_SOIC16

    C196

    .1 uF

    C101

    .1 uF

    C194

    .1 uF

    C195

    .1 uF3 JTAG_TMS_CPU

    5JTAG_CLK

    7JTAG_CPU_DOUT

    9JTAG_TMS

    11CTS

    13RXD

    15DCD

    43.3V

    1JTAG_DIN

    6CPU_RESET#

    2JTAG_RESET#

    8GND

    10JTAG_DOUT

    12RTS

    14TXD

    16DTR

    HD1

    HD_JTAG_7800_TH

    R23

    1.5K

    R24

    1.5K

    1

    2

    RN14-A2.2K

    R2711.0K

    R2721.0K

    6TX-_(DSR)

    4RX+ _CANH_(DTR)

    9RX-_CANL_(RI)

    1TX+ _(DCD)

    3TXD

    7RTS

    5GND

    2RXD

    8CTS

    10NC

    CN2

    HD_COM_2X5_2.54MM

    6TX-_(DSR)

    4RX+ _CANH_(DTR)

    9RX-_CANL_(RI)

    1TX+ _(DCD)

    3TXD

    7RTS

    5GND

    2RXD

    8CTS

    10NC

    CN1

    HD_COM_2X5_2.54MM

    4TXD

    1RXD

    3TXEN

    2 RXEN#

    8VCC

    6X+

    7X-

    5GND

    U18

    ISL83483I_SOIC8

    4TXD

    1RXD

    3TXEN

    2 RXEN#

    8VCC

    6X+

    7X-

    5GND

    U17

    ISL83483I_SOIC8

    C192

    .1 uF

    8.5V

    1 2

    3

    TVS3

    TVS_8.5V_DUAL_SOT23

    8.5V

    1 2

    3 TVS4

    TVS_8.5V_DUAL_SOT23

    LOW_VOLT#

    5V

    UART1_TXD

    UART0_TXD

    RXD2

    TXD2

    TXD2

    RXD2

    NAND_ALE

    NAND_WR#

    NAND_RD#CPU_RESET#

    5V

    RTC_CS#

    FD[0:7]

    FD0

    FD1

    FD2

    FD3

    FD4

    FD5

    FD6

    FD7

    DTR1

    RTS1

    DCD1

    DSR1

    CTS1

    RXD1_485

    TXD1_485

    TXEN1_485

    RXD2_485

    CTS3

    RXD3

    RTS3

    TXD3

    5V

    5V

    RXD1_5V

    RXD2_5V

    RTC_CS#

    RTC_CS#

    RTC_IRQ#

    JTAG_DIN

    JT_TMS_CPU

    3.3V

    JTAG_CLK

    CPU_RESET#

    JTAG_CPU_DOUT

    JTAG_TMS

    JTAG_DOUT

    COM1_TXD

    COM1_DTR

    COM1_RTS

    COM1_RXD

    COM1_CTS

    COM1_DCD

    COM1_CTS

    COM1_RTS

    COM1_RXD

    COM1_TXD

    COM1_DCD

    COM1_DTR

    TXD2_485

    TXEN2_485

    JTAG_TMS

    3.3V

    3.3V

    3.3V

    5V

    5V

    FRAME

    RAW_RXD3

    RAW_CTS3

    COM1_DSR

  • Te chnologic Sys t e ms Da te

    Tit le :

    Re v: De s igne r She e t of

    AVRMicroCont rolle r

    Re s e t will t ri-s t a t e a ll pins

    70 uA quie s ce nt

    Vout = 1.24 * [1 + Rtop/Rbot ]

    NV 3.3V Re gula tor for AVR

    5V ne e de d whe n

    progra mming AVR

    Mus t e na ble pull-up

    re s is tors for t he s e

    pins :

    SD ca rd D0-D3

    SD ca rd WP

    SD Powe r#

    Full-Size SD Ca rd Socke t

    Ope n Dra in

    Micro SD Ca rd Socke t

    FPGA_DONE# de a s s e rt e d

    indica t e s FPGA loa de d OK

    ne e ds 20mA

    10

    TS-7800 AVR, SD Ca rd

    5 Cha nne l 12-bit A/D

    DIO_04 or ISA_32 ca n

    ca n wa ke up AVR

    G

    July 23, 2015

    12

    20AREF

    19ADC6

    22ADC7

    7PB6/TOSC1/ INT6

    8PB7/TOSC2/ INT7

    1PD3/ INT19/OC2B

    2PD4/ INT20/XCK

    9PD5/ INT21/OCOB

    10PD6/ INT22/OCOA

    11PD7/ INT23/AIN1

    12PB0/ INT0/CLK0

    13PB1/ INT1/OC1A

    14PB2/SS# /OC1B

    15PB3/ INT3/MOSI

    16PB4/ INT4/MISO

    17PB5/ INT5/SCK

    27PC4/ADC4/SDA

    4VCC

    6VCC

    18AVCC

    23PC0/ADC0

    24PC1/ADC1

    29PC6/RESET#

    30PD0/RXD

    31PD1/TXD

    32PD2/ INT18

    28PC5/ADC5/SCL

    25PC2/ADC2

    26PC3/ADC3

    3GND

    5GND

    21GND

    U12

    ATMEGA48_TQFP32

    C171

    .1 uF

    C100

    .1 uF

    R49150K1.0%

    C182

    .1 uF

    R44

    1.2M

    C91

    10 uF

    8VIN

    5ERROR#

    3EN#

    2NC1

    4GND

    1VOUT

    6NC2

    7FB

    U22

    REG_LP2951A_SOIC8

    R42255K

    C180

    .1 uF

    C170

    .1 uF

    R48150K

    R26

    1.5K

    R33

    226

    7DATA_0

    8DATA_1

    1DATA_2

    2DATA_3

    5CLK

    3COMMAND

    4VDD

    6GND

    10FRM2

    9FRM1

    11FRM3

    12FRM4

    CN9

    CONN_MICRO_SD

    7DATA_0

    8DATA_1

    9DATA_2

    1DATA_3

    5CLK

    2COMMAND

    4VDD

    10CARD_DET#

    12WP_SW

    13FRAME

    11COMMON

    3GND

    6GND

    CN4

    CONN_SD_FULL_SIZE_OST

    2VCC

    3GND

    1RESET#

    U4

    STM1001S-2.9V_SOT23

    1 3 5 7 9

    2 4 6 8 10

    HD4

    HD_2X5_TH_2.54MM

    C313

    10 nF

    5

    6

    RN10-C2.2K

    7

    8

    RN10-D

    2.2K

    3

    4

    RN14-B

    2.2K

    5 6RN14-C

    2.2K

    56RN9-C

    2.2K

    78RN9-D

    2.2K

    34RN6-B

    4.7K

    R88

    51

    G

    S

    D

    1

    2

    3

    Q2

    1

    2

    3

    D5

    1

    2

    3

    D4

    1

    2 D2

    RED

    TP6

    NV_3.3V

    ADC_0

    ADC_1

    ADC_3

    $$$21

    8V_30V

    DONE#

    ADC_7

    NV_3.3V

    8V_30V

    AVR_5V

    3.3V

    SD_POW_PIN

    SD_WP

    SD_POWER#

    SD_D0

    SD_D1

    SD_D2

    SD_D3

    SD_CMD

    SD_FULL_CLK

    SD_D0

    SD_D1

    SD_D2

    SD_D3

    SD_CMD

    SD_MICRO_CLK

    SD_POW_PIN

    3.3V

    TW_DATA

    TW_CLK

    ADC_0

    ADC_1

    $$$21

    ADC_3

    ADC_7

    LOW_VOLT#

    JTAG_CLK

    PROGRAM#

    EN_BUCK

    EN_PULL-UP

    EN_5V

    DIO_04

    ISA_B32

    AVR_RESET#

    AVR_SCK

    AVR_MISO

    AVR_MOSI

    SYSRST_OUT#

    3.3V

    EN_PULL-UP

    DONE#

    3.3V

    PROGRAM#

    SD_POWER_LOW

    CPU_RESET#

    $$$23

  • Te chnologic Sys t e ms Da te

    Tit le :

    Re v: De s igne r She e t of

    LCD Port

    11

    TS-7800 DIO, LCD, PC/104

    PC/104 64-pin Conne ctor

    PC/104 40-pin Conne ctor

    LCD07 thru LCD14 a re a lwa ys ope n

    dra in output s , init ia lize d t o high

    LCD04 is a lwa ys output

    a ct ive high-low, init t o ze ro

    LCD03, LCD05, LCD06 init t o input s

    whe n output s , a ct ive high-low

    The s e a re progra mma ble I/O

    51 line s dire ct ly into FPGA

    plus 3 more into CPLD (re a d only)

    29 line s dire ct ly into FPGA

    plus 4 more into CPLD

    provide s 5V tole ra nce

    provide s 5V tole ra nceWa rning:All IRQs a nd da t a line s

    a re 5V tole ra nt , but

    a ll othe r s igna ls mus t

    us e 3.3V le ve ls

    IRQ3 mus t be 3.3V le ve ls

    (IRQ6, IRQ7 a nd ISA_32)

    IRQ11 thru IRQ15 a re re a d only

    All LCD line s a re 5V tole ra nt

    The y ca n be us e d a s input sPull-up re s is t ors for

    the ope n dra in output s

    curre nt t hru re s is t or

    s ink 8 mA, but only s ource

    Ope n dra in output s ca n

    G

    July 23, 2015

    12

    R89

    51R76

    470

    A1IOCHK#

    A2D7A3D6A4D5A5D4A6D3A7D2A8D1A9D0

    A10IORDYA11AEN

    A12A19A13A18A14A17A15A16A16A15A17A14A18A13A19A12A20A11A21A10A22A9A23A8A24A7A25A6A26A5A27A4A28A3A29A2A30A1A31A0A32GND

    B1GND

    B2RESET B3

    + 5V B4IRQ9 B5

    -5V B6DRQ2 B7-12V B8

    ENDX# B9+ 12V B10(KEY)

    B11MEMW# B12MEMR# B13

    IOW# B14IOR#

    B15DACK3# B16

    DRQ3 B17DACK1# B18

    DRQ1 B19RFRSH# B20

    BCLK

    B21IRQ7 B22IRQ6 B23IRQ5 B24IRQ4 B25IRQ3

    B26DACK2# B27

    TC B28BALE B29+ 5V B30OSC B31GND B32GND

    65

    66

    CN5

    PC104_64PIN_7800

    23 EN_FET#

    2A0

    3A1

    4A2

    5A3

    6A4

    7A5

    8A6

    9A7

    10A8

    11A9

    24VCC

    1NC

    22B0

    21B1

    20B2

    19B3

    18B4

    17B5

    16B6

    15B7

    14B8

    13B9

    12GND

    U24

    QS3861_QSOP24

    D0GND

    D1MEM16#D2IO16#

    D3IRQ10D4IRQ11D5IRQ12D6IRQ15D7IRQ14

    D8DACK0#D9DRQ0D10DACK5#D11DRQ5D12DACK6#D13DRQ6D14DACK7#D15DRQ7

    D16+ 5V

    D17MASTER#

    D18GNDD19GND

    C0GND

    C1SBHE#

    C2LA23 C3LA22 C4LA21 C5LA20 C6LA19 C7LA18 C8LA17

    C9MEMR# C10

    MEMW#

    C11SD8 C12SD9 C13

    SD10 C14SD11 C15SD12 C16SD13 C17SD14 C18SD15

    C19GND/KEY

    CN6

    PC-104_40PIN_7800

    23EN_FET#

    2A0

    3A1

    4A2

    5A3

    6A4

    7A5

    8A6

    9A7

    10A8

    11A9

    24VCC

    1NC

    22B0

    21B1

    20B2

    19B3

    18B4

    17B5

    16B6

    15B7

    14B8

    13B9

    12GND

    U25

    QS3861_QSOP24

    RN21-D

    2.2K

    RN21-C

    2.2K

    RN22-D

    2.2K

    RN22-C

    2.2K

    RN21-B

    2.2K

    RN22-B

    2.2K

    RN21-A

    2.2K

    RN22-A

    2.2K

    5

    6

    RN6-C

    4.7K

    78RN11-D

    2.2K

    1

    2

    RN9-A2.2K

    3

    4

    RN9-B2.2K

    14D6

    12D4

    10D2

    8D0

    6WR#

    4BIAS

    2GND

    11D5

    9D3

    7D1

    5EN

    3RS

    15V

    13D7

    CN7

    HD_2X7_2.54MM_LCD

    5V

    LCD_[03:14]

    5V

    5V

    ISA_B16ISA_B17

    ISA_A17

    ISA_A10ISA_A11

    ISA_A12ISA_A13ISA_A14ISA_A15ISA_A16

    ISA_B06

    ISA_B08

    ISA_B11ISA_B12ISA_B13ISA_B14

    ISA_B15

    ISA_B18ISA_B19

    ISA_B[02:30]

    ISA_A[01:31]

    5V

    4.3V

    LCD_[03:14]

    LCD_08

    LCD_10

    LCD_07

    LCD_09

    LCD_12

    LCD_11

    LCD_14

    LCD_13

    3.3V

    IRQ10

    IRQ11

    IRQ12

    IRQ15

    IRQ14

    UART0_RXD

    IRQ5RXD1_5V

    BUF_IRQ5

    4.3V

    ISA_DAT[00:15]

    ISA_DAT00

    ISA_DAT01

    ISA_DAT02

    ISA_DAT03

    ISA_DAT04

    ISA_DAT05

    ISA_DAT06

    ISA_DAT07

    ISA_DAT[00:15]

    ISA_DAT08

    ISA_DAT09

    ISA_DAT10

    ISA_DAT11

    ISA_DAT12

    ISA_DAT13

    ISA_DAT14

    ISA_DAT15

    3.3V

    ISA_B04ISA_B02

    UART1_RXD

    RXD2_5V

    ISA_A01

    ISA_A18ISA_A19ISA_A20ISA_A21ISA_A22ISA_A23ISA_A24ISA_A25ISA_A26ISA_A27ISA_A28ISA_A29ISA_A30ISA_A31

    ISA_B20

    ISA_B25

    ISA_B26ISA_B27ISA_B28

    ISA_B30

    ISA_B32

    ISA_D[01:17]

    ISA_D01ISA_D02

    ISA_D09ISA_D10ISA_D11ISA_D12ISA_D13ISA_D14ISA_D15

    ISA_D17

    ISA_C[01:10]

    ISA_C01

    ISA_C02ISA_C03ISA_C04ISA_C05ISA_C06ISA_C07

    ISA_C09ISA_C10

    3.3VISA_C08

    IRQ10

    BUF_IRQ10

    IRQ7

    IRQ6

    IRQ5

    ISA_A103.3V

    8V_30V

    LCD_13

    LCD_11

    LCD_09

    LCD_07

    LCD_05

    LCD_03

    LCD_14

    LCD_12

    LCD_10

    LCD_08

    LCD_06

    LCD_04

    3.3V

    $$$1850

  • ofShe e tDe s igne rRe v:

    Tit le :

    Da teTe chnologic Sys t e ms

    12

    TS-7800 Mis c

    G

    July 23, 2015

    12

    DIOPort

    ope n dra in output s , init ia lize d t o high

    DIO_01 thru DIO_15 (odds ) a re a lwa ys

    AVR drive s pull-up on t his pin

    DIO_04 is a lwa ys input

    It is progra mma ble In or out

    whe n output , a ct ive high-low

    DIO_08 init ia lize s t o a n input

    SPI_MISO is 5V tole ra nt

    MOSI, CLK, a nd Fra me

    a re 3.3V le ve l output sThe y ca n be us e d a s input s

    All DIO line s a re 5V tole ra nt

    t he ope n dra in output s

    Pull-up re s is t ors for

    Ope n dra in output s ca n

    s ink 8 mA, but only s ource

    curre nt t hru re s is t or

    TP25

    TP4

    TP8

    TP12

    TP13

    TP14

    TP15

    TP16

    TP17

    TP19

    TP20TP21

    TP22

    TP3

    1

    MT16

    MT125 1

    MT17

    MT125

    MT21

    MT22

    R15

    Ze ro16

    14

    12

    10

    8

    6

    4

    2

    15

    13

    11

    9

    7

    5

    3

    1

    CN8

    HD_2X8_7800

    RN13-A

    2.2K

    RN13-B

    2.2K

    RN13-C

    2.2K

    RN13-D

    2.2K

    RN12-D

    2.2K

    RN12-B

    2.2K

    RN12-C

    2.2K

    RN12-A

    2.2K

    1

    2

    RN6-A4.7K

    3 6RN18-C

    75

    4 5RN18-D

    75

    1 8RN18-A

    75

    2 7RN18-B

    75

    1 8RN19-A

    75

    2 7RN19-B

    75

    3 6RN19-C

    75

    4 5RN19-D

    75

    1

    2

    3

    6

    5

    4

    TVS1

    TVS_USB2_NUP4114_SC88

    1

    2

    3

    6

    5

    4

    TVS2

    TVS_USB2_NUP4114_SC88

    1.8V

    CPU_RESET#

    5V

    2.5V

    1.2V

    5V

    5V

    3.3V

    1.2V

    VDD_CPU

    VDD_CPU5V

    5V

    5V

    FRAME3.3V

    SPI_CLK

    SPI_MOSI

    SPI_MISO

    SPI_FRAME

    DIO_[01:15]

    3.3V

    DIO_04

    DIO_08

    3.3V

    DIO_15

    DIO_01

    DIO_03

    DIO_05

    DIO_07

    DIO_09

    DIO_11

    DIO_13