trestino cosmo università degli studi di padova capitolo 2, slide 1 dsp c5000 chapter 3 addressing...
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Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 1
DSP C5000DSP C5000
Chapter 3Chapter 3
Addressing ModesAddressing Modes
Copyright © 2003 Texas Instruments. All rights reserved.Copyright © 2003 Texas Instruments. All rights reserved.
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 2
Addressing Modes: What are the Problems?Addressing Modes: What are the Problems?
Specify operands per instruction:Specify operands per instruction: A single instruction can access several A single instruction can access several
operands at a time thanks to the many operands at a time thanks to the many internal data busses,internal data busses,
But how do we specify many addresses using But how do we specify many addresses using a small number of bits? a small number of bits?
Repeated processing on an array of data:Repeated processing on an array of data: Many DSP operations are repeated on an Many DSP operations are repeated on an
array of data stored at contiguous addresses array of data stored at contiguous addresses in data memory.in data memory.
There are cases where it is useful to be able There are cases where it is useful to be able to modify the addresses as part of the to modify the addresses as part of the instruction (increment or decrement).instruction (increment or decrement).
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 3
Main Addressing Modes of C5000 FamilyMain Addressing Modes of C5000 Family
ImmediateImmediate addressing addressing AbsoluteAbsolute addressing addressing DirectDirect addressing addressing IndirectIndirect addressing by register addressing by register
Support for circular indirect addressingSupport for circular indirect addressing Access to Memory Mapped Registers Access to Memory Mapped Registers
MMRsMMRs
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 4
Allocating SectionsAllocating Sections
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 5
ExampleExample
RAM
x[3]
RAM
yC5000CPU
System Diagram
DROM
init[3]
EPROMEPROM
(code)(code)
y = x1 + x0 + x2Algorithm
How do we allocate the proper sections?
Allocate sections (code, constants, vars) Setup addressing modes Add the values (x1 + x0 + x2) Store the result (y)
Procedure
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 6
Writing relocatable codeWriting relocatable code The The programmerprogrammer should not have to give the should not have to give the
exact addressexact addresseses:: where to read the code in program memory,where to read the code in program memory, where to read the data in data memory.where to read the data in data memory.
The assembler allows to use symbolic addressesThe assembler allows to use symbolic addresses.. The assembler and the linker work with COFF The assembler and the linker work with COFF
files:files: COFF = Common Object File Format.COFF = Common Object File Format. In COFF files, specialized sectionsIn COFF files, specialized sections are used are used for code, for code,
variables or constants.variables or constants. The programmer specifies in a command file for the The programmer specifies in a command file for the
linker where the different sections should be linker where the different sections should be allocated in the memory of the system.allocated in the memory of the system.
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 7
Definition of SectionsDefinition of Sections
Different sections for code, vars, constants. Different sections for code, vars, constants. The sections can be initialized or not.The sections can be initialized or not.
An initialized section is filled with code or An initialized section is filled with code or constant values.constant values.
An uninitialized section reserves memory An uninitialized section reserves memory space for a variable.space for a variable.
The sections can have default names or The sections can have default names or names given by the programmer.names given by the programmer.
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 8
Definition and names of SectionsDefinition and names of Sections The programmer uses special The programmer uses special directives directives to to
identify the sections. identify the sections.
code VariablesCode or
constants
Named sections, name given by user
.sect .usect
Unnamed sections,
default name.text .data .bss
Initialized sectionsUnitialized sections,
reserve space for data
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 9
ExampleExample of sections of sections
Initialized named section: Initialization Initialized named section: Initialization of constants. Definition of address tblof constants. Definition of address tbl
Uninitialized named section: x[3], y[1], Uninitialized named section: x[3], y[1], Definition of address x and y.Definition of address x and y.
Initialized named section: codeInitialized named section: code
RAM
x[3]
RAM
y54xCPU
System Diagram
DROM
tbl[3]
EPROM
code
How are these sections placed into the memory
areas shown?
x .usect "vars",3 y .usect "result",1
.sect ”init" tbl .int 1,2,3
.sect “code”
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 10
C54x Addressing ModesC54x Addressing Modes
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 11
Format of Data and Instructions, Internal Format of Data and Instructions, Internal Busses of the C54x FamilyBusses of the C54x Family
In the C54x DSP, the data and program In the C54x DSP, the data and program memories are organized in memories are organized in 16-bit words16-bit words. . Data busses have a Data busses have a 16-bit width16-bit width..
Data and instructions are generally of size Data and instructions are generally of size N=16 bits.N=16 bits.
Some instructions may take several 16-bit Some instructions may take several 16-bit words.words.
Some data operands may be double Some data operands may be double precision and occupy 2 words.precision and occupy 2 words.
Internal busses: 2 data read, 1Internal busses: 2 data read, 1 data writedata write
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 12
Terms from the User’s GuideTerms from the User’s Guide
Term What it means
Smem 16-bit single data memory operand
pmad 16-bit immediate program memory address (0 - 65,535) This includes extended program memory devices
dmad 16-bit immediate data memory address (0 - 65,535)
Ymem 16-bit dual data-memory operand used in dual-operand instructions. Read through C bus.
Xmem 16-bit dual data memory operand used in dual-operand instructions and some single-operand instructions. Read through D bus.
PA 16-bit port (I/O) immediate address (0 - 65,535)
src Source accumulator (A or B) dst Destination accumulator (A or B)
lk 16-bit long constant
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 13
Immediate Addressing Mode Immediate Addressing Mode ##
Instruction contains the value of the Instruction contains the value of the operand. Value is preceded by operand. Value is preceded by #.#.
Example:Example: Add the value 4 to the content of Add the value 4 to the content of
accumulator A.accumulator A. Useful for initializations.Useful for initializations. Long (16 bits) or short values:Long (16 bits) or short values:
For long values: instruction uses 2 words.For long values: instruction uses 2 words.
ADD ADD #4,A#4,A
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 14
Immediate Addressing Mode Immediate Addressing Mode ##
16 bit value16 bit value 2 words, 2 cycles2 words, 2 cycles Initialization of ARi for Initialization of ARi for
exampleexample
Short valueShort value 3, 5, 8, 9 bits constant3, 5, 8, 9 bits constant 1 word, 1 cycle1 word, 1 cycle To initialize short To initialize short
length registers or bit length registers or bit fields:fields: DP, ASM …DP, ASM …
Not always availableNot always available
Example:
STM #1234h,AR2Load AR2 with the value 1234h.
Example:
LD #6, DPLoad DP with the value 6.
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 15
ExampleExample:: MMR MMR (Memory Mapped Registers) (Memory Mapped Registers) and Immediate Addressingand Immediate Addressing
STM (STore to Memory-mappedregister) stores an immediatevalue to the specified MMR orScratch address.
#tbl is the 16-bit address of thefirst element of the array tbl.
x .usect "vars",3 y .usect "result",1
.sect ”init" tbl .int 1,2,3
.sect “code”
start: STM #tbl,AR1 STM #x,AR2
0000h
0060h 007F
MMRs
Scratch
MMR = Memory Mapped Registers
Scratch memory
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 16
Direct Addressing Mode Direct Addressing Mode @@
Direct addressing = Direct addressing = random access from random access from a specified base addressa specified base address.. The instruction contains an offset relative The instruction contains an offset relative
to the base addressto the base address.. The base address can be the beginning The base address can be the beginning
of a data memory page or the stack of a data memory page or the stack pointer.pointer. The data memory is virtually divided in The data memory is virtually divided in
512512 pages of 128 wordspages of 128 words (512x128 = 2 (512x128 = 21616)).. Data Page Data Page DPDP relative direct address relative direct address
CPL bit (ComPiler Mode bit) = 0 in ST1CPL bit (ComPiler Mode bit) = 0 in ST1 Stack Pointer Stack Pointer SPSP relative direct address relative direct address
CPL bit = 1 in ST1CPL bit = 1 in ST1
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 17
Data memory pagesData memory pages
Page 0
Data memory Hex
0000
0080
FFFF
0100
Addresses in Dec
0
128
256
65 535
Page 1
Page 2
Page 511
128 words
128 words
128 words
128 words
512 Pages
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 18
Direct Addressing Mode Direct Addressing Mode @@
For DP relative mode: For DP relative mode: The 16 bit address is split into 9 MSB and The 16 bit address is split into 9 MSB and
7 LSB.7 LSB. The 7 LSB of the operand address are given The 7 LSB of the operand address are given
in the instructionin the instruction,, The 9 MSB are in the DP registerThe 9 MSB are in the DP register..
For SP relative modeFor SP relative mode The 7 bits given in the instruction are The 7 bits given in the instruction are
used as an offset from the SP to obtain used as an offset from the SP to obtain the addressthe address..
In both cases, only 7 bits are used in In both cases, only 7 bits are used in the instruction for the operand the instruction for the operand address.address.
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 19
Direct Addressing Mode Direct Addressing Mode @@
Opcode I=0 dma
15 - 8 7 6 - 0
7-bit dma9-bit DP
InstructionInstruction
DP relative, CPL = 0DP relative, CPL = 0
AddressAddress
SP relative, CPL = 1SP relative, CPL = 1
16-bit Stack Pointer
7-bit dma+
16-bit Data Memory AddressAddressAddress
9-bit DPDP registerDP register
SP RegisterSP Register
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 20
Direct Addressing Mode Direct Addressing Mode @@, example, example
Page 0
Data memory Hex
0000
0080
FFFF
0100
Addresses in Dec
0
128
256
65 535
Page 1
Page 2
Page 511
128 words
128 words
128 words
128 words
0 1
127
Page 3 to 510
DP = 2DP = 2, page 2, page 2
Offset in the Offset in the instruction = instruction = 11
Address = 0101 Address = 0101 in hexadecimalin hexadecimal
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 21
Example Example
This instruction loads the upper9 bits of address x into DP (in ST0)
CPL = 0
To be sure that x and x+1 are in the same page: use Blocking.
LD @x+1,A ADD @x,A ADD @x+2,A
x .usect "vars",3 y .usect "result",1
.sect ”init" tbl .int 1,2,3
.sect “code”
start: STM #tbl,AR1 STM #x,AR2
LD #x,DP
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 22
Direct Addressing Mode Direct Addressing Mode @, DP relative@, DP relative When DP is initialized, it allows single-When DP is initialized, it allows single-
word single-cycle instructions with easy word single-cycle instructions with easy to understand symbols for addresses.to understand symbols for addresses.
Defines 512 pages (selected by the 9 bits Defines 512 pages (selected by the 9 bits of DP) of 128 words (selected by the 7 of DP) of 128 words (selected by the 7 bits in instruction) in data memory.bits in instruction) in data memory.
CPL is reset by:CPL is reset by: RSBX CPL ; CPL = 0 on resetRSBX CPL ; CPL = 0 on reset
Blocking Blocking of data in the same pageof data in the same page In the linker command file:In the linker command file:
.bss : > RAM BLOCK = 128.bss : > RAM BLOCK = 128 In the assembler fileIn the assembler file
.bss x, 2, .bss x, 2, 11 ; specify all variables in one page ; specify all variables in one page
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 23
Direct Addressing Mode Direct Addressing Mode @, SP relative@, SP relative
Used by the C compilerUsed by the C compiler Useful for stack based operationsUseful for stack based operations Controlled by the CPL bit. Set by:Controlled by the CPL bit. Set by:
SSBX CPLSSBX CPL
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 24
Absolute Addressing Mode Absolute Addressing Mode *()*()
Allows us to specify a complete operand Allows us to specify a complete operand address in an instruction. address in an instruction. *(Address)*(Address)
The address can be in data, program or The address can be in data, program or IO memory. 16 bits. IO memory. 16 bits.
2 words, 2 cycles.2 words, 2 cycles.Data Memory
Addr Data . . . . x: 01FF 1000y: 0200 0500 . . . .
0 0 0 0 0 0 1 0 0 0Acc A
0 0 0 0 0 0 1 5 0 0
.data
x: .word 1000h
y: .word 0500h
.text
LD *(x),A
ADD *(y),A
In the *(), the * specifies the type In the *(), the * specifies the type of MEMORY:of MEMORY:
• Data()/Prog()/ Port()Data()/Prog()/ Port()
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 25
ExampleExample
RAM
x[3]
RAM
y54xCPU
System Diagram
DROM
tbl[3]
EPROM
code
Save accumulator A at address y
X .usect "vars",3 Y .usect "result",1
.sect ”init" tbl .int 1,2,3
.sect “code” Start: STM #tbl,AR1
STM #x,AR2
LD @x+1,A ADD @x,A ADD @x+2,A
LD #x,DP
LD *AR1+,A STL A,*AR2+ ;...
STL A,*(y)
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 26
Indirect Addressing Mode Indirect Addressing Mode *ARi*ARi
Compatible with Compatible with pointerspointers in C.in C. 8 ARi8 ARi Auxiliary Registers to store the Auxiliary Registers to store the
addresses of the operands.addresses of the operands. They are They are used as pointers.used as pointers.
2 ARAU2 ARAU = Auxiliary Registers = Auxiliary Registers Arithmetic Units to realize operations Arithmetic Units to realize operations on the addresses stored in the ARi.on the addresses stored in the ARi.
1 operand (Smem) or 2 operands 1 operand (Smem) or 2 operands (Xmem, Ymem) can be specified by (Xmem, Ymem) can be specified by indirect addressing in 1 instruction.indirect addressing in 1 instruction.
Very efficient for DSP operations.Very efficient for DSP operations.
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 27
Indirect addressing mode Indirect addressing mode *ARi*ARi
AR0AR0 can be used as an index. can be used as an index. Support for Support for circularcircular addressing addressing
details in next slidesdetails in next slides Bit Reversed Bit Reversed BRBR addressing for FFT addressing for FFT ARi can be modified during the ARi can be modified during the
instructioninstruction The possible modifications or operations on The possible modifications or operations on
ARi depend on the number of operands ARi depend on the number of operands specified by indirect addressing in the specified by indirect addressing in the instruction.instruction.
Pointers (ARi) must be initialized before Pointers (ARi) must be initialized before use.use.
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 28
Circular buffer and addressing on C54xCircular buffer and addressing on C54x
Data Memory
Start_address = xxxxxxxxxxx00000
ARi
End_address = xxxxxxxxxxx11111
xxxxxxxxxxx00010
ARi BK
N=30=1 1 1 1 0
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 29
Circular addressing with C54xCircular addressing with C54x Circular indirect addressing mode: Circular indirect addressing mode: %%
*ARi-%, *ARi+%, *ARi-0%, *ARi+0%, *ARi-%, *ARi+%, *ARi-0%, *ARi+0%, *ARi(lk)%*ARi(lk)%
In dual operand mode Xmem, Ymem:In dual operand mode Xmem, Ymem: *ARi+0%*ARi+0% only valid mode only valid mode To perform a decrement, store a negative value To perform a decrement, store a negative value
in AR0.in AR0.
BKBK register: register: Stores the size N of the circular buffer.Stores the size N of the circular buffer. Must be initialized before use.Must be initialized before use. There may be several circular buffers at There may be several circular buffers at
different addresses at the same time but different addresses at the same time but with the same length.with the same length.
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 30
Limitations on Start Addresses of Circular Limitations on Start Addresses of Circular BuffersBuffers
If N is written on nb bits in binary, the If N is written on nb bits in binary, the start address must have its nb LSB at 0:start address must have its nb LSB at 0: Examples:Examples:
for N=32, 6 LSB of start address =0for N=32, 6 LSB of start address =0 for N=30, 5 LSB of start address =0for N=30, 5 LSB of start address =0
To access a circular buffer:To access a circular buffer: Initialize BK with N (nb bits)Initialize BK with N (nb bits) Choose 1 ARi as a pointerChoose 1 ARi as a pointer
The effective start address of the buffer is the The effective start address of the buffer is the value in ARi with its nb LSB at 0.value in ARi with its nb LSB at 0.
The end address = start addess +N-1.The end address = start addess +N-1.
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 31
Indirect Addressing: Indirect Addressing: ARi Specifications and ARi Specifications and Options for ModificationOptions for Modification
For a single operand Smem:For a single operand Smem: 16 possible options for Smem,16 possible options for Smem, 4 bits for the option + 3 bits for the ARi.4 bits for the option + 3 bits for the ARi. The address is specified by 4 + 3 = 7 bits.The address is specified by 4 + 3 = 7 bits.
For 2 operands Xmem, Ymem:For 2 operands Xmem, Ymem: Only 4 ARi can be used: AR2 to AR5.Only 4 ARi can be used: AR2 to AR5. Only 4 possible options for the operations Only 4 possible options for the operations
on the ARi.on the ARi. Each address needs 2 + 2 = 4 bits, so 2x4=8 Each address needs 2 + 2 = 4 bits, so 2x4=8
bits are necessary for the 2 addresses.bits are necessary for the 2 addresses.
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 32
Indirect Addressing Options for Indirect Addressing Options for ARi ARi modifications,modifications, Single operand Smem Single operand Smem
No Modification *ARn no modification to ARn
Option Syntax Action Affected by:
Absolute *(lk) 16-bit lk is used as an absolute address See Absolute Addressing
Pre-modify *ARn (lk) *(ARn+LK), ARn unchanged *+ARn (lk) *(ARn+LK), ARn changed *+ARn (lk)% *(ARn+LK), ARn changed - circular BK *+ARn pre-increment by 1, during write only
Bit-Reversed *ARn+0B post inc. ARn by AR0 with reverse carry AR0 *ARn-0B post dec. ARn by AR0 with reverse carry (=FFT size/2)
Circular *ARn+% post increment by 1 - circular BK *ARn-% post decrement by 1 - circular *ARn+0% post increment by AR0 - circular BK, AR0 *ARn-0% post decrement by AR0 - circular
Indexed *ARn+0 post increment by AR0 AR0 *ARn-0 post decrement by AR0
Increment / *ARn+ post increment by 1 Decrement *ARn- post decrement by 1
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 33
Indirect Addressing Options for Indirect Addressing Options for ARiARifor Double Operand Xmem and Ymemfor Double Operand Xmem and Ymem
No Modification *ARn no modification to ARn
Option Syntax Action Affected by:
Circular *ARn+0% post increment by AR0 - circular BK, AR0
Increment / *ARn+ post increment by 1 Decrement *ARn- post decrement by 1
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 34
Indirect Addressing Mode Indirect Addressing Mode *ARi*ARi
There are latencies to consider:There are latencies to consider: no latencyno latency STM, MVDKSTM, MVDK 1 cycle1 cycle MVDM, MVKD, MVDDMVDM, MVKD, MVDD 2 cycles2 cycles STLM, ST, etcSTLM, ST, etc
ARi are read/modified in access phase, so the ARi are read/modified in access phase, so the debugger will appear to show ARs changing early.debugger will appear to show ARs changing early.
CMPT must = 0 (bit5, ST1)CMPT must = 0 (bit5, ST1) is 0 on resetis 0 on reset is forced to 0 with RSBX CMPTis forced to 0 with RSBX CMPT CMPT (Compatibility Mode Bit) = 1 allows CMPT (Compatibility Mode Bit) = 1 allows
‘C2x/’C2xx/C5x styled ARP operation for ARs. ‘C2x/’C2xx/C5x styled ARP operation for ARs. But this mode is discouraged.But this mode is discouraged.
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 35
ExampleExample
Initialization of AR1 and AR2.
Copy the values from table in DROM to RAM (via A). Indirect addressing allows sequential access to data.
RAM
x[3]
RAM
y54xCPU
System Diagram
DROM
tbl[3]
EPROM
code
x .usect "vars",3 y .usect "result",1
.sect ”init" tbl .int 1,2,3
.sect “code” start: STM #tbl,AR1
STM #x,AR2
LD @x+1,A ADD @x,A ADD @x+2,A
LD #x,DP
LD *AR1+,A STL A,*AR2+ ;...
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 36
MMR Memory Mapped RegistersMMR Memory Mapped Registers AddressingAddressing MMRs are in page 0 of data memory.MMRs are in page 0 of data memory. They can be accessed by some specific MMR They can be accessed by some specific MMR
instructions allowing simple access to page 0.instructions allowing simple access to page 0. In these cases DP, SP and CPL are ignoredIn these cases DP, SP and CPL are ignored
0000h
0060h
007Fh
MMRs
Scratch
Tip: use the .mmregs directive to allow MMR names to be interpreted as addresses
LDM, STLM MMR AccSTM # MMRPSHM, POPM MMR StackMVDM, MVMD MMR DmemMVMM AR, SP AR, SP
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 37
MMR Memory Mapped RegistersMMR Memory Mapped Registers
Addr. Name (Hex) Description
IMR 0000 Interrupt Mask Register
IFR 0001 Interrupt Flag Register
----- 2 - 5 Reserved
ST0 0006 Status 0 Register
ST1 0007 Status 1 Register
AL 0008 A accumulator low (A[15:00])
AH 0009 A accumulator high (A[31:16])
AG 000A A accumulator guard (A[39:32])
BL 000B B accumulator low (B[15:00])
BH 000C B accumulator high (B[31:16])
BG 000D B accumulator guard (B[39:32])
T 000E Temporary Register
TRN 000F Transition Register
Addr.Name (Hex) Description
AR0 0010 Address Register 0
AR1 0011 Address Register 1
AR2 0012 Address Register 2
AR3 0013 Address Register 3
AR4 0014 Address Register 4
AR5 0015 Address Register 5
AR6 0016 Address Register 6
AR7 0017 Address Register 7
SP 0018 Stack Pointer Register
BK 0019 Circular Size Register
BRC 001A Block Repeat Counter
RSA 001B Block Repeat Start Address
REA 001C Block Repeat End Address
PMST 001D PMST Register
------- 01E-01F Reserved
Note: XPC and Peripheral MMR locations are device dependent
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 38
MMR Memory Mapped Registers AddressingMMR Memory Mapped Registers Addressing
When accessing MMRs, latencies need When accessing MMRs, latencies need to be considered.to be considered.
STM (STore to Memory-mapped STM (STore to Memory-mapped register):register): Stores an immediate value to the specified Stores an immediate value to the specified
MMR or ScratchMMR or Scratch memory memory address. address. Writes the values during the access phase Writes the values during the access phase
of the pipeline to avoid latencies.of the pipeline to avoid latencies.
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 39
Exercise on Addressing Modes of C54xExercise on Addressing Modes of C54xGiven: DP=0 DP=4 DP=6 Address/Data (HEX) 60 20 200 100 300 100CPL=0 61 120 201 60 301 30CMPT=0 62 202 40 302 60
Program A B DP AR0 AR1 AR2LD #0,DPSTM #2,AR0STM #200h,AR1STM #300h,AR2LD @61h,AADD *AR1+,ASUB @60h,A,BADD *AR1+,B,ALD #6,DPADD @1,AADD *AR2+,ASUB *AR2+,ASUB #32,AADD *AR1-0,A,BSUB *AR2-0,B,ASTL A,62h
120
260
390
380
Addr Mode
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 40
Exercise on Addressing Modes of C54xExercise on Addressing Modes of C54xGiven: DP=0 DP=4 DP=6 Address/Data (HEX) 60 20 200 100 300 100CPL=0 61 120 201 60 301 30CMPT=0 62 202 40 302 60
Program A B DP AR0 AR1 AR2
LD #0,DP STM #2,AR0 STM #200h,AR1 STM #300h,AR2 LD @61h,A ADD *AR1+,A SUB @60h,A,B ADD *AR1+,B,A LD #6,DP ADD @1,A ADD *AR2+,A SUB *AR2+,A SUB #32,A ADD *AR1-0,A,B SUB *AR2-0,B,A STL A,62h
Addr Mode 120 260 390 380
IMMED 0 MMR 2 MMR 200 MMR 300 DIRECT INDIRECT 220 201 DIRECT 200 INDIRECT 202 IMMED 6 DIRECT 290 INDIRECT 301 INDIRECT 360 302 IMMED 340 INDIRECT 200 INDIRECT 320 300 DIRECT
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 41
Circular buffer and circular addressingCircular buffer and circular addressing
A circular buffer of length N is a block A circular buffer of length N is a block of contiguous memory words addressed of contiguous memory words addressed by a pointer using a modulo N by a pointer using a modulo N addressing mode. addressing mode. The 2 extreme words of the memory block The 2 extreme words of the memory block
are considered as contiguous.are considered as contiguous. Characteristics of a circular buffer:Characteristics of a circular buffer:
Instead of moving the N data in memory, Instead of moving the N data in memory, just modify the pointers.just modify the pointers.
When a new data x(n) arrives, the pointer When a new data x(n) arrives, the pointer is incremented and the new data is written is incremented and the new data is written in place of the oldest one.in place of the oldest one.
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 42
Trace of Memory and Pointer in a Circular Trace of Memory and Pointer in a Circular Buffer of Length 3Buffer of Length 3
Time n Time n+1 Time n+2 Time n+3
x(n-1) x(n-1) x(n+2) x(n+2)x(n) x(n) x(n) x(n+3)
x(n-2) x(n+1) x(n+1) x(n+1)
Very often used for FIR filters.Very often used for FIR filters.
Trestino Cosmo Università degli studi di PadovaCapitolo 2, Slide 43
CODE COMPOSER CODE COMPOSER STUDIOSTUDIO
Code Composer StudioCode Composer Studio L’applicazione Code Composer Studio L’applicazione Code Composer Studio
(CCS) fornisce un ambiente integrato (CCS) fornisce un ambiente integrato con le seguenti caratteristiche:con le seguenti caratteristiche: Ambiente integrato di svilupo con un Ambiente integrato di svilupo con un
editor, debugger, project manager, profiler, editor, debugger, project manager, profiler, etc.etc.
Compilatore ‘C/C++’ , ottimizzatore Compilatore ‘C/C++’ , ottimizzatore assembly e linker (code generation tools).assembly e linker (code generation tools).
Simulatore.Simulatore. Sistema operativo Real-time Sistema operativo Real-time
(DSP/BIOS™).(DSP/BIOS™). Passaggio Real-Time dei dati da PC a DSK Passaggio Real-Time dei dati da PC a DSK
(RTDX™).(RTDX™). Analisi Real-time visualizzazione dei dati. Analisi Real-time visualizzazione dei dati.
Code Composer StudioCode Composer Studio
Il Code Composer Studio comprende:Il Code Composer Studio comprende: Editor / Debugger IntegratiEditor / Debugger Integrati Simulatore Simulatore **
PLU
G I
NS
Est
erne
PLU
G I
NS
Est
erne
EditEdit
SIMSIMCompilerCompilerAsm OptAsm Opt
AsmAsm
DSKDSK
EVMEVM
SchedeSchedeEmbeddedEmbedded
Standard Standard Runtime Runtime LibrariesLibraries
Strumenti per generaz. CodiceStrumenti per generaz. Codice BIOS:BIOS: Real-time kernelReal-time kernel
Real-time analysisReal-time analysis
Plug-insPlug-ins
RTDXRTDX
DSP/BIOSDSP/BIOSLibrariesLibraries
DSP/BIOSDSP/BIOSConfigConfigToolTool
DebugDebug.out.out
LinkLink
* Simulator not included with DSK, only with full version of CCS.* Simulator not included with DSK, only with full version of CCS.
Esempio di utilizzo CCSEsempio di utilizzo CCSImplementiamo:Implementiamo:
con: con: aaii = {40, 39, …, 1} = {40, 39, …, 1}
xxii = {1, 2, …, 40} = {1, 2, …, 40}
(1)(1) Creiamo una directory di lavoro e copiamo I Creiamo una directory di lavoro e copiamo I seguenti files:seguenti files:
(a)(a) lab.cmdlab.cmd
(b) vectors.asm(b) vectors.asm
(c)(c) lab.clab.c
(2)(2) Creiamo un nuovo progetto:Creiamo un nuovo progetto:
(a)(a) Avviare CCS.Avviare CCS.
(b)(b) Creare il nuovo progetto come indicato Creare il nuovo progetto come indicato nelle slide successive.nelle slide successive.
1
0
N
iii xay
Esempio di utilizzo CCSEsempio di utilizzo CCS
Esempio di utilizzo CCSEsempio di utilizzo CCS
(3)(3) Add files to the project (lab.c, lab.cmd, vector.asm).Add files to the project (lab.c, lab.cmd, vector.asm).
Esempio di utilizzo CCSEsempio di utilizzo CCS
(4)(4) Cambiare le opzioni di compilazione e link:Cambiare le opzioni di compilazione e link:
Esempio di utilizzo CCSEsempio di utilizzo CCS
(5)(5) Creare il programma eseguibile Creare il programma eseguibile (lab.out):(lab.out):
(a)(a) Procedure alternative:Procedure alternative:
(i)(i) Cliccare l’icona “Rebuild Cliccare l’icona “Rebuild All”. All”.
(ii)(ii) Selezionare ”Rebuild All” Selezionare ”Rebuild All” nel nel menù project. menù project.
(b)(b) Verificare nella finestra di Verificare nella finestra di output il output il buon esito della buon esito della compilazione compilazione (viene (viene mostrato “0 errors, 0 mostrato “0 errors, 0 warnings”:warnings”:
Esempio di utilizzo CCSEsempio di utilizzo CCS(6)(6) Caricare l’eseguibile lab.out nella memoria del DSP:Caricare l’eseguibile lab.out nella memoria del DSP:
(b)(b) Caricare lab.out selezionando Caricare lab.out selezionando FFile:Load ile:Load PProgram come mostrato sotto:rogram come mostrato sotto:
Esempio di utilizzo CCSEsempio di utilizzo CCS(7)(7) Eseguire e debuggare il codice:Eseguire e debuggare il codice:
(a)(a) Andare all’inizio del programma, Andare all’inizio del programma, main() main() selezionando Debug:Go Main.selezionando Debug:Go Main.
(b)(b) Esamina variabili:Esamina variabili:
(i) (i) Selezionare la variabile (da esaminare) Selezionare la variabile (da esaminare) dal file lab.c, right click e selezionare dal file lab.c, right click e selezionare “Add To Watch Window”. Se la “Add To Watch Window”. Se la variabile variabile ad esempio è y, verrà mostarta la ad esempio è y, verrà mostarta la seguente finestra.seguente finestra.
Esempio di utilizzo CCSEsempio di utilizzo CCS(7)(7) Eseguire e debuggare il codice: : Eseguire e debuggare il codice: :
(c) (c) E’ possibile eseguire completamente o passo passo il codice utilizzando le varie icone sulla barra o tramite il E’ possibile eseguire completamente o passo passo il codice utilizzando le varie icone sulla barra o tramite il menù Debug:menù Debug:
SVILUPPARE SVILUPPARE CODICE IN CODICE IN
CC
Sviluppare codice in cSviluppare codice in c
Alla luce di quanto visto, sviluppare codice in Alla luce di quanto visto, sviluppare codice in linguaggio C non presenta particolari difficoltà. linguaggio C non presenta particolari difficoltà. E’ possibile creare codice su PC e poi farlo E’ possibile creare codice su PC e poi farlo “girare” su DSP senza problemi:“girare” su DSP senza problemi:
La libreria standard del C è pienamente La libreria standard del C è pienamente supportata (rts.lib).supportata (rts.lib).
E’ possibile utillizzare le classiche funzioni di E’ possibile utillizzare le classiche funzioni di I/O su schermo o file, printf(), fprintf(), scanf() I/O su schermo o file, printf(), fprintf(), scanf() etc…e di allocazione dinamica della memoria etc…e di allocazione dinamica della memoria come la malloc()..come la malloc()..
Unico accorgimento è sui Unico accorgimento è sui tipi di datotipi di dato. Il . Il compilatore per DSP C5x implementa alcuni tipi compilatore per DSP C5x implementa alcuni tipi di dato in maniera differente dai comuni di dato in maniera differente dai comuni compilatori per PC. Es: compilatori per PC. Es: long, int etc…long, int etc…
Tipi di dato ‘C5402Tipi di dato ‘C5402
Tipo Dimensione RappresentazioneTipo Dimensione Rappresentazione
char, signed charchar, signed char 16 bits16 bits ASCIIASCIIunsigned charunsigned char 16 bits16 bits ASCIIASCIIshortshort 16 bits16 bits 2’s complement2’s complementunsigned shortunsigned short 16 bits16 bits binarybinaryint, signed intint, signed int 16 bits16 bits 2s complement2s complement unsigned intunsigned int 16 bits16 bits binarybinarylong, signed longlong, signed long 32 bits 32 bits 2’s complement2’s complementunsigned longunsigned long 32 bits 32 bits binarybinaryenumenum 16 bits 16 bits 2’s complement2’s complementfloatfloat 32 bits 32 bits IEEE 32-bitIEEE 32-bitdoubledouble 32 bits 32 bits IEEE 64-bitIEEE 64-bitlong doublelong double 32 bits 32 bits IEEE 64-bitIEEE 64-bitpointerspointers 16 bits 16 bits binarybinary
!!
Scrivere Codice in CScrivere Codice in C
Quando si compila codice scritto in C, ricordarsi di Quando si compila codice scritto in C, ricordarsi di linkare anche la libreria C, chiamata linkare anche la libreria C, chiamata rts.librts.lib
Codice CCodice C
Libreria rts.libLibreria rts.libCodice assemblyCodice assembly
Compilatore Compilatore AssemblerAssembler LinkerLinker Codice Codice
EseguibileEseguibile
.lib.lib.asm.asm
.asm.asm .obj.obj.c.c
E’ possibile trovare la rts.lib in: C:\ti\c6000\cgtools\libE’ possibile trovare la rts.lib in: C:\ti\c6000\cgtools\lib
““Ingredienti” per Ingredienti” per sviluppare un sviluppare un
codice eseguibile codice eseguibile su C5402su C5402
Cosa serve per creare un codice Cosa serve per creare un codice eseguibile su C5402eseguibile su C5402
Per creare un codice .out, in ambiente CCS da caricare sul nostro Per creare un codice .out, in ambiente CCS da caricare sul nostro processore sono necessari alcuni file di supporto:processore sono necessari alcuni file di supporto:
1.1. Processo.cProcesso.c : questo è il nostro file creato in C che effettua l’elaborazione : questo è il nostro file creato in C che effettua l’elaborazione vera e propria sul segnale.vera e propria sul segnale.
2.2. Rts.libRts.lib : libreria da linkare assieme al codice. Impelmenta tra le altre : libreria da linkare assieme al codice. Impelmenta tra le altre cose, tutte le funzioni di uso comune (printf(), etc..)cose, tutte le funzioni di uso comune (printf(), etc..)
3.3. Vector.asmVector.asm: E’ la tabella dei vettori da caricare a partire dalla locazione : E’ la tabella dei vettori da caricare a partire dalla locazione 0x0. Quando viene effettuato il reset, la CPU, tramite questa tabella salta 0x0. Quando viene effettuato il reset, la CPU, tramite questa tabella salta al main() del nostro codice C.al main() del nostro codice C.
4.4. .cmd.cmd: In questo file si specifica come è strutturata la memoria interna ed : In questo file si specifica come è strutturata la memoria interna ed esterna della CPU. Serve al linker per poter “rilocare” il codice.esterna della CPU. Serve al linker per poter “rilocare” il codice.
Processo.cProcesso.c CompilatoreCompilatore AssemblerAssembler
Rts.libRts.lib
LinkerLinker
Vectros.asmVectros.asm .cmd.cmd
.out.out