transport module (tm) specification version 1 specification v1.0.pdfopen base station architecture...

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OPEN BASE STATION ARCHITECTURE INITIATIVETransport Module (TM) Specification

Version 1.0

OPEN BASE STATION ARCHITECTURE INITIATIVE

Issue 1.0 2 (31)

Preface1

OBSAI Specification documents are developed within the Technical Working Groups 2of the Open Base Station Architecture Initiative Special Interest Group (OBSAI SIG). 3Members of the OBSAI TWG serve voluntarily and without compensation. The 4specifications developed within OBSAI represent a consensus of the broad expertise 5on the subject within the OBSAI SIG.6

Use of an OBSAI Specification is wholly voluntary. The existence of an OBSAI 7Specification does not imply that there are no other ways to produce, test, measure, 8purchase, market, or provide other goods and services related to the scope of the 9OBSAI Specification. Furthermore, the viewpoint expressed at the time a 10specification is approved and issued is subject to change brought about through 11developments in the state of the art and comments received from users of the 12specification. Every OBSAI Specification is subjected to review in accordance with 13the Open Base Station Architecture Initiative Rules And Procedures.14

Implementation of all or part of an OBSAI Specification may require licenses under 15third party intellectual property rights, including without limitation, patent rights (such a 16third party may or may not be an OBSAI Member). The Promoters of the OBSAI 17Specification are not responsible and shall not be held responsible in any manner for 18identifying or failing to identify any or all such third party intellectual property rights.19

The information in this document is subject to change without notice and describes 20only the product defined in the introduction of this documentation. This document is 21intended for the use of OBSAI Member’s customers only for the purposes of the 22agreement under which the document is submitted, and no part of it may be 23reproduced or transmitted in any form or means without the prior written permission of 24OBSAI Management Board. The document has been prepared to be used by 25professional and properly trained personnel, and the customer assumes full 26responsibility when using it. OBSAI Management Board, Marketing Working Group 27and Technical Working Group welcome customer comments as part of the process of 28continuous development and improvement of the documentation. 29

The information or statements given in this document concerning the suitability, 30capacity, or performance of the mentioned hardware or software products cannot be 31considered binding but shall be defined in the agreement made between OBSAI 32members. However, the OBSAI Management Board, Marketing Working Group or 33Technical Working Group have made all reasonable efforts to ensure that the 34instructions contained in the document are adequate and free of material errors and 35omissions. 36

OBSAI liability for any errors in the document is limited to the documentary correction 37of errors. OBSAI WILL NOT BE RESPONSIBLE IN ANY EVENT FOR ERRORS IN 38THIS DOCUMENT OR FOR ANY DAMAGES, INCIDENTAL OR CONSEQUENTIAL 39(INCLUDING MONETARY LOSSES), that might arise from the use of this document 40or the information in it.41

This document and the product it describes are considered protected by copyright 42according to the applicable laws.43

OBSAI logo is a registered trademark of Open Base Station Architecture Initiative 44Special Interest Group. 45

46


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Other product names mentioned in this document may be trademarks of their 1respective companies, and they are mentioned for identification purposes only.2

Copyright © Open Base Station Architecture Initiative Special Interest Group. All rights 3reserved.4

Users are cautioned to check to determine that they have the latest edition of any 5OBSAI Specification. 6

Interpretations: Occasionally questions may arise regarding the meaning of portions of 7standards as they relate to specific applications. When the need for interpretations is 8brought to the attention of OBSAI, the OBSAI TWG will initiate action to prepare 9appropriate responses. Since OBSAI Specifications represent a consensus of OBSAI 10Member’s interests, it is important to ensure that any interpretation has also received 11the concurrence of a balance of interests. For this reason OBSAI and the members of 12its Technical Working Groups are not able to provide an instant response to 13interpretation requests except in those cases where the matter has previously14received formal consideration. 15

Comments on specifications and requests for interpretations should be addressed to:16

Peter Kenington17

Chairman, OBSAI Technical Working Group18

Linear Communications Consultants Ltd.19

Email: [email protected]


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Contents

1 Summary of changes.........................................................................................72 Scope ..................................................................................................................83 General................................................................................................................9

3.1 Topology and Dimensioning Requirements ..................................................93.2 Hot Insertion and Removal..........................................................................103.3 Signal Naming Conventions........................................................................103.4 Connector Naming and Orientation.............................................................12

4 TM Interfaces ....................................................................................................144.1 Signal List ...................................................................................................144.2 Signal Specification.....................................................................................16

4.2.1 Common Signals..................................................................................174.2.2 TM Specific Signals .............................................................................204.2.3 TM Unspecified Signals .......................................................................224.2.4 TM Power Signals................................................................................22

5 TM Pin Assignments ........................................................................................235.1 Data Connector ...........................................................................................23

5.1.1 Class 1 modules ..................................................................................235.1.2 Class 2 modules ..................................................................................265.1.3 Class 3 modules ..................................................................................27

5.2 Power Connector ........................................................................................286 Glossary............................................................................................................29

6.1 Abbreviations ..............................................................................................296.2 Definition of Terms ......................................................................................29

7 References........................................................................................................317.1 OBSAI .........................................................................................................317.2 IEEE............................................................................................................317.3 ANSI............................................................................................................31


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Figures

Figure 2-1 BTS Reference Architecture.......................................................................8

Figure 3-1 Signal Direction Definition ........................................................................11

Figure 3-2 Connector Positions and Naming (module rear view) ..............................13

Figure 4-1 Redundancy Connection Scheme............................................................21


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List of Tables

Table 3-1 TM Classes .................................................................................................9

Table 3-2 TM Signal Abbreviations ...........................................................................10

Table 4-1 TM Interface signal list ..............................................................................15

Table 4-3 System Clock Electrical Parameters .........................................................19

Table 4-4 Reference Clock Electrical Parameters.....................................................20

Table 5-1 Class 1 Data Connector J1 Pin Assignment (module rear view) ...............24

Table 5-2 Class 1 Optional Data Connector J2 Pin Assignment (module rear view).25

Table 5-3 Data Connector J2 Class 2 Pin Assignment (module rear view) ...............26

Table 5-4 Data Connector J2 Class 3 Pin Assignment (module rear view) ...............27

Table 5-5 TM Power Connector P1 Pin Assignment .................................................28

Table 5-6 TM Optional Power Connector P2 Pin Assignment ...................................28


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1 Summary of changes1

2

Version Approved by Date Comment

1.0 OBSAI Management Board 19-May-2004


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2 Scope 1

2

This document specifies the base transceiver system (BTS) internal interfaces (i.e., System 3Interfaces) of the OBSAI Transport Module (TM). It defines the Transport Module’s physical 4implementation of OBSAI reference points RP1 and RP2 and the required interconnection 5scheme to other BTS modules as illustrated in Figure 2-1 below.6

7

TransportBlock

Control and ClockBlock

BaseBandBlock

RFBlock

RP1

RP2 RP3

Iub orAbis

ProprietaryBlockPower

RP4

ControlTrafficClockPower

8

Figure 2-1 BTS Reference Architecture9


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3 General1

This specification focuses on the physical interface requirements of the TM. The 2actual BTS and TM designs are out of the scope of this document. Guidelines for 3implementation are given where appropriate.4

3.1 Topology and Dimensioning Requirements5

The BTS internal interface provided by the TM supports the following functions:6

� Internal Networking functions via RP1 and RP27

� Synchronization functions via RP18

Internal Networking functions are based on LAN concepts using Ethernet as Layer 2 9protocol. The TM is the center of a star network topology and performs Ethernet 10switching between modules in one shelf. Each module in the shelf has a dedicated 11link to the fabric.12

The OBSAI architecture supports different system configurations. The TM supports 13this through the definition of three module classes, which are differentiated by the 14total number of fabric ports (see Table 3-1). Thus the class defines how many 15modules are supported in a shelf. 16

Transport Module redundancy is supported optionally by a second TM, forming the 17center of a second star network (double star topology). See section 4.2.2.2 for details 18on redundancy.19

The Transport Module optionally supports shelf extension, with a point-to-point 20connection to the center of a star network in a second shelf. See OBSAI RP2 21Specification [OBSAI RP2] section 3.2 for details on shelf extension.22

TM Class Number of Fabric Ports Number of Data Connectors

1 7 1, (2 optionally)

2 15 2

3 31 2

Table 3-1 TM Classes23


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3.2 Hot Insertion and Removal1

All signals shall support hot insertion and removal. Hot insertion is supported on the 2module by delayed (insertion) and early (removal) switch on/off of the power supply 3by means of a last mating enable pin at the power connector. Every source and sink 4of a signal shall survive without any damage, if the connected signal is within its 5specified operating voltage range.6

7

3.3 Signal Naming Conventions8

All signal names start with a 2-4-letter abbreviation that describes the general 9function of the signal group. 10

11

Abbreviation Full Name Comment

MA Module Address -

SA Shelf Address -

MNC Module Not Connected Not Connected on Module

FP Fabric Port -

SCLK System Clock -

RCLK Reference Clock -

TMUS TM Unspecified -

RC Redundancy Control -

RCL Redundancy Communication Link -

GND Ground Digital Ground

BPNC Backplane Not Connected Not Connected on Backplane

Table 3-2 TM Signal Abbreviations12

The signal name abbreviation is followed by a numerical index to distinguish between 13several instances of a signal inside a signal group. The index starts with the value 14“0”.15


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Additionally a direction indication is attached for signal groups with receive (_RX), 1transmit (_TX) and bi-directional (_BI) signals, if there is a need to distinguish 2between those. The direction is derived from the physical characteristics at the 3module boundary. The direction of signals not explicitly indicated by the signal name 4is specified in the signal list (section 4.1), or left unspecified intentionally.5

Module

RX

TX

BI

6

Figure 3-1 Signal Direction Definition7

A signal group supporting more than one differential pair (e.g. 1000 Base-T) uses 8alphabetic letters starting with “DA” (e.g. DA, DB, DC, …).9

Finally differential pair signals are denoted by a trailing + (positive) or – (negative) 10symbol.11

The following rule applies:12

13

Signal Name Abbreviation [Numerical Index] [_RX;_TX;_BI][DPair Index] [+;-]


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3.4 Connector Naming and Orientation1

Definitions:2

� Female connectors use the reference designator prefix J3

� Male connectors use the reference designator prefix P4

� Mechanical guiding pins use the reference designator prefix G5

� Mechanical guiding holes use the reference designator prefix H6

A numerical index follows the designator prefix. 7

The following rule applies to the module:8

9

Prefix [Module Index]

10

This concept also applies to the backplane connectors. While this is not included in 11the scope of this specification, it is recommended that users follow this guidance. In 12addition to the module index the backplane has a slot index, which references the 13slot position. 14

The following rule applies to the backplane:15

16

Prefix [Module Index] [Slot Index]

17

Figure 3-2 shows the module connector naming.18


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1

Figure 3-2 Connector Positions and Naming (module rear view)2

1

1

1

1

Data Connector J2(without guide)

Data Connector J1(with guide)

Power Connector P1

Optional Power Connector P2

J1

J2

P1

P2

PC

B

1 2

Module


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4 TM Interfaces 1

4.1 Signal List2

The TM signal groups and the expected peer modules are listed below:3

4

No Signal Group Peer Module Comment Direction Technology

Common Signals

1 SA[0..2] -2 Shelf address (3 bit) I -

2 MA[0..4] - Module address (5 bit) I -

3 FP[0..1]_TX[+,-]4FP[0..1]_BIDA[+,-]

not identified 1 Fabric Port 0 and 1 OI/O

100 Base-TX1000 Base-T

4 FP[0..1]_RX[+,-]4FP[0..1]_BIDB[+,-]

not identified 1 Fabric Port 0 and 1 II/O

100 Base-TX1000 Base-T

5 FP[0..1]_BIDC[+,-] not identified 1 Fabric Port 0 and 1 I/O 1000 Base-T

6 FP[0..1]_BIDD[+,-] not identified 1 Fabric Port 0 and 1 I/O 1000 Base-T

7 SCLK[0..1][+,-] CCM[0..1] System Clock Input I LVDS

8 BPNC - Proprietary test and debug signals

- -

9 GND - Digital Ground - -

TM Specific Signals

10 RCLK[0..1][+,-] CCM[0..1] Reference Clock Output O LVDS

11 RA[+,-] TM 3 Redundancy Communication Link

unspecified 100Ohms diff.

12 RB[+,-] TM 3 Redundancy Communication Link

unspecified 100Ohms diff.

13 RC[0..3] TM 3 Redundancy Control unspecified unspecified


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14 RD[0..3] TM 3 Redundancy Control unspecified unspecified

15 FP[2..6]_TX[+,-] not identified 1 Fabric Port 2 to 6 (Class 1, 2, 3) O 100 Base-TX

16 FP[2..6]_RX[+,-] not identified 1 Fabric Port 2 to 6 (Class 1, 2, 3) I 100 Base-TX

17 FP[7..14]_TX[+,-] not identified 1 Fabric Port 7 to 14 (Class 2, 3) O 100 Base-TX

18 FP[7..14]_RX[+,-] not identified 1 Fabric Port 7 to 14 (Class 2, 3) I 100 Base-TX

19 FP[15..30]_TX[+,-] not identified 1 Fabric Port 15 to 30 (Class 3) O 100 Base-TX

20 FP[15..30]_RX[+,-] not identified 1 Fabric Port 15 to 30 (Class 3) I 100 Base-TX


TM Unspecified Signals

22 TMUS - Proprietary Signals - -

TM Power Signals

23 PWR_POS - Supply Voltage Positive - Power

24 PWR_NEG - Supply Voltage Negative - Power

25 PWR_ENA - Power Enable I -


Table 4-1 TM Interface signal list1

Note 1: Could be any other module2

Note 2: Not applicable3

Note 3: Peer is the backup TM module in the protection group.4

Note 4: FP0 and FP1 can be implemented either in 100Base-TX or 1000Base-T technology.5


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4.2 Signal Specification1

This chapter specifies the TM interface signals at the TM boundary. The data and 2power connector signals are differentiated in 4 groups:3

� Common Signals4

� TM Specific Signals5

� TM Unspecified Signals6

� Power7

If necessary, additional requirements for the implementation are given in the signal 8subchapter.9


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4.2.1 Common Signals1

Common signals are common to all modules and shall be supported. Common 2Signals are assigned to fixed pin positions at the data connector J1, which is present 3at all modules.4

4.2.1.1 Module and Shelf address5

The module (MA[0..4]) and shelf address signals (SA[0..2]) are used to give the 6module a unique hardwired address related to the shelf and slot position of the 7module. 8

The TM shall pull the address pins up. An address bit logic one is indicated by 9leaving the address pin unconnected on the backplane. A logic zero is indicated 10through connecting the respective pin to logic ground on the backplane.11

The address signals are static.12


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4.2.1.2 Ethernet Fabric Ports1

The common fabric ports FP[0..1] are available on every module in the shelf. On the 2TM module these ports can be realized in two variants:3

� Fast Ethernet [100Base-TX] according to [IEEE 802.3] clause 254

� Gigabit Ethernet [100/1000Base-T] according to [IEEE 802.3] clause 405

The Gigabit Ethernet interfaces (optional) may be required in certain system 6configurations to support High-Capacity BBMs or Shelf extension. Please refer to the 7OBSAI System Specification for more details [OBSAI System].8

The data connector pin assignment supports both port types. In the case that the 9fabric ports use Fast Ethernet, the unused fabric port pins (quantity 4 per port) shall 10be left as MNC.11


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4.2.1.3 System Clock Input1

The CCM provides a 30.72MHz System Clock (SCLK[0..1]) to the TM modules in the 2shelf. This System Clock can be used as a frequency reference for the transmission 3clock of network interfaces, where it is required (e.g. PDH, SDH/SONET).4

The System Clock links in the system are point-to-point links. The TM shall have two 5differential clock inputs - one from each of the two CCMs, which together form a 6redundant pair.7

The System Clock timing parameters are specified in the OBSAI RP1 Specification 8[OBSAI RP1].9

The electrical receiver characteristic of the TM System Clock input shall follow the 10LVDS standard ANSI/TIA/EIA-644-A [ANSI1]. 11

The TM shall terminate these backplane links with a differential impedance of 100 �12� 20%.13

14

Parameter Symbol Min Typical Max Unit

Receiver Input Threshold VTH - - � 100 mV

Differential Input Voltage VID � 100 - � 600 mV

Input Current (Power On) IIN_ON - - �20 uA

Input Current (Power Off) IIN_OFF - - �20 uA

Input Voltage Range VIN 0 - 2.4 V

Differential Input Impedance ZIN 80 100 120 �

Table 4-2 System Clock Electrical Parameters15

In TM power-down state the receiver input shall be in high impedance state.16

17


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4.2.2 TM Specific Signals1

TM specific signals are specific to the TM and shall be supported. TM specific signals 2are assigned to fixed pin positions at the data connector J1.3

4.2.2.1 Reference Clock Output4

If the TM provides a Reference Clock (RCLK) to the CCM modules in the shelf, it 5shall an 8kHz reference clock signal, derived from the network interface. Conditioning 6of the clock is not required. The Reference Clock can be used as a frequency 7reference for the transmission clock of network interfaces, where it is required (e.g. 8PDH, SDH/SONET).9

The reference clock links in the system are point-to-point.10

The TM shall provide two differential clock outputs - one to each of the two CCMs, 11which together form a redundant pair.12

The reference system clock timing parameters are specified according to the OBSAI 13RP1 Specification [OBSAI RP1].14

The electrical receiver characteristic of the TM reference clock output shall follow the 15LVDS standard ANSI/TIA/EIA-644-A [ANSI1] with a differential impedance of 100 � �1620%.17

18

Parameter Symbol Min Typical Max Unit

Transmitter Differential Output Voltage

VOD 247 - 454 mV

Transmitter Offset Voltage VOS 1.125 - 1.375 V

Input Current (Power Off) IIN_OFF - - �10 uA

Table 4-3 Reference Clock Electrical Parameters19

In TM power-down state the transmitter output shall be in high impedance state.20

21


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4.2.2.2 Redundancy Signals1

Redundancy Signals form a link between two peer TM’s. They comprise Redundancy 2Control Signals (RC[0..3], RD[0..3]) and Redundancy Communication Link Signals 3(RA+/-, RB+/-). If redundancy is supported, the interconnection scheme as shown in 4Figure 4-1 shall be applied.5

It is expected that modules in a redundant pair are from the same type and vendor. 6Therefore, the functional and timing characteristics of the Redundancy Signals are 7not specified. 8

The Redundancy Communication Link on the TM shall be 100� differential pair. The 9electrical characteristics of the Redundancy Signals are not specified.10

In TM power-down state the Redundancy Control Signals shall be in high impedance 11state.12

TM Module 1

RC0

RC1

RC2

RA+

RA-

RB+

RB-

RA+

RA-

RB+

RB-

RC3

RD0

RD1

RD2

RC0

RC1

RC2

RD3

RC3

TM Module 2

RD0

RD1

RD2

RD3

13

Figure 4-1 Redundancy Connection Scheme14


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4.2.3 TM Unspecified Signals1

TM Unspecified Signals are optional. Their functional and electrical characteristics 2are not specified. If present, TM Unspecified Signals shall be assigned to a range of 3pin positions at the data connectors J1 and J2. The range of pin positions is fixed for 4a TM class.5

Connecting TM Unspecified Signals may cause incompatibility with certain backplane 6configurations.7

4.2.4 TM Power Signals8

Power signals are defined in the OBSAI System Reference Document [OBSAI 9System].10


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5 TM Pin Assignments 1

5.1 Data Connector2

The data connector is specified in the OBSAI System Reference Document [OBSAI 3System] Appendix C. Coding style 3 shall be used.4

5.1.1 Class 1 modules5

Class 1 modules shall be equipped with a data connector J1 specified in Table 5-1.6

The data connector J2 is optional. If the data connector J2 is used for class 1 7modules, all signals are TM Unspecified (Table 5-2).8

Class 1 modules without optional data connector J2 can be plugged into a backplane 9with class 2 or 3 TM slots. This configuration supports up to 7 fabric ports.10

Class 1 modules with optional data connector J2 cannot be plugged into a backplane 11with class 2 or 3 TM slots. 12


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1

J1 f e d c b a1 SA0 BPNC BPNC BPNC BPNC BPNC2 SA1 BPNC BPNC BPNC BPNC BPNC3 SA2 GND GND BPNC GND GND4 GND FP1_BIDC+ FP1_BIDA+ GND FP0_BIDC+ FP0_BIDA+5 GND FP1_BIDC- FP1_BIDA- GND FP0_BIDC- FP0_BIDA-6 GND FP1_BIDD+ FP1_BIDB+ GND FP0_BIDD+ FP0_BIDB+7 GND FP1_BIDD- FP1_BIDB- GND FP0_BIDD- FP0_BIDB-8 TMUS0 MA4 MA3 MA2 MA1 MA09 TMUS1 GND BPNC GND BPNC GND

10 BPNC TMUS2 GND SCLK1+ GND SCLK0+11 BPNC TMUS3 GND SCLK1- GND SCLK0-12 TMUS5 TMUS4 GND GND GND GND13 TMUS11 TMUS10 TMUS9 TMUS8 TMUS7 TMUS614 TMUS17 TMUS16 TMUS15 TMUS14 TMUS13 TMUS1215 TMUS23 TMUS22 TMUS21 TMUS20 TMUS19 TMUS1816 TMUS29 TMUS28 TMUS27 TMUS26 TMUS25 TMUS2417 RD1 RCLK1+ RD0 RC1 RCLK0+ RC018 RD3 RCLK1- RD2 RC3 RCLK0- RC219 GND FP2_RX+ FP2_TX+ GND RB+ RA+20 GND FP2_RX- FP2_TX- GND RB- RA-21 GND FP4_RX+ FP4_TX+ GND FP3_RX+ FP3_TX+22 GND FP4_RX- FP4_TX- GND FP3_RX- FP3_TX-23 GND FP6_RX+ FP6_TX+ GND FP5_RX+ FP5_TX+24 GND FP6_RX- FP6_TX- GND FP5_RX- FP5_TX-

Table 5-1 Class 1 Data Connector J1 Pin Assignment (module rear view)23

Note 1: Common Signals (section 4.2.1) are indicated by an underline.4

Note 2: BPNC = This signal is reserved for special purpose and shall not be 5connected on the backplane.6


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1

J2 f e d c b a1 TMUS TMUS TMUS TMUS TMUS TMUS2 TMUS TMUS TMUS TMUS TMUS TMUS3 TMUS TMUS TMUS TMUS TMUS TMUS4 TMUS TMUS TMUS TMUS TMUS TMUS5 TMUS TMUS TMUS TMUS TMUS TMUS6 TMUS TMUS TMUS TMUS TMUS TMUS7 TMUS TMUS TMUS TMUS TMUS TMUS8 TMUS TMUS TMUS TMUS TMUS TMUS9 TMUS TMUS TMUS TMUS TMUS TMUS

10 TMUS TMUS TMUS TMUS TMUS TMUS11 TMUS TMUS TMUS TMUS TMUS TMUS12 TMUS TMUS TMUS TMUS TMUS TMUS13 TMUS TMUS TMUS TMUS TMUS TMUS14 TMUS TMUS TMUS TMUS TMUS TMUS15 TMUS TMUS TMUS TMUS TMUS TMUS16 TMUS TMUS TMUS TMUS TMUS TMUS17 TMUS TMUS TMUS TMUS TMUS TMUS18 TMUS TMUS TMUS TMUS TMUS TMUS19 TMUS TMUS TMUS TMUS TMUS TMUS20 TMUS TMUS TMUS TMUS TMUS TMUS21 TMUS TMUS TMUS TMUS TMUS TMUS22 TMUS TMUS TMUS TMUS TMUS TMUS23 TMUS TMUS TMUS TMUS TMUS TMUS24 TMUS TMUS TMUS TMUS TMUS TMUS

Table 5-2 Class 1 Optional Data Connector J2 Pin Assignment (module rear 2view)3


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Class 2 modules shall be equipped with a data connector J1 specified in chapter 25.1.1, Table 5-1.3


Class 2 modules can be plugged into a backplane with class 2 TM slots. This 5configuration supports up to 15 fabric ports.6

Class 2 modules can be plugged into a backplane with class 1 TM slots without 7optional data connector J2. This configuration supports up to 7 fabric ports.8

J2 f e d c b a1 GND FP8_RX+ FP8_TX+ GND FP7_RX+ FP7_TX+2 GND FP8_RX- FP8_TX- GND FP7_RX- FP7_TX-3 GND FP10_RX+ FP10_TX+ GND FP9_RX+ FP9_TX+4 GND FP10_RX- FP10_TX- GND FP9_RX- FP9_TX-5 GND FP12_RX+ FP12_TX+ GND FP11_RX+ FP11_TX+6 GND FP12_RX- FP12_TX- GND FP11_RX- FP11_TX-7 GND FP14_RX+ FP14_TX+ GND FP13_RX+ FP13_TX+8 GND FP14_RX- FP14_TX- GND FP13_RX- FP13_TX-9 TMUS TMUS TMUS TMUS TMUS TMUS

10 TMUS TMUS TMUS TMUS TMUS TMUS11 TMUS TMUS TMUS TMUS TMUS TMUS12 TMUS TMUS TMUS TMUS TMUS TMUS13 TMUS TMUS TMUS TMUS TMUS TMUS14 TMUS TMUS TMUS TMUS TMUS TMUS15 TMUS TMUS TMUS TMUS TMUS TMUS16 TMUS TMUS TMUS TMUS TMUS TMUS17 TMUS TMUS TMUS TMUS TMUS TMUS18 TMUS TMUS TMUS TMUS TMUS TMUS19 TMUS TMUS TMUS TMUS TMUS TMUS20 TMUS TMUS TMUS TMUS TMUS TMUS21 TMUS TMUS TMUS TMUS TMUS TMUS22 TMUS TMUS TMUS TMUS TMUS TMUS23 TMUS TMUS TMUS TMUS TMUS TMUS24 TMUS TMUS TMUS TMUS TMUS TMUS

9

Table 5-3 Data Connector J2 Class 2 Pin Assignment (module rear view)10


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Class 3 modules shall be equipped with a data connector J1 specified in chapter 25.1.1, Table 5-1.3


Class 3 modules can be plugged into a backplane with class 3 TM slots. This 5configuration supports up to 31 fabric ports.6

Class 3 modules can be plugged into a backplane with class 1 TM slots without 7optional data connector J2. This configuration supports up to 7 fabric ports.8

J2 f e d c b a1 GND FP8_RX+ FP8_TX+ GND FP7_RX+ FP7_TX+2 GND FP8_RX- FP8_TX- GND FP7_RX- FP7_TX-3 GND FP10_RX+ FP10_TX+ GND FP9_RX+ FP9_TX+4 GND FP10_RX- FP10_TX- GND FP9_RX- FP9_TX-5 GND FP12_RX+ FP12_TX+ GND FP11_RX+ FP11_TX+6 GND FP12_RX- FP12_TX- GND FP11_RX- FP11_TX-7 GND FP14_RX+ FP14_TX+ GND FP13_RX+ FP13_TX+8 GND FP14_RX- FP14_TX- GND FP13_RX- FP13_TX-9 GND FP16_RX+ FP16_TX+ GND FP15_RX+ FP15_TX+

10 GND FP16_RX- FP16_TX- GND FP15_RX- FP15_TX-11 GND FP18_RX+ FP18_TX+ GND FP17_RX+ FP17_TX+12 GND FP18_RX- FP18_TX- GND FP17_RX- FP17_TX-13 GND FP20_RX+ FP20_TX+ GND FP19_RX+ FP19_TX+14 GND FP20_RX- FP20_TX- GND FP19_RX- FP19_TX-15 GND FP22_RX+ FP22_TX+ GND FP21_RX+ FP21_TX+16 GND FP22_RX- FP22_TX- GND FP21_RX- FP21_TX-17 GND FP24_RX+ FP24_TX+ GND FP23_RX+ FP23_TX+18 GND FP24_RX- FP24_TX- GND FP23_RX- FP23_TX-19 GND FP26_RX+ FP26_TX+ GND FP25_RX+ FP25_TX+20 GND FP26_RX- FP26_TX- GND FP25_RX- FP25_TX-21 GND FP28_RX+ FP28_TX+ GND FP27_RX+ FP27_TX+22 GND FP28_RX- FP28_TX- GND FP27_RX- FP27_TX-23 GND FP30_RX+ FP30_TX+ GND FP29_RX+ FP29_TX+24 GND FP30_RX- FP30_TX- GND FP29_RX- FP29_TX-

9

Table 5-4 Data Connector J2 Class 3 Pin Assignment (module rear view)10


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5.2 Power Connector1

The TM shall be equipped with a power connector P1 (OBSAI Sequenced) specified 2in Table 5-5.3

4

P1 Signal1 PWR_POS2 PWR_ENA3 PWR_NEG4 GND

Table 5-5 TM Power Connector P1 Pin Assignment5

For additional supply current, the TM may optionally be equipped with a second 6power connector P2 (OBSAI Sequenced or OBSAI Non-sequenced) specified in 7Table 5-6.8

9

P2 Signal1 PWR_POS2 PWR_POS1

3 PWR_NEG4 PWR_NEG1

Table 5-6 TM Optional Power Connector P2 Pin Assignment10

Note 1: Pins 2 and 4 can only be used with the OBSAI Non-sequenced connector.11


Issue 1.0 29 (31)

6 Glossary1

6.1 Abbreviations2

For the purposes of the present document, the following abbreviations 3apply:4

ABBREVIATION DESIGNATION

BBM Base Band Module

CCM Clock and Control Module

HC-BBM High Capacity BBM

LVDS Low Voltage Differential Signaling

TM Transport Module

6.2 Definition of Terms5

For the purposes of the present document, the following terms and 6definitions apply:7

Common Signals: Common Signals are common to all modules and 8shall be supported. Common Signals are assigned to fixed pin positions 9at the Data Connector(s) which are present at all modules.10

Module Type Specific Signals: Module Type Specific Signals are 11specific to a certain module type (TM, CCM, BBM, RFM) and shall be 12supported. Module Type specific Signals shall be assigned to fixed pin 13positions at the Data Connector(s).14

Module Type Unspecified Signals: Module Type Unspecified Signals 15are optional. Their functional and electrical characteristics are not 16specified. If present, Module Type Unspecified Signals shall be 17assigned to a range of pin positions at the Data Connector(s). The 18range of pin positions shall be fixed for a certain module type, but may 19differ between module types.20


Issue 1.0 30 (31)

Signal Group: A group of signals forming a functional entity e.g. a 1fabric port.2

Module Class: A module class describes the compatibility of a module 3type.4

5

6

7


Issue 1.0 31 (31)

7 References1

7.1 OBSAI2

[OBSAI System] OBSAI System Reference Document V1.03

[OBSAI RP1] OBSAI Reference Point 1 Specification V1.04

[OBSAI RP2] OBSAI Reference Point 2 Specification V1.05

6

7

7.2 IEEE8

[IEEE 802.3] IEEE Std, 802.3, Local and Metropolitan Area 9Networks, 2002.10

7.3 ANSI11

[ANSI1] ANSI/TIA/EIA-644-A, Electrical Characteristics of 12Low Voltage Differential Signaling (LVDS) Interface 13Circuits14

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