(1/25)UCSD VLSI CAD Laboratory - ISQED10, March. 23, 2010

Toward Effective Utilization of Timing Exceptions in Design Optimization

Toward Effective Utilization of Timing Exceptions in Design Optimization

Kwangok Jeong, Andrew B. Kahng and Seokhyeong Kang

VLSI CAD LABORATORY, UCSD

(2/25)

Outline• Timing exceptions vs. design outcomes• Q1. Do timing exceptions help or hurt?• Q2. Which exceptions give net benefit when inserted?• Q3. When should exceptions be identified and applied?• Guidelines to timing exceptions• Conclusion and ongoing work

(3/25)

Timing Exceptions vs. Design Outcomes• Advantage

• Timing exceptions reduce pessimism in STA• Help ease the task of timing closure step

• Our target• Evaluate the impact of timing exceptions• Give guidelines for designers / EDA vendors

• Adding exceptions doesn’t always lead to better QoR

• Rutime increase with small improvement in TNS

arearuntime

TNS

Testcase: AES cipher

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Q1. Do timing exceptions help or hurt?Q1. Do timing exceptions help or hurt?

Impact of timing exceptions in optimization

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Do Timing Exceptions Help or Hurt?• Help

• Remove over-constraint• Prevent excessive optimization

• Hurt • Add complexity in optimization• Prevent restructuring

A

B

Cin

S

Cout

A

B

Cin

S

Cout

AOI21

AND2

INV

XNOR2 INV

INV

XOR2

AND2

OR3

XOR2XOR2

(A) (B)

• Restructuring of full-adder circuit

(6/25)

Impact of Timing Exceptions in Optimization• Quality of optimization in commercial tools after applying

different types of exceptions

• Test case : 4-bit ripple carry adder• Timing is improved without ‘through’ points• FP and MCP have the same impacts on timing and area

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Experiment with Artificial Circuit

• Applying different number of FPs• Optimization results in 2-stage and 8-stage circuit.

Restructured unit

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Q2. Which exceptions give net benefit Q2. Which exceptions give net benefit when inserted?when inserted?

Critical and effective timing exceptions

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Which exceptions give net benefit when inserted?• Exceptions space according to format and criticality

• Critical / effective exceptions will give benefit• Need to audit exceptions to obtain beneficial timing

exceptions

Timing Slack 0Type of Exceptions

Critical exceptionswith ‘through’ points

Non-critical exceptions

with ‘through’ point

Critical exceptionsw/o ‘through’ points

Non-critical exceptions

w/o ‘through’ point

Ineffective exceptions

Effective exceptions

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Critical Timing Exceptions

• Timing slack is not improved by non-critical exceptions• Critical timing exceptions without “through” (Critical

MCP) effectively reduce the WNS

• WNS after applying top-k% of exceptions (AES cipher)

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• Ineffective exceptions• Many false paths are not effective due to

an interleaved true path • Do not contribute on reducing constraints

and increase the runtime

• Method for filtering out ineffective exceptions• Use for metrics to quantify the effectiveness of timing exceptions

• Path A is ineffective false path because of a true path B

• c : cell, p : path

• s’c (sc) slack of timing point c after (before) defining p as a false path

• nc : number of timing point in p

• sc_end : end point

Effective Timing Exceptions

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Q3. When should exceptions be Q3. When should exceptions be identified and applied?identified and applied?

Design stages to extract and apply timing exceptions

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When should exceptions be identified and applied?• Identify the most beneficial design stages for extraction /

application

• Higher benefit can be obtained when exceptions are1.extracted as late as possible2.applied as early as possible

DC PLACE PLACE-OPT CTS CTS-OPT ROUTE

Extract Apply

Non-feasible for exceptions with “through” points

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Timing correlation between design stages

• Timing between synthesis and placement is not well correlated• After placement, timing correlation is improved

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Design Stages to Extract and Apply TE

• Timing exceptions need to be extracted after placement or placement optimization stages.

• QoR after applying false path exceptions in each stage

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Outline• Timing exceptions vs. design outcomes• Q1. Do timing exceptions help or hurt?• Q2. Which exceptions give net benefit when inserted?• Q3. When should exceptions be identified and applied?• Guidelines to timing exceptions• Conclusion and ongoing work

(17/25)

• Use only clearly effective timing exceptions.

• With ‘through’ points, the optimization quality is not improved, and can even be degraded.

• The declaration form must be as compact as possible.

• Timing exceptions should be extracted after placement.

• Non-effective false paths should be filtered.

Guidelines to Timing Exceptions• Recommended flow for timing

exceptions

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• Impact of timing exceptions - inserting exceptions could be beneficial or harmful

• Critical and effective timing exceptions should be extracted and applied after the placement stage

• Ineffective false paths should be pruned for better QoR.• Ongoing work

• Seek the ways of extracting and auditing consistently• Seek quantified metrics of both user- and automatically-defined

TE• Pursue timing exception methodology for general SOC

implementation

Conclusion and Ongoing Work

(19/25)UCSD VLSI CAD Laboratory - ISQED10, March. 23, 2010

THANK YOU

(20/25)UCSD VLSI CAD Laboratory - ISQED10, March. 23, 2010

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