Timers and Interrupts

Networks and Embedded Systems

Second Grade Level

Wolfgang Neff

Counters

• Counters count events

– Number of events stored in a register

– Each event increments this register

Counter

Register + 1

06-Nov-20 Timers and Interrupts 2

Timers (1)

• Timers count clock ticks

– Primary source is system clock

– Clock speed is reduced by a prescaler

06-Nov-20 Timers and Interrupts 3

Counter

Register + 1

PrescalerfCLKfSYS

System Clock

fSYS: System FrequencyfCLK: Clock Frequencyn: Prescaler Value

𝑓𝐶𝐿𝐾 =𝑓𝑆𝑌𝑆𝑛

• Operating mode

Timers (2)

06-Nov-20 Timers and Interrupts 4

Timer overflow interrupt

BOTTOM

COMPARE(see PWM)

TOP

MAX 7

6

5

4

3

2

1

0

BOT

CNT

TOP

CLKPER

CNT: counter value, PER: period = TOP, CLK: clock ticks

• Operating mode (continued)

– Example: TOP = 5

Timers (3)

06-Nov-20 Timers and Interrupts 5

1 2 3 4 5 6 7 8 9 10 11 12 13 140

1 2 3 4 5 0 1 2 3 4 5 0 1 20

T T

tCLK

1 2 3 4 5 6Clock Ticks

Counter

T: timer period, tCLK: clock period

T = (TOP+1)·tCLK

• Timer Module

Timers (4)

06-Nov-20 Timers and Interrupts 6

Mic

roco

ntr

olle

r

Timer Module

CTRL CNT

DIV TOP

ISR: OVF

CTRL:Control RegisterCNT: Counter ValueDIV: Clock DividerTOP: Top ValueOVF: Overflow

PWM (1)

• Pulse-Width Modulation

06-Nov-20 Timers and Interrupts 7

100%

75%

50%

25%

0%

– Digital pins are either high or low

– Time enables inter-mediate values

– Inertia for averaging necessary

– Alternative: Digital Analog Converter

PWM (2)

• Generation

06-Nov-20 Timers and Interrupts 8

d: Duty Cycleton: On TimeT: Period (PER)

𝑑 =𝑡𝑜𝑛𝑇

=𝐶𝑀𝑃 + 1

𝑃𝐸𝑅 + 1

PWM

ton toff

T

BOT

TOP

CLKPER

CMP

CNT

• Architecture

PWM (3)

06-Nov-20 Timers and Interrupts 9

Pin 0

Pin 1

PWM Channel 0

PWM Channel 1

Pin 2

Pin 4

Microcontroller

DEM

UX

DEM

UX

Timer

CMP0

CMP1

Pin Selection

• PWM Module

PWM (4)

06-Nov-20 Timers and Interrupts 10

Mic

roco

ntr

olle

r

Timer Module

PER

CNT CMP PWM

CTRL

CTRL: Control RegisterCNT: Counter ValuePER: PeriodCMP: Compare Value

Interrupts (1)

• Generated by hardware

• Indicated by an interrupt line

• Occur unpredictably

• Tell that something happened

• Examples

– Port interrupt

– Timer interrupt

– Data ready interrupt

Micro-processor

INT1Device

INT0

06-Nov-20 Timers and Interrupts 11

Interrupts (2)

• Interrupt Processing

– Execution of code is interrupted

– Interrupt service route (ISR) is executed

– Execution of original code is resumed.

Interrupt Service Routine

INT

(by Hardware)

IRET

Programme FlowProgramme Flow

06-Nov-20 Timers and Interrupts 12

Interrupts (3)

• Interrupt Controller

– Handles Interrupts

• Queueing– Which one is served first?

• Nesting– Based on priority levels

– Which interrupt interrupts other interrupts?

• Forwarding– Notifies the CPU of an interrupt request (IRQ)

06-Nov-20 Timers and Interrupts 13

Interrupt Controller

INT0INT1INT2

…

Micro-processor

IRQVector