Thickness Evaluation for 2nm SiO2 Films,a Comparison of Ellipsometric, Capacitance-Voltage and

HRTEM MeasurementsJames Ehrstein1, Curt Richter1, Deane Chandler-Horowitz1, Eric Vogel1,

Donnie Ricks1, Chadwin Young2'3, Steve Spencer2, Shweta Shah2'4,Dennis Maher2'5, Brendan Foran3, Alain Diebold3, and Pui Yee Hung3

1 Semiconductor Electronics Division NIST, Gaithersburg, Maryland, 20899^ Materials Science and Engineering Dept North Carolina State Univ., Raleigh, North Carolina, 27695

3International SEMATECH, Austin, Texas, 787414Motorola, 7700 W. Farmer Lane Austin, TX 78729

5Dept. of Materials Science and Engineering, The Ohio State Univ. Columbus, Ohio, 432 JO

Abstract. We have completed a comparison of SiO2 film thicknesses obtained with the three dominant measurement tech-niques used in the Integrated Circuit industry: ellipsotnetry, capacitance-voltage (C-V) measurements and high resolutiontransmisission electron microscopy (HRTEM). This work is directed at evaluating metrology capability that might supportNIST- traceable Reference Materials for very thin dielectric films. Particular care was taken in the design of the sample set toallow redundancy and enable estimates of oxide layer consistency. Ellipsometry measurements were analyzed using a varietyof models of the film structure, and C-V results were analyzed using three different quantum-mechanical based algorithms toaccount for quantized states in the substrate and depletion effects in the polysilicon capacitor electrode. HRTEM results weresupplemented with Electron Energy-Loss Spectroscopy. A range of thicknesses was found with each of the methods, butwith some overlap of values. HRTEM and STEM values showed less consistency between wafers than the C-V data for thecapacitors used and were seen to be more influenced by local variations such as interface non-uniformities. Sources of varia-tion and estimates of uncertainty for the analyses are presented. Implications of these results for Reference Materials are dis-cussed.Key words: gate dielectrics, silicon dioxide, thin film metrology

INTRODUCTION

As gate dielectric film thicknesses shrink along withother transistor dimensions, process tolerances for filmthickness and the resulting demands on measurementshave become truly challenging, with 3-a process toler-ance already below 0.1 nm and measurement require-ments below 0.01 nm. Ellipsometry continues to be themeasurement of choice for in-line monitoring of filmthickness because it is rapid and highly precise, al-though other measurements may also be needed foradded film information. Film thickness values obtainedfrom ellipsometry depend on an assumed film structuremodel, as well as on the optical index values assumedfor the silicon substrate and the silicon dioxide film.The resulting thicknesses, therefore, are not absolute,although they can be very precise for a fixed set of as-sumptions. It is believed that most companies developa "translation table" to relate ellipsometry-based filmthicknesses in terms of how "thick" they are electri-cally, e.g. as a capacitor dielectric, which is the criticalbecause it indicates electrical circuit performance .

It is highly desirable to be able to verify the perform-ance of ellipsometry tools used for gate dielectric proc-

ess monitoring, such as through the use of ReferenceMaterial(s). Unfortunately, it is difficult to generateReference Materials for very thin films, with thick-nesses traceable to SI units, and also with uncertaintiesfor thickness anywhere close to the requirements statedin the ITRS. The procedure used for full analysis of theconceptually accurate interface-layer model, as usedfor NIST ellipsometry-based oxide thickness StandardReference Materials from 10 nm to 200 nm, resulted inuncertainties of film thickness, ± 0.5 nm, that would beconsidered unacceptable for current needs1.

While SI unit thickness traceability is not truly re-quired for verifying consistency of ellipsometer per-formance or "tool-matching", it is a significant consid-eration for Reference Materials that are used interna-tionally, or where ISO requirements become important.This study utilizes a carefully designed set of 2 nmSiO2 films to determine the relation of film thicknessobtained from several simple ellipsometry models withelectrical thickness and Si-traceable physical thicknessvalues. It also identifies the major uncertainties fromeach type of measurement in this study.

CP683, Characterization and Metrology for VLSI Technology: 2003 International Conference,edited by D. G. Seiler, A. C. Diebold, T. J. Shaffner, R. McDonald, S. Zollner, R. P. Khosla, and E. M. Secula

2003 American Institute of Physics 0-7354-0152-7/03/$20.00331

EXPERIMENTAL OVERVIEW

A set of nine, 150 mm diameter wafers, with thermaloxides, grown at 850 °C for 30 min, was used for thesestudies. These wafers, seven with blanket oxides andtwo others with arrays of poly-gate capacitors, werefrom the center of a furnace stack of 30 wafers. Thepoly-gate capacitors were fabricated in square arrays atfour different sizes in each of the four wafer quadrants.They were arranged so that in each of the four waferquadrants a different one of the capacitor sizes wasproximate to the wafers' central sweet-spot (out to a25 mm radius about wafer center) The capacitors weredesigned to have active areas of (16, 36, 64 and 100)x 10"4 cm2. The oxides were grown and the capacitorsfabricated at NC State University.

All seven blanket-oxide wafers were mapped byellipsometry immediately after oxide growth. Wafer towafer center-spot thickness differences for the blanketwafers was within a range of 0.064 nm. The thick-nesses at the 50 mm radius corresponding to the loca-tion of the capacitors used for TEM analysis were up to0.11 nm. larger than the center spot thicknesses.

These measurements served to set limits on the thick-ness differences that might be expected in this studysimply because not all measurements could be made inthe same region of the same wafers. They did notprovide an estimate of thickness differences resultingfrom the additional thermal cycles and possible poly-silicon/SiO2 interdiffusion during capacitor fabrication.

The wafers were characterized as follows: the blanketwafers were measured at wafer center by single-wavelength ellipsometry (SWE) immediately followinga thermal desorption cycle. The two wafers with ca-pacitors were measured by C-V in the wafer sweetspots to extract thicknesses for comparison with thecenter-point ellipsometry thicknesses of the blanketwafers. Capacitors of the largest size, located at a dis-tance of 45 mm to 50 mm from each wafer's center,were also measured by C-V and one of these capacitorsfrom each wafer was then sectioned and HRTEM andhigh-angle annular dark field (HAADF) STEM thick-nesses were obtained.

ELLIPSOMETRY MEASUREMENT andANALYSIS

It has been appreciated for some time that surfacecontamination will accumulate on the surfaces of wa-fers with time and, if not removed before ellipsometrymeasurements, will cause an inaccurate value of a layerthickness to be determined because ellipsometry isgenerally not capable of separately determining thethicknesses of the contamination layer and the film

being investigated. For this study, we chose to removethe contamination by thermal desorption, 300 °C for5 min on a hot plate, followed by 90 s cooling on amassive copper heat sink, immediately prior to meas-urement. Ellipsometric measurements were taken at5 min intervals for one hour; SWE was chosen so thateach measurement was fast enough to be considered asnapshot, and did not average over a period of con-tamination redeposition. After analysis by each of sev-eral models, the resulting thicknesses were fitted to astraight line vs. time following removal from the hotplate, and extrapolated to time equals zero to estimatethe oxide thickness before any recontamination started.

Three basic models were used to analyze the ellip-sometry measurements. The first, known to be overlysimple, was used because it was expected to give thehighest precision and thus serve as a base-line. Themodel treated the entire SiO2 film as having a knownand constant index of refraction, n, of 1.461, as usedfor the stoichiometric part of the oxide of previousNIST SRMs for SiO2 (1). The second model assumed atransition, or interlayer, between the silicon substrateand the SiO2. The interlayer, is a suboxide of siliconthat contains the bridging bonding arrangements be-tween the crystalline silicon substrate and thestoichiometric amorphous SiO2

2. This model was em-ployed for analysis of the previous NIST SiO2 SRMswhich were thick enough to allow an estimate to bemade of the interlayer parameters. Because the inter-layer parameters cannot be determined directly fromthe very thin oxides in this study, the values for theprevious SRMs: thickness = 0.7 nm and refractive in-dex, n = 2.8, were used here, as were a number of other

1.795

1-785 _

1-775

* 1.765

1.755

t = 0 thickness of SiO2 layer: 1.761 nmTotal Film Thickness with Interlayer: 2.461nm

. f i . , I10 20 30 40 50 60Minutes Since Removal from Hot Plate

70

FIGURE 1. SWE results: Interface layer model -with a O.Tnm, index = 2.8 interlayer.

combinations with slightly higher and lower thicknessand index values. The third model considered the SiO2

index to be constant, but with a value higher than 1.461to account for the added optical path length arisingfrom the higher index interlayer3. This model was im-plemented in two ways: 1) allowing the analysis soft-ware to find an individual best-fit thickness-index pairfor each of the measurements during the one-hour

332

I

2.25

2.24

2.23

2.22

2.21

t = 0 Film Thickness: 2.227nm(Index varies from 2.460 to 2.485)

2.265

10 20 30 40 50 60Minutes Since Removal from Hot Plate

70

FIGURE 2. SWE results: Single layer model -fit on thickness and index at each point.

period, 2) searching for a single index value, compara-ble to the point-by-point values, that provided low re-sidual fitting errors simultaneously for all measure-ments on a given wafer. While all procedures but theone that fitted the thickness and index separately ateach point (Fig. 2) showed a smooth linear trend forfilm regrowth, as expected, the goodness of fit parame-ter reported by the fitting algorithms were not alwayssatisfactory. Table 1 summarizes the assessment ofresults from each of the models used for fitting the el-lipsometry data.

CAPACITANCE-VOLTAGE

The C-V measurements were taken at 100 kHz, thehighest frequency that did not show roll-off in accumu-lation due to series resistance. The measurements were

1

2.255 -

2.245

£ 2.235

2.225

t = 0 Film Thickness: 2.23 InmI I , . I

0 10 20 30 40 50 60Minutes Since Removal from Hot Plate

70

FIGURE 3. SWE results: Single layer model -index fixed at 2.49 - near the pt. by pt. average.

taken in steps of 0.05 V from -2.6 V to 2.6 V on 9 ca-pacitors of each size from the sweet spots of both wa-fers, and also on 9 of the extra large capacitors at adistance of about 50 mm from the centers of the 2 wa-fers. For each of the capacitor sizes, the capacitancevalues, in accumulation, of the 2 wafers were wellwithin 1 % of each other; slightly larger differenceswere found in depletion due to substrate resistivity dif-ferences. For the largest size, (XL), capacitors at the 50mm radius used for TEM measurements, the two wa-fers had equivalent (within 1%), accumulation capaci-tance values, but for both wafers the capacitance at50 mm was about 2.5 % less than at 25 mm suggestingslightly thicker oxide at 50 mm.

TABLE 1. A summary of the results from Single Wavelength Ellipsometry Analyses.

Model

Single Stoichiometric SiO2 Layer:SiO2 Index = 1 .461Single SiO2 Layer: Point-by-pointfit on Index & Thickness

Single SiO2 Layer; Set SiO2Index at 2.49 (pt. by pt. average)

O.Tnm, n = 2.8 Interface Layerunder Stoichiometric SiO2O.Tnm, n = 3.2 Interface Layerunder Stoichiometric SiO2

7 wafer Total Film ThicknessAvg.* & Std. Dev.

2.409nm± 0.012nm

2.234nm ± 0.037nm

2.21 Inm ± 0.032nm

2.472nm± 0.012nm

2.659nm± 0.017nm

Goodness of Fit to Dataand Comments

Very Poor-Clearly an inappropriate modelExcellent, but erratic time trendto thickness values for each waferVery GoodSome wafer to wafer variability inaverage index valuesPoor**Conceptually correct modelPoor**

*A change of assumed angle of incidence of 0.004 deg. (our uncertainty limit) causes thickness changes < 0.004nm;a change of silicon substrate refractive index within range of published values causes thickness change < 0.005nm

** Only use of an angle of incidence well outside the uncertainty limit gave good values for the "goodness of fit" todata with any reasonable variant of the interlayer model

The nine-capacitor average capacitance vs. voltagewas calculated at each size for each of the wafers; theaverages were calculated separately for the XL capaci-tors at 25 mm and 50 mm radius. Capacitor areas wereobtained for all sizes by using both photographic blow-ups, and a microscope filar eyepiece. To eliminate theeffect of field oxide overlap capacitance, a linear re-gression was done of average capacitance vs. area foreach wafer's sweet spot capacitors. This was doneseparately at each bias voltage used for C-V measure-ment; correlation coefficients from the regressions ex-ceeded 0.999 for all voltages. The result of the regres-sions vs. bias voltage was a reconstructed capaci-tance/unit area C-V curve applicable to the sweet spotcapacitors of each wafer, and a capacitance, C0 (V), atzero area, attributed to overlap capacitance. The C0 (V)values were subtracted from the capacitance values ateach voltage for the XL capacitors at 50 mm radius.

Oxide layer thicknesses were extracted from the C-Vdata by using three different quantum mechanical(QM) simulators which account for quantized states inthe substrate and depletion in the poly-silicon elec-trode4' 5' 6. Results are summarized in Table 2. Differ-ences in thickness among the QM simulators are ex-pected from previous work7.

5nm N-lll-2 2.2 nm gateFIGURE 4. HRTEM image of a capacitor section on waferN-III-2. Thin lines show the electronically generated meas-urement box used to determine the value of the oxide thick-ness (central band in photograph)

FIGURE 5. Two HAADF-STEM traces from capacitorsection used for HRTEM images on wafer N-III-2. The twoseparate scan traces differed by 0.1 nm in thickness.

Table 2. A summary of the results from C-V analysis by three Quantum-Mechanical Algorithms: Calculated thickness and uncer-tainty due to two different procedures for capacitor area.

"^-^^WaferAlgorithm""""^

IBM Tqm_v6

NIST C-V

NCSU-CVC

Sweet SpotEllip some try Region

N-III-1

2.165 ±0.079 nm2.140 ±0.078 nm2.376 ±0.087 nm

N-III-2

2.169 ±0.081 nm2.140 ±0.078 nm2.379 ±0.086 nm

2 waferaverage

2.167 ±0.080 nm2.140 ±0.078 nm2.377 ±0.087 nm

50 mm RadiusHRTEM/STEM area

N-III-1

2.188 ±0.115 nm2.162 ±0.113 nm2.401 ±0.126 nm

N-III-2

2.191 ±0.112 nm2.162 ±0.113 nm2.404 ±0.124 nm

2 waferaverage

2.190 ±0.114 nm2.162 ±0.113 nm2.403 ±0.125 nm

HRTEM and HAADF STEM

One extra large capacitor at approximately 50 mmradius was sectioned from each wafer with final thin-ning performed using 3.5 kV Ar+. The sections werecharacterized in an FBI Co. TECNAI™ F30 TEM atInternational SEMATECH (ISMT). The samples werealigned with the electron beam parallel to z = [110]direction of the substrate silicon. HRTEM andHAADF-STEM results were obtained from each of thewafers with results exemplified in Figs. 4 and 5 and

summarized in Table 3. There was a wafer to waferthickness difference found with both of the TEMmethods, and also a method to method difference foundfor both wafers. The wafer to wafer difference is notseen in the C-V results for capacitors from the sameregions as the TEM data. The TEM differences arebelieved to be due to the effects of interface roughnesson the localized sampling of the TEM measurements.

334

TABLE 3. A summary of HRTEM and HAADF-STEMthickness results: Measured vale and estimated absolute-uncertainty.

2,75 r

Wafer N-III-1

Wafer N-ffl-2

HRTEM

2.4 nm ± 0.2 nm

2.2 nm ± 0.2 nm

HAADF-STEM

2.5 nm± 0.15 nm

2.3 nm± 0.15nm

COMPARISON of MEASUREMENTSand DISCUSSION

The results from the three types of measurements inthis study are summarized in Figs. 6 and 7 which groupthe results according to the region of the wafers usedfor the measurements. The measurement uncertaintiesshown are not comprehensive, but represent the majorcontributions for each of the methods in this study.

2.75

2.60|i|2,45

2.15

2.00

mm

FIGURE 6. Thickness values and uncertainties from TEMand C-V measurements on two wafers.

They represent different considerations for the threetypes of measurements and are based, at least in part,on the amount, and kind, of replicate measurements forthe three techniques.

The original wafer screening by ellipsometry indi-cated wafer to wafer oxide thickness differences shouldbe less than 0.035 nm for all wafers in this study; theC-V results for the 2 capacitor wafers are even tighter,although that tightness is masked somewhat by as-sumptions made dealing with the capacitor area datafrom the two procedures used. On-wafer radial nonuni-formity between wafer center and the region used forHRTEM was expected to be less than 0.11 nm from theellipsometry screening of all blanket oxide wafers, andno more than 0.05 nm different from the sweet-spotarea ( ~ 25 mm radius) by capacitor measurement.

§2,60 ~

|2.45 -8»

52.30 '

ins -

................................................................................... Ellipsometry ............J 1

_^___^_^__^_t__| |1 ^ '''•''•

""""" T ———— —— y-— i^—— 1 |1 4 * -I I \

^«* A<^/*V'

FIGURE 7. Thicknesses within wafer sweet Spots:Averages and standard deviations as follows -C-V (2 wafers); SWE (7 wafers).

For the ellipsometry measurements, the error bars foreach of the models evaluated represent the 7 waferstandard deviations of the time = 0 thickness values;additional uncertainty due to angle of incidence andother instrumental effects adds an estimated± 0.007 nm. Ellipsometry results yield a range of val-ues with simple models that are within the uncertaintiesof both C-V and TEM results. All models except the"point-by-point fit of index" give a smooth linear de-scription of wafer recontamination with time; however,only the use of an effective fixed index of refractionvalue near the "point-by-point" average gave both asmooth linear description and a very good fit to themeasured ellipsometry parameters, A and T. All themodels used, even the interlayer model, are simplifica-tions of the real film structure. As film thickness be-comes very small, the ability to fit the measurementdata well is highly dependent on using the correctmodel or else finding an optimal simplification such asthe effective fixed index in Fig. 3.

For the C-V measurements, the largest internal un-certainty is due to the difference in capacitor areameasurements resulting from the photo and filar eye-piece methods used; the availability of a CD SEMwould have improved dimensional accuracy. Variabil-ity of results among the capacitors of a given size wasmuch smaller than the uncertainty due to absolute area.The dominant overall factor in the C-V analyses is theeffect of the QM correction algorithm used, see Fig. 6.It is not yet known which of the available QM simula-tors is the closest to being accurate.

The uncertainty error bars shown for HRTEM andHAADF-STEM, Fig. 6. are estimates of absolute un-certainty for the basic measurements. The use of aTEM with a spherical aberration correction would havereduced the uncertainty for the HRTEM measurements.

335

An extended discussion of HRTEM and STEM analy-sis of thin dielectric films is not possible here; thereader is referred to reference 8.

The spread in ellipsometry and C-V thickness valuesare principally dependent on models used to analyzethe data, with only minor dependence on sample uni-formity concerns. The spread in TEM results is domi-nated by sample layer interface nonuniformity that isnot the same for both wafers in the regions sampled bythe TEM foils. The core uncertainties of the TEM re-sults relative to absolute thickness values, 0.2 nm forHRTEM and 0.15 nm for HAADF-STEM, listed inTable 3 are the principal limit to obtaining SI lengthunit traceability for thickness values even if sampleuniformity and interface abruptness problems areeliminated.

CONCLUSIONS

The sample set design was found to be an effectiveway to provide information on material nonuniformityconcerns related to the fact that it is not possible toperform all 3 measurements on the same wafer spot.However, comparison of thickness measuring tech-niques requiring both blanket and capped-oxide wafersrequires still better wafer-to-wafer and on-wafer radialuniformity of thickness, and particularly, less interfaceroughness.

The results obtained indicate that it should be possi-ble to select an effective ellipsometry analysis modelfor developing Reference Materials in good agreementwith "centerline" TEM and/or electrical thicknessscales. This would be subject to improving sample uni-formity to enable tightening of TEM results and assistresolution of the best QM algorithm for analysis ofC-V measurements.However, it does not yet appear possible to develop

thin oxide film reference materials with uncertainties inthe sub 0.01 nm range, i.e. consonant with ITRS toolprecision requirements, when accuracy considerations(traceability to the SI unit for length) are factored in.The principle limitation in this case is the core uncer-tainty of TEM thickness values as shown in Table 3.

doresment by NIST nor does it imply that the equip-ment is necessarily the best available for the purpose.

REFERENCES

1. G.A. Candela, D. Chandler-Horowitz, J.Marchiando, et al., Preparation and Certification ofSRM-2530, Ellipsometric Parameters A and Y andderived thickness and index of a silicon-dioxide layeron silicon, NIST SP 260-109, 19882. E. Taft and L. Cordes, Optical evidence for a sili-con-silicon oxide interlayer, J. Electrochem Soc. 126(l),pp. 131-134, 19793. Y. Wang and E.A. Irene, Consistent refractive indexparameters for ultrathin SiO2 films. J. Vac. Sci Tech-nol. B, 18 (1), pp. 279-282, 20004. J.R. Hauser and K. Ahmed Characterization ofultra-thin oxides using electrical C-V and I-V meas-urements, Characterization and Metrology for ULSITechnology, Seiler, et al., eds. AIP, Woodbury NY, pp.235-239, 19985. S.H. Lo, D.A.Buchanan, and Y. Taur, Modeling andcharacterization of quantization, polysilicon depletionand direct tunneling effects in MOSFETs with ultrathinoxides, IBM J. Res. and Develop., 42, pp. 327-337,19996. E.M. Vogel, C.A. Richter and B. Rennex, A capaci-tance-voltage model for polysilicon-gated MOS de-vices including substrate quantization effects based onmodification of the total semiconductor charge, submit-ted to Solid State Electronics7. C.A. Richter, A.R. Heftier and E.M. Vogel, A com-parison of quantum mechanical capacitance-voltagesimulators, IEEE Electron Devices, 22, (1), pp. 35-37,20018. A.C. Diebold, B. Foran, C. Kisielowski, D. Muller,S. Pennycook, E. Principe, S. Stemmer, submitted toMicroscopy and Microanalysis

ACKNOWLEDGEMENTS

This work was supported by ISMT under contractFEPZ001, and by the NIST Office of MicroelectronicPrograms. It is a contribution of the National Instituteof Standards and Technology; not subject to copyright.

* Certain commercial products are identified here toadequately specify the experimental procedure. Suchidentification does not imply recommendation or en-

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