the transport of data center flows (daq: deadline aware queue) · expediting the transport of data...
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Expediting the transport of Data Center Flows(DAQ: Deadline‐Aware Queue)
Roberto Rojas‐CessaNetworking Research Laboratory
ECE Dept.New Jersey Institute of Technology
Newark, NJ [email protected]
Research Day ‐ CWCSPR
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Examples of DC topologies
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BCubeFat‐Tree
VL2 FiCoon
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What is unique in Data Center Traffic? Partition‐Aggregate Model
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Simplification of traffic load.
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Data Aggregation
Research Day ‐ CWCSPR
Flows may be associated with response deadlines
Deadlines are inherited by partial processes
For all flows, short Flow Completion times (FCTs)are desirable
For deadline‐sensitive flows, short Application Throughput is desirable.
Data aggregation Connection‐Oriented Transport Transmission Control Protocol (TCP)
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Expected requirements of a Data Center (DC) Transport Protocol
Maximize the number of flows completing transmission before deadlinesGuarantee a high throughput for long flows.Allow high, if not 100%, link utilization.Achieve lossless transmissions.Minimize the amount of state information at switches
Research Day ‐ CWCSPR
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Why TCP is not good enough?
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Incast Throughput Collapse: Retransmission Time Offs + Retransmission choke bandwidth
Flow control mechanisms are not transmission speed aware Long FCTs!
• Data Center Flows: Long + Short Flows
• Congestion• Multiple flows concur at aggregation switches
• Lack of a centralized scheduler
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Existing Solutions
• Earlier Congestion Notification (ECN): DCTCP • Rate Control: D2TCP, D3, PDQ (deadline aware)
• Congestion Control: RCP• Pacing Schemes: HULL• Load Balancing Schemes: DeTail, CONGA, RepFlow
• Switch Modification: DAQ
Research Day ‐ CWCSPR
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Deadline‐Applicable Schemes
• RCP [Dukkipati05] assigns rate according to available bandwidth. Parameters must be tuned.
• DCTCP [Alizadeh10]: ECN + congestion window modification. Agnostic to deadlines.
• D3 [Wilson11] reserves transmission rates FCFS. • PDQ [Hong12]: selects flows earliest deadline first (EDF) and the shortest job first (SJF). High complexity.
Research Day ‐ CWCSPR
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Proposed Scheme: Deadline Aware Queue (DAQ) at DC Switches
• Objectives:– Maximize application throughput – Ensure minimum bandwidth for long flows– Minimize flow‐state information at switches– Minimize modification to layered protocols
Research Day ‐ CWCSPR
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Switch Architecture
Research Day ‐ CWCSPR
Use Three Queues: Urgent, Non‐urgent, LongShort flows: Urgent or Non‐urgentLong flows: long‐flow queue + service weighted scheduling
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Test setup
• Loss‐less flow control between– Senders and switch– Switch and receiver (aggregator)
• Large congestion window size instead of slow start
Research Day ‐ CWCSPR
Comparison: RCP and D3
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Impact of Urgent Threshold Value
Flow size: 30KB, rate: 3600 flows/s Number of long flows: 5
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Application throughput: No. on‐time flows/All arrived flows
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Supported number of senders
Number of concurrent senders for achieving 99% application throughput with flow size mean of 10 Kbytes and deadlines [20, 40] ms.
Research Day ‐ CWCSPR
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Application and Average Throughput
Short flow size: 15 Kbyte, long flow size: 100Mbyte (2). Short flow load: 0.3 %No. of senders: [5, 40]
Short flows Long flows
Research Day ‐ CWCSPR
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Performance under short and long flows
Short flow size: 15KBResearch Day ‐ CWCSPR
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Conclusions
• Deadline‐oriented approach with small modification to transport layer.
• Urgent flows receive preferential service. • Few urgent flows speedup transmission. • DAQ achieves high Application Throughput• Long flows receive minimum throughput through Weighted Round‐Robin
Research Day ‐ CWCSPR