the readout electronics for upgrading of besiii end-captof chunyan yin university of science and...

The Readout Electronics for Upgrading of BESIII End-capTOF

Chunyan YinChunyan Yin

University of Science and Technology of ChinaUniversity of Science and Technology of China.

Key Laboratory of Technologies of Particle Detection ＆ Electronics, CAS

Outline

BESIII and Time-of-Flight Readout System End-cap TOF(ETOF) Upgrade BESIII ETOF Readout Electronics for Upgrading Electronics test of TDIG module

2011/04/1 2


BESIII and Time-of-Flight Readout System

BESIII is a new detector which aims mainly to measure and identify a substantial fraction of the particles(PID) produced in electron positron collisions.

The TOF detector is the major system for PID in the BES III

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Fig.1. BESIII cutaway diagram

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In a BESIII TOF detector, a total of 448 PMTs have been installed in barrel and end-cap sections.

448 channels’ readout system is mainly housed in two VME64xP crates

The whole TOF readout system has been installed in the spectrometer and met the requirement of the physics experiments.

The system accomplished to measure the arrival time of PMT signals from the TOF detector and achieved a timing resolution of 25 ps.


Fig.3. TOF readout system crate(VME64xP) crate with all modules installed

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Fig.2 Block diagram of BESIII TOF readout system



Publication:• Shubin Liu, Changqing Feng, et al. BES III Time-of-Flight readout system. IEEE

TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 57, NO. 2, APRIL 2010: 419-427;• Changqing Feng, Shubin Liu , et al. Electronics of BESIII TOF Monitor System. IEEE

TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 57, NO. 2, APRIL 2010:463-466;• Hao Li, Shubin Liu, et al. TOF Clock System for BES III. IEEE TRANSACTIONS ON

NUCLEAR SCIENCE, VOL. 57, NO. 2, APRIL 2010: 442-445;• F.A. Harris, J.W. Kennedy, et al. BES3 time-of-flight monitoring system. Nucl. Instr.

and Meth. A 48477(2008);

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BESIII ETOF Upgrade

Target: Intrinsic time resolution < 50 ps, total time resolution < 80 ps, corresponding to a K/pi separation capability up to >1.4 GeV (95%C.L.).

Intrinsic(Pi/K): • 90ps -> 50ps

Total(Pi/K):• 138ps -> 80ps• PID of Pi/K @ 2ơ: 1.1GeV/c -> 1.4 GeV/c

Multigap Resistive Plate Chamber(MRPC) technology, is proposed to be the detector

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Multi-gap Resistive Plane Chamber MRPC is major new detector

technology, which is a stack of resistive glass plates with a series of uniform gas gaps.

Thin gap -> fast signal and good time resolution

Multi gaps -> increase the signal and efficiency

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Fig.4 The structure of MRPC

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Layout of End-cap MRPC

In the end-cap section, the double layers of MRPC are designed.

End-cap section will be composed of 72 MRPC modules

36 modules are located at top, the others are at bottom.

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Fig.5 Layout of End-cap MRPC

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BESIII ETOF Readout Electronics for Upgrading

CTTP

18 FEAs in one section at east End

TDI G

432 input signals to

TDIG


TDIG

432 input signals to TDIG


TDIG

3 fibers to TOF-Trigger


VME Crate

VME Crate72 OR

signals to CTTP

72 OR signals to CTTP


72 OR signals to CTTPCTTP

18 FEAs in one section at west End

FEA(4 NINO)

FEA(4 NINO)

FEA(4 NINO)

FEA(4 NINO)



TDI G

TDI G TDI G

FEE(4 NINO)

FEE(4 NINO)

FEE(4 NINO)

FEE(4 NINO)

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The readout electronics system contains several modules: FEE(Front-End Electronics)

module(IHEP): Amplifies and discriminates the MRPC signal using NINO

TDIG(Time-digital)module (USTC): Receives and digitalizes the signal from FEE by 9 HPTDC chips with the resolution of less than 20 ps

CTTP(Coincidence-threshold-test-power) module(USTC): Provides power, test signal and etc.to FEE module.

Clock Master module

Fig.6 Block diagram of Time-of-Flight readout system

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BESIII ETOF Readout Electronics for Upgrading

Each MRPC module includes 24 detector channels;FEE module:24 channels;TDIG module:72 channels

The TOF electronics should process 1728 (24*72 )channels signal

The readout electronics system includes:

• 72 FEE modules will be located inside of the spectrometer

• 24 TDIG modules and 2 CTTP modules are essential and are located outside of the spectrometer

• 2 VME crates are required for east and west ETOF, each crate contains12 TDIG modules+ 1 CTTP module + 1 Clock module

Fig.6 Block diagram of Time-of-Flight readout system

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CTTP


TDI G


TDIG


TDIG

432 input signals to TDIG


TDIG



VME Crate

VME Crate72 OR

signals to CTTP



72 OR signals to CTTPCTTP


FEA(4 NINO)

FEA(4 NINO)

FEA(4 NINO)

FEA(4 NINO)



TDI G

TDI G TDI G

FEE(4 NINO)

FEE(4 NINO)

FEE(4 NINO)

FEE(4 NINO)


TDIG module

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HPTDC 2#(Sl ave HPTDC, i n Very Hi gh Res.

Mode, Chn8#~Chn15#) FPGA

HPTDC Confi g Chai n

Token Ring

HPTDC DATA

VME Driver

Data

TDI G VME64xP 9U

HPTDC 1#(Master HPTDC, i n

Very Hi gh Res. Mode, Chn0#~Chn7#)

HPTDC 9#(Sl ave HPTDC, i n Very Hi gh Res.

Mode, Chn64#~Chn71#)

CPLD(Bus

I nterface/FPGA

Confi gurati on)

Buff er RAM

CTRL, ADD

64-bi t VME

24 LVDS Chn

24 LVDS Chn

24 LVDS Chn

Each TDIG module receives and digitalizes the signals from FEE using 9 HPTDC chips

HPTDC runs in very high resolution mode and achieves time measurement with the resolution of less than 20 ps

Each TDIG: Corresponding to 3 MRPC modules and importing 72 channels

Based on VME Bus FPGA packs and transmits the

data to a DAQ system via CPLD and VME bus

CPLD configures the FPGA on-line and is the interface between VME bus and TDIG module

Fig.7 Block diagram of TDIG module

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Status of TDIG module Design

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Fig.8 TDIG module

The design of TDIG module have been accomplished

Major chips run well and meet the demand

The resolution of TDIG module has been tested and meets the requirement basically

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Electronics test of TDIG module

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Using “cable delay test” to test the timing resolution of the TDIG module

The histogram chart obtained for the time measurement of one channel is shown in Fig. 9.

Fig.9 Cable delay test for readout system resolution

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RMS=15.9715ps


Summary

MRPC technology meets the demand of the BESIII ETOF upgrading

ETOF Readout Electronics system is designed The whole electronics system will be installed and tested

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Thanks!

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the readout electronics for upgrading of besiii end-captof chunyan yin university of science and...

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