The NA-61 Vertex Detector – Electronics and readoutMIMOSA-26 and its readout

M. Deveaux, Goethe University Frankfurt

Who am I ?

M. Deveaux, NA-61 Collaboration Meeting, May 2013 2

Name:

Dr. Michael DeveauxGoethe University Frankfurt

Scientific interests:

• CBM – MVD and Open Charm Physics• CMOS Monolithic Active Pixel Sensors

… the NA61-MVD

2002-2007 with Marc Winter, IPHCSince 2007 with Prof. Joachim StrothSince 2012 HIC for FAIR -

Junior group leader

What is the topic ?

M. Deveaux, NA-61 Collaboration Meeting, May 2013 3

What are the properties of the MIMOSA-26 sensors?Is MIMOSA-26 suited to measure open charm with NA-61?

Open charm physics – NA61 vs. CBM

M. Deveaux 4

[W. Cassing, E. Bratkovskaya, A. Sibirtsev, Nucl. Phys. A 691 (2001) 745]

SIS18

SIS100SIS300

SPS

CBM ~ 10-4 D/coll.

NA-61~ 0.1 D/coll.

MIMOSA-26 matches the needs for SPS, not for FAIR => CBM and NA61 are complementary.

5M. Deveaux

Requirements on an NA-61 MVD

Primary Beam: ~150 AGeV Au Ions (~ 105/s)

Primaryvertex

Secondaryvertex

Short lived particle D0 (ct = ~ 120 µm)

Detector 1Detector2Target

(Gold)

z

• Time resolution to separate 2000 coll/s => ~ 100 µs

• Good radiation tolerance

Reconstructing open charm requires: • Excellent secondary vertex resolution (~ 50 µm)=> Excellent spatial resolution (~5 µm)=> Very low material budget (few 0.1 % X0)

All numbers extrapolated

from CBM simulations

6

Requirements vs. sensors

NA-61 Hybrid CCD MIMOSA-26

Resolution < 5 µm 30 µm <5 µm 3.5 µm

Material Budget

few 0.1 X0 ~ 1% X0 ~0.1% X0 0.05% X0

Rad. Tol. (1) 3x1010neq/cm² >1014 neq/cm² <109 neq/cm² >1013 neq/cm²

Rad. Tol. (2) ~1 krad >10 Mrad ~1 Mrad > 300krad

Time res. ~100 µs 20 ns ~ 100 µs 115.2 µs

(1) non ionizing dose per week beam on target(2) ionizing dose per week beam on target

All numbers extrapolated from CBM

simulations assuming 2000 Au+Au coll./s

7

CMOS-MAPS, the fundamentals

Monolithic Active Pixel Sensors(MAPS, also CMOS-Sensors)

• Invented by industry (digital camera)

• Modified for charged particle detection by the PICSEL group, IPHC Strasbourg

Selected communities participating in MAPS R&D

CBM MVD

ALICE ITS

STAR HFT

EU-DET

TESLA ILC Vertex .

2000 2005 2010

AIDA

8M. Deveaux

MIMOSA-26: The operation principle

Reset+3.3V+3.3V

Output

SiO2 SiO2 SiO2

N++ N++N+ P+

P-

P+

15µm50µm

Pixel readout concept

9

External ADCSensor Offline Cluster

finding

Output

Add pedestal correction

~1000 discriminators

On - chip cluster-finding processor

Output: Cluster information(zero surpressed)

MAPS are built in CMOStechnology

Allows to integrate:• sensor• analog circuits• digital circuits

on one chip.

Block diagram of MIMOSA-26

M. Deveaux, NA-61 Collaboration Meeting, May 2013 10

8 x analog out (obsolet)

Readoutsequencer

Slow controlinterface (JTAG)

Bias DACs (Threshold generation…)

Coll. discri-minators

Zero suppr.computer

Outputmemory

Sensor array (21200 x 10600 µm²)

Interface of MIMOSA-26

M. Deveaux, NA-61 Collaboration Meeting, May 2013 11

JTAG clkJTAG inJTAG out

Vdd (3.3V)VddA (3.3V)VCmp (~ 2V)

Clk (80 MHz)Start (digital)

Data (2 x 80 MHz)Data Clk

Temp inTemp out

GND

Relatively simple interface (~50 pins for > 600.000 pixels)

Native data encoding of MIMOSA-26

M. Deveaux, NA-61 Collaboration Meeting, May 2013 12

S4 S5

S2 S3

S0 S1SL0

SL1

SL2

State: “Status/Line”

0 0 1 1 1 0 0 0 1 0

(for each line containing a fired pixel)

Readout direction

Q. Li

Native data encoding of MIMOSA-26

M. Deveaux, NA-61 Collaboration Meeting, May 2013 13

S4 S5

S2 S3

S0 S1SL0

SL1

SL2

0 0 1 1 1 0 0 0 1 0

“State”-Up to 4 consecutive fired pixels

Readout direction

Q. Li

Limitations of data encoding

M. Deveaux, NA-61 Collaboration Meeting, May 2013 14

Max. 9 states/row

… 18 banks (64 cols.)Max. 6 states/bank

Output BufferMax. 2x 570 states

80 Mbps 80 Mbps

Overflow concept: Truncate and indicate

A comment on the synchronization of the readout

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Sensors:• Run freely and contineously• Cannot react on trigger• Provide internal time information• Deterministic data push interface

FPGA-Boards:• Reduce data (remove idle bits)• May handle trigger requests• Check synchronization• Handle network issues

• Proposed hardware platform:GSI TRB-3 board

The readout system (CBM-MVD Prototype)

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12 Sensors

TrbNetTRB-board

Ethernet

Customized

B. M

ilanovic

Sensors

DAQ

The readout chain (CBM-MVD prototype)

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C.

Sch

rade

r, B

. N

eum

ann,

M.

Koz

iel,

IKF

Fra

nkfu

rt

The readout chain II

M. Deveaux, NA-61 Collaboration Meeting, May 2013 18

TRB2 + GPAddon

JTAG Chain 1

JTAG Chain 2

JTAG Chain 3

TDO

3x JTAG, SRC

3x JTAG chainController

MAINBoard

Patch Panel

one clockone START

B. M

ilanovic

Summary and conclusion

M. Deveaux, NA-61 Collaboration Meeting, May 2013 19

MIMOSA-26 matches the requirements for an NA-61 MVD

• 1152x576 pixels (2 cm²), 18.4 µm pitch• 115 µs frame rate• 50 µm (Si) thickness=> 0.05 X0

On-chip discriminators provide digital high level protocol

Stable readout has been demonstrated with TRB-FGPA boards

Further reading:

• The MIMOSA-26 manual: http://www.iphc.cnrs.fr/IMG/pdf/M26_UserManual_light.pdf• General performance: • Data sparsification: A. Himmi et al, http://www.iphc.cnrs.fr/IMG/ah_suze_Twepp2009_proc.pdf• Radiation tolerance: M. Deveaux et al, 2011 JINST 6 C02004,doi:10.1088/1748-0221/6/02/C02004

It’s no science fiction

M. Deveaux, NA-61 Collaboration Meeting, May 2013 20

The CBM-MVD prototype:

Based on MIMOSA-26

Results from SPS-beam test:• MIP efficiency: > 99

%• Spatial resolution: ~ 4

µm

Vacuum compatible cooling support (CVD diamond)

Material budget: <0.3% X0 (incl. two silicon layers and support)

Latch-up – a radiation induced, reversible short circuit

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Latch-up may occure if particles hit sensitive structures like CMOS-Inverters.

The structures of the inverter act as parasitic thyristor, which is switched on=> Short circuit in the device

Latch-up – a radiation induced, reversible short circuit

M. Deveaux, NA-61 Collaboration Meeting, May 2013 22

IC affected by latch - up

If no action is undertaken, the device is destroyed by over-current (thermal overload).

Detecting the over current and performing power cycling solves the problem (thyristor is switched off).

Latch-up

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Sensor

Computer

Sensors must be protected against latch-up

„May 2009 Latch up tests - report ”Michal Szelezniak, Leo Greiner

Not Mimosa-26

Mi26- sensors

Mi26- computer