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Masters Theses Student Theses and Dissertations

1971

The concept and design of a curvilinear character generator for The concept and design of a curvilinear character generator for

cathode ray tube display systems cathode ray tube display systems

Lawrence Edward Hanebrink Jr.

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Recommended Citation Recommended Citation Hanebrink, Lawrence Edward Jr., "The concept and design of a curvilinear character generator for cathode ray tube display systems" (1971). Masters Theses. 7227. https://scholarsmine.mst.edu/masters_theses/7227

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THE CONCEPT AND DESIGN OF A CURVILINEAR CHARACTER GENERATOR

FOR CATHODE RAY TUBE DISPLAY SYSTEMS

BY

LAWRENCE EDWARD HANEBRINK, JR., 1943-

A THESIS

Presented to the Faculty of the Graduate School ot the

UNIVERSITY OF MISSOURI-ROLLA

In Partial Fulfillment ot the Requirements tor the Degree

MASTER OF SCIENCE IN ELECTRICAL ENGINEERING

1971

1.94256

T2556 ~ C:.(

70 pages

ABSTRACT

The character generator is the heart of any cathode ray tube

display system. The types of generators in common use are the dot

matrix generator, the raster scan generator, and the linear stroke

generator. Each of these generators produces symbols whose legibility

is somewhat compromised. A curvilinear generator is suggested which

provides improved appearance and greater legibility. A prototype unit

was constructed and the results are compared with the other generators.

The curvilinear generator provides the best character resolution and

readability of the generator types discussed.

iv

Table of Contents (continued) Page

G. Reference Voltage Source••••••••••••••••••••••••••••••••49

v. Discussion and Conclusions.••••••••••••••••••••••••••••••••••••54

REFERENCES••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••58

VITA••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••59

APPENDICES••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••60

A. Derivation of Sine Wave Oscillator Equations ••••••••••••• 61

B. ASCII Standard Character Set•••••••••••••••••••••••••••••63

v

LIST OF ILLUSTRATIONS

Fi.gures Page

1. Block Diagram ot a Character Generator•••••••••••••••••••••••••••••4

2. Characters Formed by the Dot Matrix Character Generator •••••••••••• 6

3· Characters Formed by the Raster Scan Character Generator ••••••••••• 8

4· Characters Formed by the L~near Stroke Character Generator ••••••••• 9

5· Characters Formed by the Curvil~near Character Generator •••••••••• 10

6. x and y Funct~ons tor n • o •••••••••• ••••••• •••• •••••• •• •• ••• ••• ••• 12

? • x and y Functions tor n • 1 •••••••••••• ·-· •••••••••••••••••••••••••• 13

8. x andy Funct~ons tor n=2••••••••••••••••••••••••••••••••••••••••14

9· x and y Funct~ons tor n • 3· ••••••••••. •• ••• •••••• •••• •• •• ••••• •••• 15

10. x andy Waveforms tor the Symbol "S"••••••••••••••••••••••••••••••17

11. S~ne Wave and Cosine Wave Osc~llator •••••••••••••••••••••••••••••• 20

12. Amplitude and Ottset Control C~rcu~t••••••••••••••••••••••••••••••22

13. Phase Locked Oscillator ••••••••••••••••••••••••••••••••••••••••••• 25

14. Sine Wave Osc~llator Schemat~c Diagram••••••••••••••••••••••••••••28

15. Phase Locked Oscillator Schematic Diagram•••••••••••••••••••••••••29

16. Character Posit~on Circu1trY••••••••••••••••••••••••••••••••••••••32

1?. Character Storage C~rcuitr.y ••••••••••••••••••••••••••••••••••••••• 34

18. Memory Butter C~rcu~t•••••••••••••••••••••••••••••••••••••••••••·•35

19.

20.

21.

22.

23.

24.

25.

FE'l' Drivers

FE'l' Drivers

FE'l' Dr~vers

FE'l' Drivers

FE'l' Drivers

FE'l' Dr:ivers

Fft Drivers

tor Sine Wave

tor S~ne Wave

tor S~ne Wave

tor Sine Wave

tor Vertical

tor Vert:ical

tor Vert:i<:al

Oscillator v, Output••••••••••••••••••••37

Oscillator vz Output••••••••••••••••••••38

Oscillator v3 Output••••••••••••••••••••39

Osc~llator v4 Output••••••••••••••••••••40

Gains 4 and 8 •••••••••••••••••••••••••••• 41

Gains 1 ancl 2 •••••••••••••••••••••••••••• 42

Ottsats 4 and 8••••••••••••••••••••••••••43

Li.st ot Illuetrati.ons (conti.nued)

Fi.gures

vi.

Page

26. FET Dri.vere tor Verti.cal Offsets 1 and 2••••••••••••••••••••••••••44

27. FET Dri.vers tor Horizontal. Gai.ns 4 and 8 •••••••••••••••••••••••••• 45

28. FET Dri.vers tor Hori.zon'tal Ga:f.ns 1 and 2 •••••••••••••••••••••••••• 46

29. FET Dri.vers tor Horizontal Offsets 4 and 8 •••••••••••••••••••••••• 47

3(). FET Dri. vers tor Hori.zontal. Offsets 1 e.nd 2 •••••••••••••••••••••••• 48

31. X-Wavetorm. Generator••••••••••••••••••••••••••••••••••••••••••••••50

32. Y-Wavetorm. Generator. ••• •• ••••• •• • ••••••-•• •. •• •• ••• •• • ••. ••. •• •• • .51

33. Reference Voltage Source••••••••••••••••••••••••••••••••••••••••••52

34· Prototype Character Generator•••••••••••••••••••••••••••••••••••••55

35. Curvi.linear Character Display ••••••••••••••••••••••••••••••••••••• 56

v~~

LIST OF TABLES

Tables P~e

I. Coefficients ReqUired for the Symbol "8"••••••••••••••••••••••••19

II. Phase, Ampl~tude, and Ottset Controls ••••••••••••••••••••••••••• 23

III. Memory Word Length •• ~•••••••••••••••••••••••••••••••••••••••••••26

1

I. Introduction

The cathode ray tube (CRT) display system is an important device

for communicating between man and machine. The purpose of such a

device is to provide an essentially real time display of information.

This capability immediately lends the CRT display to many applications.

Perhaps the largest application is in the display of computer

generated information. The real time feature of a CRT read-out device

allows a computer operator using an analysis program such as ECAP to

enter an electronic circuit (or some other system) into the computer,

and have the effect of changing various parameters visually displayed.

This can provide a tremendous savings in the time needed to design and

analyze a circuit. A permanent record of the design can be made by

photographing the circuit (as well as various current and voltage plots

for the circuit) right off the CRT. In addition, some CRT displays

are available with hard copy printout.

The CRT display is also used in some electronic desk calculators

because of the need to display a large number of digits. The CRT

becomes more economical than other methods of display when large

numbers of digits are involved.

A third use of the CRT is the so-called "Heads-Up" display in

aircraft. By using a clear glass in front of the pilot as a reflector

for the CRT, the CRT's image can be superimposed on the outside view.

This is of particular interest in automatic landing systems where an

electronic reconstruction of the horizon and runway could take the

place of the actual view in case of heavy clouds or fog. Various

important parameters such as airspeed, altitude, rate of descent

or climb, etc., could also be displayed so that the pilot's attention

would not be diverted from his view of the outside.

Still another usage of the CRT is instrumentation read-out. The

single CRT screen can be used to replace the large number or the

dials and gauges required to monitor large complex systems. The

2

display can be programmed to normally read out only certain parameters,

with the others being displayed on command. When critical parameters

change beyond a preset threshold, the CRT would display those para­

meters along with a warning message. This is probably the most practical

way of monitoring a multiplexed instrumentation system where hundreds

of-measurements are being sampled and a real time data display is

required.

II. Review ot Literature on Types of Character Generators

The character generator is the heart of any display system.

The character generator is used to convert the digitally coded display

inputs to the analog signals required by the CRT. There are several

types or character generators available for the display of computer

data. The major differences in these generators are in the methods

ot forming the symbols, but all character generators have certain

system elements in common:

A. An input decoder which translates the digital input code

into the form necessary to select the prop&r character for display.

B. A character store which contains all the information needed

to synthesize the characters.

c. A waveform generator which takes the information from the

character store and converts it to analog eignals which are fed to

the display tube circuit to obtain the x and y deflections necessary

to form the character.

3

In addition to the above generator elements, character display

systems also include a deflection decoder which positions the char~

acter at the proper x and y locations on the tube face and a display

tube system consisting of a CRT, power supplies, deflection amplifiers,

and intensi~cation circuits. A character display system block diagram

is shown in Figure 1.

Character generators are usually grouped by the method employed

to form the character, i.e., shaped beam, dot matrix, raster scan,

linear stroke, and curvilinear stroke. Each of these techniques is

discussed in the following paragraphs.

CHARACTER _____ _.

ADDRESS CHARACTER STORAGE MEMORY

CHARACTER POSITION ADDRESS

' '

X WAVEFORM

GENERATOR

X z

Y WAVEFORM

GENERATOR

', y

DISPLAY OSCILLOSCOPE

F~gure 1. Block D~agram of a Character Generator

4

A. The Shaped Beam Character Generator

Symbols are formed with this type or character generator by

shaping the cross section or the electron beam into the desired

character configuration. A stencil is located within the display

tube such that it shapes ~he electron beam passing through it.

Electrons from the cathode flood the entiro stencil matrix to form

an array of shaped beams. The array of beams is imaged by means of

a focus lens onto the selection aperature which permits only one of

the shaped beams to pass through the selection aperature. The pro­

jection lens then projects the selected Cftaracter onto the CRT

screen [1].

B. The Dot Matrix Generator

In the dot matrix generator, the cheracter is composed of a group

of dots which are arranged in a fixed fo~at. The electron beam is

stepped through each position one by one and the CRT is unblanked

at the necessary positions to form the Qharacter [1]. To display the

64 symbols contained in the standard ASCII character set, a minimum

of 35 dots is required, arranged in a 5 column by 7 row matrix. The

characters formed by this technique are shown in Figure 2.

c. The Raster Scan Generator

The raster scan technique is similar to the dot matrix technique

except that the beam is swept acros~ the entire CRT screen to form the

top segment or a character, or of an entire row of characters. The

second sweep is immediately below the first sweep and so on [2,3].

As with the dot matrix a minimum ot seven rows is required to display

the ASCII character set. Each row has a minimum or five segments

during which the beam is unb1anked as required to form the characters.

5

6

: I I I I •• 1 •• • • •• • • • • • . , . • •••• • • •• • • • • • • • • •• • • • • •:•:• • ! : .. :: : ... • • • • • • ••

• • • I • • • : • • : •!!!· • • • •••• • •••• • • • • • • •• . : . • • • • • • ••• . : • •• ••••• • :···· • •• • •••• • • • • • .·: • • • I • • • • • • • • • • • •• : .. :. • ••• • ••• • • • • • • • • • • • • : • • •••• : • • • • • ••• • •••• • •• • •• • ••• • •••• • • • •• • • •• • • • • • • • • • • •••• • • ••• • ••• • • • • • . : • • •••• • • • • • • •• • ••• • •• • • • ••• • •• :··· ••• :••. • •••• • •••• • ••

I •• : : ! • • • • • • : i···· ! ! • • • : :.: • ~·· ••• • :···: • • •••• • • • • • • • • • • ••• • • • ••• • •• • •• • •••• • •••

I • ••• • • • • • • • • • •• • • • • • i •• • • • • • • : ••• 1 I i • • : • • •• • : .·:

:··. • • • • ! I • • • : • • •• • • • • • • • • : • • • • ••• ••• • • • •••• • • • • ••

a•••. ••• r··= • •• • •••• • • • • : • • • • • • • • • • • 1 •••• i • ! • • • • • : • • ••• • •• • • • • • • i • • : • • • • • • • • • • • • • ••• • • • • • •• •• •• • • • • ••• • • •

I I • • ····I ~·· ··: .I. • • • • • • I • I • : . : . .I ••• • • • • • i • 1 •• • : I • • : : .... • • • • ••

F:1gure 2.. Characters Formed by the Dot Matrix Character Generator

An example of the characters generated by this technique is given in

Fi.gure 3·

D. The L~ear Stroke Character Generator

The stroke writing technique differs from the dot matrix and

raster scan techn~ques in ·that 11ne segments are generated and not

just po~nts. This type or system accepts digital inputs and provides

a sequence of ramp voltages or different slopes to generate the char­

acter. The slope of each stroke ~s determined by the digital input,

and the character is traced out by the interconnected combination of

all the strokes r4l. An example of the characters generated by this

technique is illustrated in Figure 4.

E. The Curvilinear Character Generator

The characters produced by this generator are based on sine wave

segments. By applying sine and cosine waveforms to the x and y inputs

of a CRT ~splay system, either curved lines or straight lines arc

generated as shown in Figure 5.

The main appeal this generator has over the others previously

discussed is twofold: 1) the readability and natural appearance of

the characters, and 2) the relatively inexpensive means by which this

is obtained. This character generator is ~scussed in detail in the

following section.

7

8

- -- -- - - -- • - -- -- - - - -- -- -• - -- -- -• -- • • - - -• - -• -- • • --- -• • • - --• -• - --- • • • - -• - • • • • - - • • - - - - -• - - - • • • --- - - - -- • • -

- • - - - - - -- - - • • • - - - - • - • - - - • - - • -• - - - - - - - - -• - - - - - - • • -- • - - - - • - - • - -- - - - • - - -- - - • -• - - - • - - -- - - - - • - - - -- - - • -• - - - - - -• - - - - - - -- - - • • -- - - - - - - -- • -• • - - • • - • • • --- • • • - • • - • • --• • • • - • • • - - • -- - • • - - - • - • -- - • • • - • • • • - • -- - • - - - - - -- - - - - • • - - • - -.. - • - -- • -- • - - -- - - - -- • -• - - - • -- - - - • - - • • - ---- - - • - • - • - - -- - -- - - • - -- • - - - - • -- - - - - - - - • - - -- - - - - - • - • - -- • • • • - • - - - • - • • -• • - - • • - - • - - - - -- - • - - - - - - • - -- -• - • • - - - - - - ---- • • • • - - - - - -- --- -- • - - - - - - -- • - - - - - -• - -• • - - - - --• - - • • - • • - -- - - - • • • --- - - • - - - -- - - • • - - • • - - - - - - -

F:igure 3· Characters Formed by the Raster Scan Character Generator

! II tt S) % & I ( ) * +/-. /012345 8789:; <=>?@ ABCDEFGHI~K

LMN0PORSTUV W X Y Z [ ~ J ~ ~

Figure 4· Characters Formed by the Linear Stroke Character Generator '-0

10

I •• # $ 7. & t •

( ) * + ' • I

0 I 2 3 4 5 6 7

8 9 • • < > ? • ' •

@ A B c D E F G

H I J K L M N 0

p Q R s T u v w X y z [ " ] t

Figure .5. Characters Foraed by the Curvilinear Character Generator

11

III. The Curvilinear Character Generator

A. Theory or Operation

The alpha-numeric symbols contained in the ASCII character set

may be represented as a curve given in cartesian coordinates by the

equation

y = f(x) (1)

In general, y is a multivalued function of x, but the curve can

be represented by two parametric equations

(2)

(3)

where t 0 < t< t 1 and where r 1 and r2 are single valued functions of t.

If t is time, then these functions define the continuous path of the

electron beam along a curve on the face of the CRT screen. Functions

r 1 and r2 must be single-valued functions, since the electron beam

cannot be in two different positions at the same time.

The functions y and x for the curvilinear character generator are

given by

y =a sin (2wt + "7'> + c

x = b sin ( 2wt + "T> + d

(4)

(5)

where w • 27t times the character generation rate

n:w0,1,2,3

m=0,1,2,3

The curves represented by equations (4) and (5) are shown in Figures 6

through 9 for the various values or n and m. The curves fall into two

categories, ellipses and straight lines. Segments of these ellipses

and straight lines are put together in sequence to form the desired.

alpha-numeric symbols. The technique for determining the values of

a,b,c,d,n, and m for each segment is given below.

12

y y

a a

t=O

c c

~~----------~---+--~x ~~----------4---~~~x --- d __ __,......_ b ..,... ___ d ----lilt- b

m=O

y y

a a

c c

~~----------~----~--~x

--- d -----41..._ ~-- d -----1~ b

m=2 m=3

Fi.gure 6. x and y Functi.ons tor n =- 0

13

y y

t=O t=O

Q •

c c

---+----------4---~ ... x ~~----------+---~--~X

---- d ------ b ---- d -----i-- b

m=O m=1

y y

t= 0

Q Q

c c

~~------------~----~~X

11---- d ------- b It--- d -----i--

m=2 m=3

Fi.gure 7. x and y Functions for n = 1

14

y y

a Q

t=O

c c

X ~~-----------4----~--·x ..__ __ d __ _,...._ 11---- d -----tilt-- b

m=1

y y

a a

t=O

c c

~-+------------~---+----•X ~~----------~----~--~x ....._.. __ d __ _,.....,. b ..... --- d -----tit-

m=2 m=3

Fi.gure 8. x and y Functi.ons for n • 2

15

y y

• a

c c t=O

t=O

----+-------+--~H~X

---- d -----til- b It--- d --~II-

m:::O. m:1

y y

a a

c c t:O

t:O

~~------------~--~~~x ~-r-----~----+--4~X

---- d ------~--- b It--- d ------t-- b

m:2 m=3

F:Lgure 9· x and y Funct:Lons for n = 3

The desired symbol is drawn on graph paper which is normalized

to 6 divisions on the y axis and 6 divisions on the x axis, i.e.,

Y i • 0, Y ,. 6, x i = 0 and x • 6. The curved segments of the m n max m n max

symbol are represented by ellipse segments one quarter or an ellipse

16

in length. Since the frequency or the sine wave is twice the character

generation rate (see equations 4 and 5), a total of eight quarter

ellipses, i.e., two complete ellipses, may comprise a completed char-

acter. The values of a,b,c,d,n, and m must be determined for each of

these eight segments. To minimize the required circuitry and character

storage in the generator, only a fixed set of values for a,b,c,d,n, and

m are allowed:

.1 a,b• 2 where j:~~0,1,2, •••• 6

k c,d=-2 where k:a0,1,2, ••• ,12

n,m:: 1 where 1=:0,1,2,3

With these considerations in mind, the symbol "S" is given as an

example. The "S" is drawn on graph paper in Figure 10. It is composed

of two ellipses, one centered at the coordinates (3,4.5) and the other

centered at the coordinates (3,1.5). The major and minor axes of the

upper ellipse are 5 and 3 respectively, and the major and minor axes

of the lower ellipse are 6 and 3 respectively. The starting point

or the curve (at t = 0) is taken to be the point labeled t 0 at coordi­

nates (5.5,4.5). From Figures 6 through 9 it is noted that the value

of c is the y coordinate of the ellipse center, and the value of d is

the x coordinate of the ellipse center. The value of a is one half

the length of the vertical axis of the ellipse, in this case the minor

axis, and the value of b is one half the length or the horizontal axis,

17

y ~~

6 t1

_L v ~

~ 5 { t2 \- to 4

" 3 '-..... t3 ..... -- t7 -....

' 2 /

ts t 8~ t4 , \ ' r--_ t5 __.. v ..

1 2 3 4 5 6 -- X

to• ~ 2

t5• 4W

t =.JL J& 1 4• t6• 2w

..lL. tz• 2w

1!1 t7• 4w

t•J:t[ 3 4• t -~ 8 w

t =~ 4 •

Figure 10. x and y Waveforms for the Symbol "S"

18

in this case the major axi.s. Therefore at t 0 we have

a. 1.5 (6)

b. 2 • .5 (?)

c :1 4·5 (8)

d = ,3.0 (9)

To solve for the values of n and m, the values of x,y,t,a,b,c, and d

are substituted into equations 4 and 5:

4·5=- 1.5 si.n (~) + 4·5

5·5• 2.5 sin (.,) + .3

SolVing tor n and m gives

~-arc si.n (0)

~-arc sin (1)

( 10)

(11)

( 12)

( 13)

Thus n • 0 or 2. and m • 1. Since the value of y 1.s 1.ncreasing at t 0 ,

n must be equal to o. Therefore, coeft1.cients for the first segment

are

a• 1.5 (14)

b= 2.5 (15)

c• 4·5 ( 16)

d. ,3.0 ( 1?)

n=O ( 18)

m•l ( 19)

By proceeding in a simi.lar manner, the value or the coefficients for

the remaining segments are found as given in Table I. It should be

noted however that only six of the eight segments are needed and

therefore the electron beam in the CRT must be blanked off during

the last two segments.

19

Table I. Coefficients Required for the Symbol "S"

Segment a b c d n m

1 1.5 2.5 lh5 3·0 0 1 2 1.5 2.5 4·5 3.0 0 1 3 1.5 2.5 4·5 3·0 0 1 4 1.5 }.0 1.5 3·0 2 1 5 1.5 }.0 1.5 3.0 2 1 6 1.5 3.0 1.5 3·0 2 1 7 1.5 3.0 1.5 }.0 2 1 8 1.5 3·0 1.5 }.0 2 1

At this point it should be noted that a and b correspond to vertical

and horizontal amplitude respectively, and c and d correspond to

vertical and horizontal offsets respectively.

To implement the sine wave source, the oscillator of Figure 11

is considered.

B. Sine Wave Oscillator Description

A1 -A4 are operational amplifiers operated in the inverting mode.

Resistor R1 provides positive feedback which causes oscillations to

build in amplitude. The two zener diodes limit the amplitude or the

oscillations to the zener breakdown voltage, V • The output voltages z

can be expressed as a set of differential equations:

(20)

(21)

(22)

(23)

Vz Vz

c R1 R2

c R2

"">-+a V1 =Vzcos2wt

· OV2=Vzsin2wt

'-------------------oV3=-VzCOS2wt

'---------------------------oV4 =-Vzsin2wt

Figure 11. Sine Wave and Cosine Wave Oscillator f:l

21

The solut~on to these equat~ons may be found to be:

V1 • Vzcos 2wt=: Vzs~n (2wt + ~)

v2 • V s~n 2wt • V s~n ( 2wt + o) z z .

v3 =-V cos2wt•V s~n (2wt+~2 ) z z . v4 = -v s~n 2wt = V su (2wt + 1t) z z

(24)

(25)

(26)

(27)

1 where w=RC'• The der~vat~on of tMs solut~on ~s given in Append~x A.

The output voltages thus correspond to the sine terms of

equations 4 and 5 where V 1 corresponds to n,m = 1, V 2 corresponds to

n,rn=O, v3 corresponds to n,m•3• and v4 corresponds to n,m:a2. The

next requ~rement ~s a means of adjust~ng the amplitude and offset

of the s~ne waveforms. A c~rcuit to perform this function is ~ven

~n F~gure 12.

c. Amplitude and Offset Control C~rcuit

The phase selector turns ON one of the four field effect transistor

(FET) switches to select the des~red output from the sine wave osc~lla-

tor. The amplitude selector turns ON a comb~nation or three FET

switches to select 8 combinations of voltage gain ranging from 0 to

2 1 4 in steps of 4• The offset selector turns ON a combination of four

FET switches to provide offset voltages or 0 to lf VR in steps of

~ 8 VR' where VR ~s a reference voltage wMch ~s set equal in magnitude

to the peak voltage of the s~ne wave oscillator, Vz.

By using these FET switches to control the sine select, the

amplitude, and the offset, the x,y waveforms can be generated by

using one amplitude and offset control circuit for the x axis input

and one tor the y axis ~nput. The transfer equation for the circuit

or F~gure 12 ~s given by

(28)

OFFSET SELECTOR

VR T 't_ R - ........ .... ......

T T 2R

'I. A& wyy

_]' ,. 4R .&&.& .......

8R TT ...... l.

...... v1 R

... & • - ~rJ. .L.&. ....... v2 4 j

2R R - ...... .......... - .L l.. .Lr'o .... ..... v3

~

4R

~ ... v .1. l.. J. ~ •w•

-r/

-PHASE AMPLITUDE

SELECTOR SELECTOR

v4 Your

Figure 12. Amplitude and Offset Control Circuit ~

23

where the values of G, VIN' and G0 are determ~ned by the logic inputs

to the gain control, the input select control, and the offset control

as given in the following table:

Table II. Phase, Ampl~tude, and Offset Controls

Phase VIN

Ampl. G Offset Go

Offset Go Select Select Select Select

00 V cos2wt z 000 0 0000 0 1000 .a 8

01 V sin2wt 001 ~ 0001 ~ 1001 ..2 z 4 8 8

10 -v cos2wt 010 ~ 0010 ~ 1010 10 z 4 8 8

11 -v sin2wt 011 .l 0011 2 1011 11 z 4 8 8

100 11 0100 lk 1100 ll 4 8 8

101 2 0101 .2 1101 .ll 4 8 8

110 .2 0110 .2 1110 ll 4 8 8

111 1. 0111 1. 1111 .1.2 4 8 8

If equation (28) is valid for one segment of a symbol generation

sequence, then we can write the x and y position equations as:

ni 'It yi(t) =K [Gi V + Gi V sin (2wt+-2 )] {29) oy z y z

m'lt

xi(t) = K [ Gi V + Gi V sin (2wt + .::L.2 ) ) (30) OX Z X Z

where K is a constant representing the overall system gain; Gi and oy

Gi are the voltage offsets applied to the y and x inputs of the ox

CRT during the i~ segment; Giy and Gix are the selected amplitudes

ot the sine terms; and ni and mi determine the phase of the sine terms.

If we let the following cond~tions be true:

ai = KGiyvz

b~ = KGixvz

ci:. KGi V oy z

di =r KG. V .LOX Z

then equations (4) and (5), and equations (29) and (30) are equiva-

lent, and the circ~t is ~n fact an electr~cal realization of the

des~red x and y functions.

D. The Phase Locked Oscillator

The controls for adjusting the sine ~nput, ampl~tude, and offset

24

must be synchronized to the character rate. A phase locked oscillator

~s a logical cho~ce for perform~ng this funct~on. A c~rcuit is g~ven

~n F~gure 13. One output or the s~ne wave osc~llator is used as a

reference frequency. A voltage controlled oscillator (VCO) is di~ded

~n frequency by fl~p-flops and compared to the reference frequency by

the phase angle comparator. The output of the phase angle comparator

~s a voltage proport~onal to phase angle difference and this is used

to adjust the frequency of the vco. Thus the VCO is locked in phase

and frequency to the sine wave oscillator.

E. Character Storage

The information for selecting the sine input, amplitude, and

offset is stored in a digital memory. The number of b~ts required

for each word of memory is determined in the followine table:

SINE

WAVE

INPUT

........

)--

J Q 1-- J Q ~~ J Q ~ J Q

VCO CP - ICP .__

CP ......_

CP

K a K 0 K Q K 0

....._ PHASE ANGLE

J Q COMPARATOR ZERO CROSSING

CP COMPARATOR

K Q CI-!ARACTER GENERATION RATE: f_ --- -

SINE WAVE FREQUENCY = 2fc

Figure 13. Phase Locked Oscillator

--. -------

Bfc

4fc

2fc

t,

I\) \J1

26

Table III. Memory Word Length

Funct:ion No. or Bits

y s:ine phase select 2 y ampl:itude select 3 y offset select 4 X s:ine phase select 2 X amplitude select 3 X offset select 4 z :input ~

Total Word Length = 20 Bits

A total of eight 20 bit words is thus requ:ired to generate each char-

acter. The characters are stored :in memory such that the seven most

s:ignif:icant b:its or the word address select the character to be dis-

played and the last three b:its select the segment. Therefore these

last three b:its are driven from the f , 2f , 4f outputs of the phase c c c

locked oscillator of Figure 13. The 8f output is used to :initiate the c

read control on the memory. Thus the character generation information

:is read from the memory :in synchronizat:ion ~th the sine wave oscillator.

IV. Prototype Curv~l~near Character Generator

To demonstrate the feasibility of the curvil~near character

generator, a prototype model was constructed. The sine wave

oscillator, amplitude and offset control, and phase locked oscillator

of the previous sections were used. The circuit schemat~c diagrams

27

are given in Figures 14 through 33· Surplus parts and equipment avail­

able to the author were used to construct the prototype.

A. Sine Wave Oscillator

The sine wave osc~llator was ~mplemented as shown in Figure 14.

Monolithic operational ampl~fiers were used because of the~r low ccst

and ready availability. The type used requires external frequency

compensation to ensure stable operat~on with a large amount of negative

feedbacl~.

Resistor R11 provides positive feedbacl~ caus~ng oscillations to

build up until limited by zener diodes VR1 and VR2 to approximately

~5 volts in amplitude. Resistors R7-R10 are used to balance the equiv­

alent res~stance in both ~nput leads of each amplifier which minimizes

the DC offset voltage caused by the input bias current of the amplifiers.

Resistors R1, R2 and capacitors C1, C2 were chosen for a sine wave

frequency of approximately 13 kHz. S~nce two sine wave cycles are

req~red per character, this provides a character generation rate of

approximately 6500 characters per second.

B. Phase Locked Oscillator

The phase locked oscillator requ~red to synchronize the character

generation circuitry to the sine wave oscillator ~s shown in Figure 15.

OUtput v2 of the sine wave oscillator is used as a reference frequency.

•1

co

-1

VR1 VR2 1N751A ..) )A1N751A

'1. I;"

22~? PF > 5.1ii2K R11 220K AA

11 C1 2200PF .. R4

~000~ 1 'c2

~~ c~~1oooPF R12 R14 5.62K 2 3SOn 5.62K 2 3SOfi -'"' ~ ... , . '. 8 5.62K 2 1 > 3SOn 8

R1 AR1 6 ...... ' RJ AR3 7-·y - 8

,.2.~ 4 R2 AR~ ~./4 ,J- v 7 ,.2.. /4 l/'7

,• R7~5,6K > ,/7 RS ~ 5,6K

R8~5.6K

-=- "'::'!!=-- --=--

C>---:::L

-R1- R6 ARE 1•1. RESISTORS. ALL OTHERS ARE 5"/ ••

VR1 & VR2 ARE 5.1 VOLT ZENER DIODES.

ALL CAPACITORS ARE 10•1 •.

AR1- AR4 ARE BURR-BROWN MODEL 3055/01 AMPLIFIERS.

5.62K .... R6

C6rl ~1000PF r-J ., 5:~2K 2 1 ~Json

- '8

RS AR4/ 6

r-1- + ,/4 L/7

R10 i> 5.6K

--=-

Figure 14. Sine Wave Oscillator Schematic Diagram

-

-

-

~

v,

V2

v3

v4

1\) ())

CR1 1N914

2N930A

01

v2 o-----i

+5V

•5V

R2 1K

ALL RESISTORS ARE 5•J ••

ALL CAPACITORS ARE 10•1 ••

r----------------------------------------QF1

r------------------------------nF2

r---------------~F3 ,------: I J a I

------~---- ---~--- -- -l

I I

I I

CP

K Q

J

CP

K

Q

Q

J

K

L SN7493N -------------

0 J 0 I I• 0F4

Q K Q

_____ _j

.------------------------------r----------------------~----OBR

,-----------1

:nn~ CP

±SN7400N Q _I

Figure 15. Phase Locked Oscillator Schematic Diagram

I\) \.()

The sine wave is converted to a square wave by the LM111 comparator.

The output of the comparator is a 0 to 5 volt signal, compatible

with standard transistor-transistor logic (TTL) circuits. The signal

is then fed through an inverter to further square the waveform. A

flip-flop is then used to ensure a duty cycle of exactly 50% that is

required by the phase angle comparator, which is a second flip-flop.

The output of the phase angle comparator flip-flop is used to

30

add charge to capacitor C3. The voltage across C3 is buffered by

transistor Q1 and used to control the frequency or tho astable multi­

vibrator formed by Q2, Q3, Cl, C2, and R1-R4. The output or the

multivibrator is fed i.nto a cascade of 4 flip-flops to divide the

frequency by 16 (at output F4 of Figure 15). The output or the fourth

flip-flop is then fed to the clear, i.e. direct reset, input of the

phase angle comparator flip-flop.

1. The Astable Hultivibrator

If we let R3== R4= R and C1 = C2= C then the period T of oscillation

is given by:

T = 2RC ln( 1 + V~c) (31)

where V is the voltage on the emitter of Ql atld Vee is the supply

voltage of 5 volts. The value of V can range from nearly 5 volts down

to about 1 volt. If the voltage drops below 1 volt, the rnultivibrator

will not oscillate, since V is too low to turn ON Q2 or Q3. Since

C= 220 p:f' and R= 20 kSl, these limits on V provide a frequency rane;o of

from approximately 64 kHz to 160 kHz. Therefore, the frequency of F4

can range from 4 kHz to 10 kHz, which allows F4 to be locked in fre­

quency to the character generation rate of 6500 characters per second.

2. The Phase Angle Comparator

The reference frequency is fed to the clock pulse (CP) input of

a flip-flop which toggles on the negative-going edge of the clock.

The adjustable frequency is fed to the clear (C) input of the flip­

flop. As long as the C input is low, the Q output or the flip-flop

31

is low. However, if a clock pulse occurs while the C input is high,

the Q output goes high until the C input again goes low. The Q output

is therefore proportional to the time difference between a negative

going edge of the reference frequency, and a negative going edge of

the. variable frequency. This output is used to raise the variable fre­

quency by charging capacitor C3 through CRl and R5, thereby increasing

the voltage across C3. The increased voltage causes the multivibrator

frequency to increase. Thus the next phase angle comparison will

result in a narrower output pulse at Q, since the clear input will go

low sooner. This process continues until the pulse width at Q is just

wide enough to add a charge equivalent to that pulled off capacitor

C3 by Q1 and the leakage current of CR1. This pulse width is suffi­

ciently small to be neglected.

c. Character Position Circuitry

The position of the characters on the CRT screen was determined

by flip-flops cascaded in a frequency divider circuit (see Figure 16).

The first five flip-flops form a 32 state binary counter. The outputs

are fed into a monolithic digital to analog (D/A) converter which con­

verts the 32 states of the flip-flops to 32 voltage steps. These

voltage steps form the x position information. The x-axis waveform

of the character is fed into the summing junction of the D/A converter

through resistor R1. In this manner the x-axis character information

J 01--

'-- CP ~

K Q

-:!:-1

y R2

SUMMING """ _.. ... JUNCTION

22K

J Q~

F4 .... CP ....._

K Q~

-l- I 1 2

R1 SUMMING .., JUNCTION

47K X

z

J Qf-- J Q 1-- J Ql--

CP ....,__

CP .....__ CP

K Q K a K a

L-.. ~

.1 l T

l I

2 4 8 16 32

6 BIT D/A CONVERTER DAC-01 OUTPUT

J Q f---" J Q ~ J Ql-- J

CP ....._

CP ~ CP I...- CP

K 01-- K Q ~ K 0 1-- K

4 8 16

6 BIT D/A CONVERTER DAC-01

Figure 16. Character Position Circuitry

Q

0 I-~

--32 ~

OUTPUT

z

y

X

""F11

""F10

""F5

"F6

F7

F8

~F9

SCOPE

\.H N

33

~s super~mposed on the x pos~t~on ~nformat~on.

The output of the f~fth fl~p-flop ~ the d~v~der ch~n ~s fed into

a cascade of four fl~p-flops to form a 16 state binary counter. The

outputs of these flip-flops are fed into a D/A converter to obtain the

y position ~nformation. The y axis waveform of the character ~s fed

~nto the summing junction of the D/A converter through resistor R2,

~n order to superimpose the y axis character ~nformation on the y posi­

t~on information. Therefore, th~s c~rcuit prov~des a character array

of 16 l~nes and 32 characters per l~ne.

D. Character Storage Circu~try

The ~nformation required to generate each character is stored ~n a

magnet~c core random access memory ~th diode-trans~stor logic (DTL)

buffer~ng (see Figure 1?). The memory is organized into 1024 words

24 bits ~n length. The character information was loaded manually by

select~ng a word by means of switches on the word address inputs, and

enter~ng the requ~red b~ts by means of switches on the data inputs.

The data output was then displayed by ~nd~cator lamps to ver~fy the

contents of the data word.

Eight words are requ~red for each character. Therefore the r~rst

three address b~ts were used to select the character segment. The

rem~ning ? b~ts were used to select the symbol to be d~splayed. The

symbols wer~ stored ~n sequence accord~ng to the standard ASCII code

(see Append~x B).

The cycle t~me or the memory is about 5 ~croseconds. Th~s

delay necess~tates the data output be~ng loaded ~nto a buffer register

to synchron~ze the data with the phase locked osc~llator of Figure 15.

The buffer register ~s shown ~n Figure 18. It cons~sts of six 4 b~t

34

WRITE/READ ~ F1 START

F2

F3 2 RANDOM F4 4 ACCESS

MEMORY F5 8

F6 16 HONEYWELL ICM-42

F7 32 ADDRESS

F8 64

F9 128

F10 256

512

81

2 2 82

3 3 83

4 84

5 5 85

6 6 86

7 "7 87

8 8 88

9 9 89

10 10 810

11 11 811

12 12 812 DATA IN DATA OUT

13 813 13

14 14 814

15 15 815

16 16 816

17 17 817

18 18 818

19 19 819

20 :20 820

21 21 821

22 l :: 822

23

24 24

':"

Figure 17. Character Storage Circuitry

81'""

82'""

83

84 ...

B

B

B

B

5

6

7

8

B

B

8

8

S""'

'10 .... -11

12 ....

13"""

14"""

8

8

8

8

15"""

16~

17 B

B

8

B

18-

1S ....

21 B

82 2-

F 1

A QA

B Oe U1

1-D~ c ac

D L Oo

A QA I B a8

U2 I -c ac

I -D L Oo I ..... A QA -B as

U3 c Oc .... -D L Oo

I ~ D A QA

8 a a I .... U4 l c Oc ...

D ao I ....

L I -A QA .... ..... B a a --U5 -c ac

D L Oo -A QA

8 Oe U6 I c Oc I D L 0 0 -

D- U1 - U6 SN74S5N

~gure 18. Memory Butter C~rcuit

Y1

Y2

Y3

Y4

Y5

Y6

Y7

YB

YS

Y10

Y11

Y12

X1

X2

X3

X4

X5

XS

X7

X8

X9

X10

X11

X12

z

35

36

registers with parallel inputs and outputs. The registers are loaded

with the Fl signal (of Figure 15) which is also used as the START

command on the memory (see Figure 17). Therefore the information

appearing at the output of the buffer register will by synchronized

with the F1 pulse, but will be delayed by one character segment from

the memory address word. To compensate for this delay, the bits

controlling the outputs of the sine wave oscillator were adjusted

0 to select a phase 90 behind the desired phase, thereby allowing the

proper signal to be present one character segment late. In addition,

a buffer register was added to the outputs of the position flip-flops

of Figure 12 to delay the position information by one character segment.

Bits 21 and 22 of the address word contain the unblanking infor-

mation. They are decoded such that a logic 1 in bit 21 unblanks the

beam for the first half of a character segment and a logic 1 in bit 22

unblanks the beam for the second half of a character segment.

E. FET Driver Circuitry

The outputs of the memory buffer of F~gure 18 require level shifting

before ·they can be used to control FET switches. The FET switches

require -10 volts gate-to-drain for an OFF condition and 0 volts gate-

to-drain for an ON condition. The circuitry used to obtain these

logic levels is shown in Figures 19-30. The output of these FET drivers

is a level that switches from -15 volts to a reference voltage equal

to the FET drain voltage. The reference voltage of Figure 19, for

example, is the v1 output or the sine wave oscillator of Figure 10.

Thus the logic 1 level output of the FET driver is a sine wave of ~5

volts amplitude, and the logic 0 level output is -15 volta DC. This

FET driver is used to control the FET which selects the v1 output of

37

+5V ·+15V

R5 10K

01 2N2604

VP~

CR1 1N914

4.7K

02 CR2 2N2222 1N914

R11 HP1 2700

33K Y1

Y2

-15V

CR3 CR4

v, 1N914 1N914

+5V +15V

R7 10K R10 10K

Q3

2N2604

4.7K

04 2N2222

2700

X1

X2 -15V

Figure 19. FET Drivers for Sine Wave Oscillator v1 Output

Figure 20. FET Drivers for Sine Wave Oscillator v2 Output

39

+5V +15V

R2 10K R5 10K

01 2N2604 VP3

CR1 1N914

4.7K

02 CR2

2N2222 1N914

2700 R11 HP3

Y1 33K

Y4

-15V

CR3 CR4

v3 1N914 1N914

+5V +15V

R7 10K R10 10K

Q3 2N2604

4.7K

04 2N2222

2700

X1

X4 -15V

Figure 21. FET Drivers !or Sine Wave Oscillator v3 Output

40

Figure 22. FET Drivers for Si.ne Wave Oscillator v4 OUtput

41

+5V +15V

R2 10K R5 10K

Y5 01 2N2604 VG8

CR1 1N914

4.7K

02 CR2 2N2222 1N914

2700 R11 VG4

33K

-15V

CR3 CR4 E

1N914 1N914 RY

+5V +15V

R7 10K R10 10K

Y6 Q3 2N2604

R8 4.7K

220PF 04 2N2222

R9 2700

-15V

Figure 23. FET Drivers tor Vertical Gains 4 and 8

-15V

+5V +15V

R7 10K R10 10K

Y8 Q3 2N2604

RB 4.7K

220PF 04 2N2222

R9 2700

-15V

F:1gure 24. FET Dr:1vere for Vertical Gains 1 and 2

43

+SV +15V

R2 101< RS 10K

Y9 01

voe 2N2604 CR1 1N914

4.7K

220PF 02 CR2 2N2222 1N914

21on R11 V04

33K

-15V

CR3 CR4 VR

1N914 1N914 RO

+SV +15V

R7 10K R10 10K

Y10 QJ 2N2604

R8 4.7K

220PF 04 2N2222

R9 2700

-15V

F1gure 25. FET Drivers tor Vertical Offsets 4 and 8

44

+SV +15V

R2 10K RS 10K

Y11 01

V02 2N2604

4.7K RO 220PF 02

2N2222 V01

2.700

-15V

+SV +15V

R7 10K R10 10K

Y12 Q3 2N2604

RB 4.7K

220PF 04 2N2222

R9 2700

-15V

Figure 26. FET Drivers tor Vertical Offsets 1 and 2

45

+5V +15V

R2 10K R5 10K

X5 01 2N2604 HGB

CR1 1N914

4.7K

02 CR2 2N2222 1NS14

R11 HG4 2700

33K

-15V

CR3 CR4 F

1N914 1NS14 RX

+5V +15V

R7 10K R10 10K

X6 Q3 2N2604

RB 4.7K

220PF 04 2N2222

RS 2700

-15V

Figure 27. FET Drivers for Horizontal Gains 4 and 8

46

+SV +15V

R2 10K RS 10K

X7 2N2604

HG2

R3 4.7K RX

220PF 02 2N2222

HG1 R4 2700

-15V

+5V +15V

R7 10K R10 10K

xa Q3 2N2604

4.7K

220PF 04 2N2222

2700

-15V

!'1.gure 28. FET Dri.vers tor Horizontal Gai.ns 1 and 2

47

+5V +15V

R5 10K

X9 01 2N2604 HOB

4.7K RO 02 2N2222

H04 2700

-15V

+5V +15V

R7 10K R10 10K

X10 Q3 2N2604

4.7K

220PF 04 2N2222

R9 2700

-15V

F~gure 29. FET Dr~vers for Horizontal Offsets 4 and 8

48

+5V +15V

10K R5 10K

X11 01 2N2604

H02

4.7K RO

02 2N2222

H01 2700

-15V

+5V +15V

R7 10K R10 10K

X12 Q3 2N2604

4.7K

04 2N2222

2700

-15V

Figure 30. FET Drivers ror Horizontal orrsets 1 and 2.

49

the sine wave oscillator (see Figures 31 and 32).

F. X and Y Waveform Generators

The X and Y waveform generators are shown in Figures 31 and 32.

Since both circuits are identical, only the X waveform generator is

discussed.

AR1 is an operational amplifier which is operated in the inverting,

summing mode. Transistors Q1-Q4 select one of the outputs of the

sine wave oscillator for each segment of the character and transistors

Q5~Q8 select a gain for the sine wave input, ranging from a gain of

0.01 to 0.15 in steps of 0.01. The DC offset for each character seg-

ment is selected by transistors Q9-Q12. The DC offset is selected

from a reference voltage maintained at the peak amplitude of one of

the outputs of the sine wave oscillator. The gain of the offset vol-

tage ranges from 0.01 to 0.15 in steps of 0.01. The reference voltage

source is discussed in the next section.

G. Reference Voltage Source

The circuitry used to obtain the reference voltage is shown in

Figure 33. The circuit operates by sampling the peak voltage of the

~ output of the sine wave oscillator, and storing the voltage on a

capacitor which is then buffered by an operational amplifier used as

a voltage follower.

The output of the ~1111 comparator (of Figure 15) is differentiated

by R2 and C2 to provide a narrow pulse width on the base of Q2. This

pulse occurs during the peak of theV1 output of the sine wave oscil­

lator. The FET switch Ql therefore turns on momentarily at the peak

of thev1 output adjusting the voltage on Cl until it is equal to the

v Rn.

, .... 2"""' -

HO

HO

HO

HOB

4 .....

....

-, .....

HG1

HG2

HG4

HG8 -·-'""

HP1

HP2

HP3

HP4

-----.... -------

012 R5

J.f 011

~r 010

J.~

as -:::1 ~

Q1 ,.,.. ~r- Q5

02 TT ~r 06

Q3 ,Jk,--'4r 07

04 -rlT ..1..,1. ' Q8

R1-R9 ARE 1.,.; R10,R11 ARE 5•!. Q1 - Q12 ARE 2N4391 's

...... ...... 12.5K

}~~ W' y,..

25K

R7 ... ...., ..... ..... 50K

R8 _.. ......... 100K

R1 .. 12.5K

R2 .. ~~ .... ,.,. 1'T

25K 1K

R3 C1 2200PF &A rl~ y,.

50K :~ R10 R4 2 ~ 1 .~3900 ...... - ".s ...

100K AR1 6 3()55,QI /

...2-+/4

V7 R11 =~ 1K

-=~ -io...-1...

+15 -15

Figure 31. X-Waveform Generator

50

--X

v R.--

1 .... vo vo vo Vo

2 .... -....... ·-8""" -

1""" -VG

VG2

VG4

VG8

v1

VP1

VP2

VP3

VP4

... -, .... -..... ·-....

....

;.,. -n. -.... -------

012 R5 £.&.A

-:l;rA-W' W' ..

12.5K a11 .. R~

~r 25K a10 R7

~f .. ' ... .... 50K

as .. Ra ....

-:1~ ....... 100K

01 .,JT ~1 -~~ 05

... 12.5K

a2 T 'r ... R¥ ... }!~ --:l.rL as "' 1K .. 25K

03 TT .. R.? ... C1 2200PF

.LrL ....... rl~ 07 50K JR10

04 TT R4 2 ~1 >3son ...... -A~ S S J..~ as

R1-RS ARE 1•/o; R10,R11 ARE 5•1. 01- 012 ARE 2N43S1's

y

100K

~

R11 ~ ._1K . -~

Figure ,2. Y-Wavetorm Generator

3055101/ + /4

V7 ___ .._ +15 -15

51

-~ y

R1 v1~----~~----~

1K

R2 4700 C2

BR o--1.,_.--4~~ 4700PF

2200PF

-15 +15

Figure 33· Reference Voltage Source

52

peak value of the sine wave. In this manner the reference voltage

tracks the peak value or the sine wave oscillator, compensating

for any changes in amplitude due to power supply variation, etc.

53

54

v. Discussion and Conclusions

The prototype character generator is shown in Figure 34 and the

symbols produced by the generator are shown in Figure 35. The symbols

show excellent readability and generally good appearance. The use of

curved line segments produces symbols with a pleasing and natural

shape. This contrasts sharply with the symbols produced by the dot

generator and the raster scan techniques. Complex symbols such as the

ampersand (&) and asterisk (*) are degraded in readability by the dot

matrix and raster scan generators, but the use of curved segments in

the curvilinear generator makes these characters quite legible.

The linear stroke generator produces characters of a better

quality than the dot generator or the raster scan, but those symbols

with curved segments are not reproduced as faithfully as in the curvi­

linear generator. In terms of character appearance and readability,

the curvilinear generator ranks highest.

A means of measuring the relative merit of character generators

is the beam utilization figure, which is defi.ned as the ratio of beam

ON time to total symbol generation time. The beam utilization figure

thus provides a measure of relative efficiency of the generation

technique. The average beam utilization for the 63 non-blarut char­

acters of the ASCII character set for four character generators is

given below:

Dot Matrix 35%

Raster Scan 35%

Linear Stroke 53%

Curvilinear Stroke 63%

The curvilinear stroke technique is therefore nearly twice aa effi-

55

Figure 34• Prototype Character Generator

!•ts7.&'<l•+,-./Ot2345&789:;<=>? fABGD£FGHIJKLKNePQRSTUVWXYZ[\]t+

!•ts7.&'<l•+,-./Ol2345&789:,<=>? fABGD£FGHIJKLMN6PQRSTUVWXYZ[\lt+

!•ts7.&'<>•+,-./0t2345&789:;<:>? fABGD£FGHIJKLMNePQRSTUVWXYZ[\lt+

! 8 #$7.& I () •+ ,_-. /0 l2345£> 789: i (:) 1 fABGD£FGHIJKLMN0PORSTUVWXYZ[\lt+

Figure 3.5· Curvilinear Character Display

56

c~ent as the dot matr~x or raster scan generators, and 10% more

eff~c~ent than the l~near stroke.

5?

The cost factor for each generator ~n terms or the requ~red b~ts

of storage per character ~s another means or comp~son. The dot ma­

tr~x and raster scan generators each require 35 b~ts or storage per

character. The l~near stroke generator requires 3 b~ts for the x

slope determinat~on and 3 b~ts for the y slope determinat~on and 1 b~t

for unblank~ng, for a total of ? b~ts per segment. A total or 20

segments ~s needed [4], thus requir~ng 140 bits of storage per char­

acter. F~nally the curv~linear character generator requires 8 segments

and 20 bits per segment for a total or 160 bits per character.

In conclus~on, the raster scan and dot matrix generators prov~de

the s~mplest and probably least expensive means of d~splay. However,

the character presentat~on leaves a great deal to be des~red, and

special symbols are not read~ly available because of the low reso­

lution of the matr~x. This can be improved by ~creas~ng the matr~x

s~ze, but this offsets the advantages of low storage and s~mple x and

y waveform generators. In add~t~on the character generation rate and

beam util~zation would suffer. Therefore where high resolution is

rsqu~red, tho curv~linear stroke character generator offers a signifi­

cant advantage. F~nally, the curvil~near generator has the best beam

ut~l~zat~on. Where a large number of characters are to be displayed,

the display br~ghtness depends on the beam ut~lization factor. More

eff~cient beam ut~l~zation means a br~ghter display.

58

REFERENCES

(1] Sherr, Solomon. Fundamentals of D~splay System Design. New York: Wiley-Interscience, 1970.

[2] Moore, J. Kenneth and Marvin Kronenberg. "Generating High-Quality Characters and Symbols," EJ,ectronics, Vol. 33, No. 24 (June 10, 1960), 55-59·

[3] Halsted, Charles. "Improving the Information Flow Rate Between Han and Machine," Jll..ectronic Indus~, Vol. 25, No. 4 (April, 1966), 62-66.

(4] Mosley, R. "An Industrial CRT Data Display," Industrial Electronics, Vol. 4, No. 7 (July, 1966), 323-327.

59

VITA

Lawrence Edward Hanebrink, Jr. was born on September 20, 1943,

in St. Louis, Missouri. He received his primary and secondary education

in St. Louis and Normandy, Missouri. He has received his college edu­

cation from the University of Missouri-Rolla, in Rolla, Missouri;

Southern Illinois University, Alton, Illinois; and Washington Univer­

sity, St. Louis, Missouri. At age 19 he received a Bachelor of Science

degree in Electrical Engineering from Washington University, in St.

Louis, Missouri, in June 1963.

lie has been employed by McDonnell Aircraft Company of St. Louis,

Missouri, since June 1966 and has been enrolled in the Graduate School

of the University of Missouri-Rolla, St. Louis Graduate Engineering

Center, since September 1967.

60

APPENDICES

APPENDIX A

Derivation of Sine Wave Oscillator Equations

The output voltages or the sine wave oscillator or Figure 7

may be expressed as

v1 +v3 :o

v2 +v4 =o

2 dV4 -v + =o RC 1 dt

61

(1)

(2)

(3)

(4)

Since R1 >>R, the coefficient multiplying v1 in equation (3) is small.

Therefore

Substituting in equation (4) gives

Therefore, equations (3) and (4) are now or the form:

1 where w='Rc·

dV3 dt = -2wV4

(5)

(6)

(7)

(8)

Differentiating equation (?) and substituting in equation (8) yields

(9)

The solution to this equation is of the rorm

V 3 • b sin2wt + c cos2wt ( 10)

62

This is demonstrated below

dV ~ = 2bw cos2wt - 2cw s:l.n2wt ( 11)

d~3 2 2 2 = -4bw sin2wt - 4cw sin2wt ( 12)

dt

The values of b and c are determined by the boundary conditions. At

t = 0 we let b = 0 and c = -v • Then equation (10) becomes z

Substituting in equation (7) gives

( 14)

( 15)

Substituting equations (15) and (16) in equations (1) and (2) yield

the desired result

V 1 = V zcos2wt ( 16)

v2 = Vzsin2wt ( 17)

v3 = -v zcos2wt ( 18)

V 4 = -v zsin2wt (19)

63

APPENDIX B

ASCII Standard Character Set

Character Address Code Character Address Code

(blank) 0100000 ft 1000000 I 0100001 A 1000001 II 0100010 B 1000010 # 0100011 c 1000011 s 0100100 D 1000100 % 0100101 E 1000101 & 0100110 F 1000110

0100111 G 1000111 ( 0101000 H 1001000 ) 0101001 I 1001001

* 0101010 J 1001010 + 0101011 K 1001011

• 0101100 L 1001100 0101101 M 1001101

• 0101110 N 1001110 I 0101111 0 1001111 0 0110000 p 1010000 1 0110001 Q 1010001 2 0110010 R 1010010 3 0110011 s 1010011 4 0110100 T 1010100 5 0110101 u 1010101 6 0110110 v 1010110 7 0110111 w 1010111 8 0111000 X 1011000 9 0111001 y 1011001 . 0111010 z 1011010 .

0111011 [ 1011011 < 0111100 \ 1011100

= 0111101 ] 1011101 > 0111110 ' 1011110 ? 0111111 - 1011111