telit uc864-e g wd e-dual hardware user guide r11

8/10/2019 Telit UC864-E G WD E-DUAL Hardware User Guide r11

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SPECIFICATIONS SUBJECT TO CHANGE WITHOUT NOTICE

NoticeWhile reasonable efforts have been made to assure the accuracy of this document, Telitassumes no liability resulting from any inaccuracies or omissions in this document, or fromuse of the information obtained herein. The information in this document has been carefullychecked and is believed to be entirely reliable. However, no responsibility is assumed forinaccuracies or omissions. Telit reserves the right to make changes to any products describedherein and reserves the right to revise this document and to make changes from time to timein content hereof with no obligation to notify any person of revisions or changes. Telit doesnot assume any liability arising out of the application or use of any product, software, orcircuit described herein; neither does it convey license under its patent rights or the rights ofothers.It is possible that this publication may contain references to, or information about Telit

products (machines and programs), programming, or services that are not announced in yourcountry. Such references or information must not be construed to mean that Telit intends toannounce such Telit products, programming, or services in your country.

CopyrightsThis instruction manual and the Telit products described in this instruction manual may be,include or describe copyrighted Telit material, such as computer programs stored insemiconductor memories or other media. Laws in the Italy and other countries preserve forTelit and its licensors certain exclusive rights for copyrighted material, including theexclusive right to copy, reproduce in any form, distribute and make derivative works of thecopyrighted material. Accordingly, any copyrighted material of Telit and its licensorscontained herein or in the Telit products described in this instruction manual may not becopied, reproduced, distributed, merged or modified in any manner without the expresswritten permission of Telit. Furthermore, the purchase of Telit products shall not be deemedto grant either directly or by implication, estoppel, or otherwise, any license under thecopyrights, patents or patent applications of Telit, as arises by operation of law in the sale of a

product.

Computer Software CopyrightsThe Telit and 3rd Party supplied Software (SW) products described in this instruction manual

may include copyrighted Telit and other 3rd Party supplied computer programs stored insemiconductor memories or other media. Laws in the Italy and other countries preserve forTelit and other 3rd Party supplied SW certain exclusive rights for copyrighted computer

programs, including the exclusive right to copy or reproduce in any form the copyrightedcomputer program. Accordingly, any copyrighted Telit or other 3rd Party supplied SWcomputer programs contained in the Telit products described in this instruction manual maynot be copied (reverse engineered) or reproduced in any manner without the express written

permission of Telit or the 3rd Party SW supplier. Furthermore, the purchase of Telit productsshall not be deemed to grant either directly or by implication, estoppel, or otherwise, anylicense under the copyrights, patents or patent applications of Telit or other 3rd Party suppliedSW, except for the normal non-exclusive, royalty free license to use that arises by operationof law in the sale of a product.


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Usage and Disclosure Restrictions

License AgreementsThe software described in this document is the property of Telit and its licensors. It isfurnished by express license agreement only and may be used only in accordance with theterms of such an agreement.

Copyrighted MaterialsSoftware and documentation are copyrighted materials. Making unauthorized copies is

prohibited by law. No part of the software or documentation may be reproduced, transmitted,transcribed, stored in a retrieval system, or translated into any language or computer language,in any form or by any means, without prior written permission of Telit

High Risk MaterialsComponents, units, or third-party products used in the product described herein are NOTfault-tolerant and are NOT designed, manufactured, or intended for use as on-line controlequipment in the following hazardous environments requiring fail-safe controls: the operationof Nuclear Facilities, Aircraft Navigation or Aircraft Communication Systems, Air TrafficControl, Life Support, or Weapons Systems (High Risk Activities"). Telit and its supplier(s)specifically disclaim any expressed or implied warranty of fitness for such High RiskActivities.

TrademarksTELIT and the Stylized T Logo are registered in Trademark Office. All other product or

service names are the property of their respective owners.

Copyright Telit Communications S.p.A. 2013.

.


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1. INTRODUCTION .................................................................................................................................................... 8

.................................................................................................................................................................. 8 ............................................................................................................................................................. 8

........................................................................................................................ 8 .................................................................................................................................... 8

.............................................................................................................................................. 9 ......................................................................................................................................... 10

........................................................................................................................................... 80

2. OVERVIEW .......................................................................................................................................................... 11 ............................................................................................................ 12

3. MECHANICAL DIMENSIONS ................................................................................................................................ 13

.................................................................................................................. 13

.................................................................................................................. 14 ............................................................................................... 15

4. UC864 MODULE CONNECTIONS .......................................................................................................................... 16

........................................................................................................................................................... 16 .................................................................................................................................... 20

5. HARDWARE COMMANDS ................................................................................................................................... 21

.................................................................................................................................... 21 ................................................................................................................ 21

.................................................................................................................................. 23 ........................................................................................................ 24

................................................................................................ 26

6. POWER SUPPLY .................................................................................................................................................. 27

......................................................................................................................... 27 ............................................................................................................................ 29

.................................................................................................................................... 29

............................................................................................................... 29 6.3.1.1. + 5V Input Source Power Supply Design Guidelines ................... ...................... ...................... ...................... ......... 30 6.3.1.2. + 12V Input Source Power Supply Design Guidelines ............................................................................................ 30 6.3.1.3. Battery Source Power Supply Design Guidelines ................................................................................................... 33 6.3.1.4. Battery Charge Control Circuitry Design Guidelines .............................................................................................. 33

................................................................................................................. 35 ................................................................................................ 36

7. ANTENNA(S) ....................................................................................................................................................... 38

.......................................................................................................... 38 ....................................................................................... 39

............................................................................................... 39


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........................................................................... 40

8. LOGIC LEVEL SPECIFICATIONS ............................................................................................................................. 42

.................................................................................................................................................... 43

9. SERIAL PORTS ..................................................................................................................................................... 44

.......................................................................................................................................... 44 .............................................................................................................................. 46

........................................................................................................................... 49

10. USB PORT ....................................................................................................................................................... 51

..................................................................................................................... 52

11.

AUDIO SECTION .............................................................................................................................................. 53

................................................................................................................................................ 53 ............................................................................................................................ 55

.................................................................................... 55 .............................................................................................................................. 55

............................................................................................................... 56

12. GENERAL PURPOSE I/O .................................................................................................................................. 57

............................................................................................................................. 58 .............................................................................................................................. 59

........................................................................................................................... 59 .................................................................................................. 60

.............................................................................................................. 60 ..................................................................................................................... 60 .................................................................................................................... 60

............................................................................................................................. 62 .................................................................................................................................. 62

.............................................................................................................................. 62 ....................................................................................................................... 63

.................................................................................................................. 63 ................................................................................................... 64

.................................................................................................................................. 64 ......................................................................................................................................... 64

............................................................................................. 65 ........................................................................................................................................... 65

................................................................................................................................. 66

13. DAC AND ADC SECTION .................................................................................................................................. 67

................................................................................................................................................ 67 ............................................................................................................................................. 67

.......................................................................................................................................... 67 ..................................................................................................................... 68

................................................................................................................................................ 68 ............................................................................................................................................. 68


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............................................................................................................................ 68 ..................................................................................................................... 69

......................................................................................................... 69 ................................................................................. 70

......................................................................................... 71 ................................................................................................................................................ 72

14. APPLICATION GUIDES ..................................................................................................................................... 73

............................................................................................................. 73 .................................................................................................................................................. 73

............................................................................................................................................... 74 ....................................................................................................... 74 ....................................................................................................... 75

................................................................................................... 76

15. CONFORMITY ASSESSMENT ISSUES ................................................................................................................ 77

16. SAFETY RECOMMENDATIONS ........................................................................................................................ 79


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The aim of this document is the description of some hardware solutions useful for developinga product with the . All the features and solutionsdetailed are applicable to all UC864 family, whereas family is intended the modules listedin the applicability table.

When a specific feature is applicable to a specific product, it will be clearly highlighted.

This document is intended for Telit customers, who are integrators, about to implement theirapplications using our UC864-E/G/WD/E-DUAL modules.

For general contact, technical support, to report documentation errors and to order manuals,contact Telits Technical Support Center (TTSC) at:

[email protected] [email protected]@telit.com

[email protected] Alternatively, use:

http://www.telit.com/en/products/technical-support-center/contact.php

For detailed information about where you can buy the Telit modules or for recommendationson accessories and components visit:

http://www.telit.com

To register for product news and announcements or for product questions contact TelitsTechnical Support Center (TTSC).

Our aim is to make this guide as helpful as possible. Keep us informed of your comments andsuggestions for improvements.Telit appreciates feedback from the users of our information.

This document contains the following chapters:
mailto:[email protected]:[email protected]:[email protected]:[email protected]:[email protected]:[email protected]://www.telit.com/en/products/technical-support-center/contact.phphttp://www.telit.com/en/products/technical-support-center/contact.phphttp://www.telit.com/http://www.telit.com/http://www.telit.com/http://www.telit.com/en/products/technical-support-center/contact.phpmailto:[email protected]:[email protected]:[email protected]:[email protected]


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Chapter 1: Introduction provides a scope for this document, target audience, contact andsupport information, and text conventions.

Chapter 2: Overview provides an overview of the document.

Chapter 3: Mechanical Dimensions deals with the layout.

Chapter 4: UC864 -E/G/WD/E-Dual Module Connections

Chapter 5: Hardware Commands How to control the module via hardware

Chapter 6:.. Power Supply deals on supply and consumption.

Chapter 7: Antenna The antenna connection and board layout design are the most important parts in the full product design

Chapter 8: Logic Level specifications Specific values adopted in the implementation oflogic levels for this module.

Chapter 9: Serial ports The serial port on the Telit UC864-E/G/WD/E-Dual is the core ofthe interface between the module and OEM hardware

Chapter 10: USB Port

Chapter 11 : Audio Section Refers to the audio blocks and electrical characteristics of theBase Band Chip .

Chapter 12 : General Purpose I/O How the general purpose I/O pads can be configured.

Chapter 13 DAC and ADC Section Deals with these two kind of converters.

Chapter 14 : Application Guides

Chapter 15: Conformity Assessments

Chapter 15: Safety Recommendations

Danger Thi s in for mation M UST be followed or catastrophic equipment fail ur e or bodilyinj ury may occur.


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Caution or War nin g Alerts the user to important points about integrating th e module, ifthese point s are not foll owed, the modul e and end user equipment may fail or mal function.

Tip or Information Provides advice and suggestions that may be useful whenintegrating the module.

All dates are in ISO 8601 format, i.e. YYYY-MM-DD.

UC864-E/G/WD/E-DUAL Product Description, 80281ST10034a

UC864 Audio settings application note , 80000NT10025a

Digital voice Interface Application Note, 80000NT10027a

SIM Holder Design Guides, 80000NT10001a

UC864-E/G/WD/E-DUAL AT Commands Reference Guide, 80000ST10041a


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The aim of this document is the description of some hardware solutions useful for developinga product with the Telit UC864 Family module.

In this document all the basic functions of a mobile phone will be taken into account; for eachone of them a proper hardware solution will be suggested and eventually the wrong solutionsand common errors to be avoided will be evidenced. Obviously this document cannotembrace the whole hardware solutions and products that may be designed. The wrongsolutions to be avoided must be considered as mandatory, while the suggested hardwareconfigurations must not be considered mandatory, instead the information given must be usedas a guide and a starting point for properly developing your product with the Telit UC864Family module.

NOTICE:

The integration of the GSM/GPRS/EGPRS/WCDMA/HSDPA UC864-E/G/WD/E-DUALcellular module within user application must be done according to the design rules describedin this manual.

The information presented in this document is believed to be accurate and reliable. However,no responsibility is assumed by Telit Communication S.p.A. for its use, such as any

infringement of patents or other rights of third parties which may result from its use. Nolicense is granted by implication or otherwise under any patent rights of Telit CommunicationS.p.A. other than for circuitry embodied in Telit products. This document is subject to changewithout notice.


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ITEMFEATURE

UC864-E UC864-G UC864-E-DUAL UC864-WD

Airinterface

Single-BandUMTS/HSDPA2100MHz

Quad-Band GSM850/900/1800/1900

Tri-bandUMTS/HSDPA2100/1900/850

Quad-Band GSM850/900/1800/1900

Standalone GPS

Dual-bandUMTS/HSDPA2100 /900

Dual-Band GSM900/1800

Data only Dual-band

UMTS2100 /900

Dual-Band GSM900/1800

Size 36.2(L)X30(W)X4.8(T) 45(L)X30(W)X4.8(T)

Data Service

HSDPA UL 384kbps, DL 7.2MbpsWCDMA UL/DL 384kbps,EDGE UL/,DL 236.8Kbps,GPRS UL/DL 85.6 Kbps, CSD 9.6Kbps

WCDMA UL/DL384kbps,EDGE UL/,DL236.8Kbps,GPRSUL/DL 85.6 Kbps,CSD 9.6Kbps

Interface USB 2.0(AT command etc), 80 Pin Board to Board connector, SIM/RF connector

Antenna External Antenna

Memory 64MB SDRAM and 64MB Flash memory

Voice Vocoder- GSM(FR/EFR/AMR) and UMTS(Static/Dynamic AMR) Supplementary Service

Message SMS (MO/MT)

SIM Card Support 1.8 and 3V UICC

Security

GPRS- Ciphering(GEA1/GEA2), Encryption(A5/1, A5/2), Authentication(PAP/CHAP)

UMTS- Encryption(UEA1), integrity UIA IMEI Security, SIM lock

InternetProtocols

TCP/IP, UDP/IP, PPP protocol, V42Bis data compression

Applications

SVD(Simultaneous Voice and Data) SIM PBM(Phone Book Management) FOTA (firmware Over The Air) FDN dialing number Service dialing number Enhanced operator name string


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The Telit UC864-E module overall dimensions are:

Length: 36.2 mm

Width: 30 mm

Thickness: 4.8mm


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The Telit UC864-G module overall dimensions are:

Length: 45 mm

Width: 30 mm

Thickness: 4.8mm


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The Telit UC864-WD/E-DUAL module overall dimensions are:

Length: 45 mm

Width: 30 mm

Thickness: 4.8mm


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UC864 Family uses an 80 pin Molex p.n. 53949-0878 male connector for the connectionswith the external applications.This connector matches the 54150-0878 models.

Pin Signal I/O FunctionInternalPull up

TypeUC864-

E/G/WD/

E-DUALPower Supply

1 VBATT - Main power supply Power2 VBATT - Main power supply Power3 VBATT - Main power supply Power4 VBATT - Main power supply Power5 GND - Ground Power6 GND - Ground Power7 GND - Ground Power

Audio

8 AXE I Hands-free switching CMOS2.6V9 EAR_HF+ AO Headset ear output, phase + Audio

10 EAR_HF- AO Headset ear output, phase - Audio11 EAR_MT+ AO Handset ear signal output, phase + Audio12 EAR_MT- AO Handset ear signal output, phase - Audio13 MIC_HF+ AI Headset microphone input; phase + Audio14 MIC_HF- AI Headset microphone input; phase - Audio15 MIC_MT+ AI Handset microphone signal input; phase+ Audio16 MIC_MT- AI Handset microphone signal input; phase- Audio

SIM Card Interface18 1 SIMVCC - External SIM signal Power supply for the SIM 1.8 / 3V19 SIMRST O External SIM signal Reset 1.8 / 3V20 SIMIO I/O External SIM signal - Data I/O 1.8 / 3V21 SIMIN I External SIM signal - Presence (active low) 1.8 / 3V22 SIMCLK O External SIM signal Clock 1.8 / 3V

Trace


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Pin Signal I/O Function InternalPull up

TypeUC864-

E/G/WD/E-DUAL

23 RX_TRACE I RX Data for debug monitorCMOS2.6V

24 TX_TRACE O TX Data for debug monitorCMOS2.6V

Prog. / Data + Hw Flow Control

25 C103/TXD I Serial data input (TXD) from DTE CMOS2.6V

26 C104/RXD O Serial data output to DTE CMOS

2.6V27 C107/DSR O Output for Data set ready signal (DSR) to DTE

CMOS2.6V

28 C106/CTS O Output for Clear to send signal (CTS) to DTECMOS2.6V

29 C108/DTR IInput for Data terminal ready signal (DTR) fromDTE

CMOS2.6V

30 C125/RING O Output for Ring indicator signal (RI) to DTECMOS2.6V

31 C105/RTS I Input for Request to send signal (RTS) from DTECMOS2.6V

32 C109/DCD O Output for Data carrier detect signal (DCD) to DTECMOS2.6V

Miscellaneous Functions

35 USB_ID AI

Analog input used to sense whether a peripheral device is connected, anddetermine the peripheral type, a hostor a peripheral

Analog

36 PCM_CLOCK I/O PCM clock outCMOS2.6V

DAC and ADC37 ADC_IN1 AI Analog/Digital converter input A/D

38 ADC_IN2 AI Analog/Digital converter input A/D39 ADC_IN3 AI Analog/Digital converter input A/D40 DAC_OUT AO Digital/Analog converter output D/A

Miscellaneous Functions

45 STAT_LED O Status indicator led CMOS1.8V46 GND - Ground Ground

48 USB_VBUSAI/AO

Power supply for the internal USB transceiver. This pin is configured as an analog input or an analogoutput depending upon the type of peripheral deviceconnected.

47K pull-down

4.4V~5.25V


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TypeUC864-

E/G/WD/E-DUAL

49 PWRMON O Power ON Monitor 1K CMOS2.6V

50 VAUX1 - Power output for external accessories51 CHARGE AI Charger input 10K

pull-down

Power

52 CHARGE AI Charger input Power

53 ON/OFF I

Input command for switching power ON or OFF(toggle command). The pulse to be sent to the

UC864 Family must be equal or greater than 1second.

Pulled up

on chip

54 RESET I Reset input 10K 55 VRTC AO VRTC Backup capacitor Power

Telit GPIOs

56 TGPIO_19 I/O Telit GPIO19 Configurable GPIOCMOS2.6V



59 TGPIO_04 I/O Telit GPIO4 Configurable GPIO CMOS2.6V




63TGPIO_10/PCM_TX I/O

Telit GPIO10 Configurable GPIO / PCM DataOutput

CMOS2.6V

64 TGPIO_22 I/O Telit GPIO22 Configurable GPIO CMOS

1.8V65

TGPIO_18/PCM_RX I/O Telit GPIO18 Configurable GPIO / PCM Data input

CMOS2.6V



68TGPIO_06 /ALARM I/O Telit GPIO6 Configurable GPIO / ALARM

CMOS2.6V



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TypeUC864-

E/G/WD/E-DUAL

71TGPIO_17/PCM_SYNC I/O Telit GPIO17 Configurable GPIO / PCM Sync

CMOS2.6V


73TGPIO_07/BUZZER I/O Telit GPIO7 Configurable GPIO / Buzzer

CMOS2.6V

74 TGPIO_02 I/O Telit GPIO02 I/O pinCMOS2.6V



77 TGPIO_13 I/O Telit GPIO13 ConfigurableCMOS2.6V

78TGPIO_05/RFTXMON I/O

Telit GPIO05 Configurable GPIO / Transmitter ONmonitor

CMOS2.6V

USB Interface

79 USB_D+ I/O USB differential Data (+)3.0V

~3.6V

80 USB_D- I/O USB differential Data (-)3.0V

~3.6VRESERVED

17 -333441 -42 -43 -44 -

47 -69 -


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Pin Signal Function1 VBATT Main power supply

2 VBATT Main power supply3 VBATT Main power supply4 VBATT Main power supply5 GND Ground6 GND Ground7 GND Ground

46 GND Ground25 C103/TXD Serial data input (TXD) from DTE26 C104/RXD Serial data output to DTE31 C105/RTS Input for Request to send signal (RTS) from DTE

53 ON/OFF Input command for switching power ON or OFF(toggle command).54 RESET Reset input

The UC864-E/G/WD/E-DUAL module is equipped with a 50 Ohm RF connector fromMurata, GSC type P/N MM9329-2700B for GSM/WCDMA antenna connection. Thisconnector is located on front side next to 80 pin Molex connector.

The counterpart suitable is Murata MXTK92 Type or MXTK88 Type.

The UC864-G module is also equipped with an additional 50 Ohm RF connector fromMurata, GSC type P/N MM9329-2700B for GPS antenna connection. This connector islocated on the rear side.

The counterpart suitable is a Murata MXTK92 Type or MXTK88 Type.


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To turn on UC864-E/G/WD/E-DUAL, the pad ON# must be tied low for at least 1 second andthen released.

The maximum current that can be drained from the ON# pad is 0.1 mA.

A simple circuit to do it is:

NOTE:

In order to avoid a back powering effect it is recommended to avoid having any HIGH logiclevel signal applied to the digital pins of the module when is powered OFF or during anON/OFF transition.

Upon turning on UC864 family, UC864 family is not activated yet because the boot sequenceof UC864 family is still going on internally. It takes about 10 seconds to complete theinitializing the module internally.

For this reason, it would be useless to try to access UC864 family during a Initialization stateas below. To get the desirable stability, UC864 family needs at least 10 seconds after thePWRMON goes High.


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During the , any kind of AT-command is not available. DTE must bewaiting for the to communicate with UC864 family.

NOTE:

To check if the UC864 family has powered on, the hardware line PWRMON must bemonitored. When PWRMON goes high, the module has powered on.

NOTE:

Do not use any pull up resistor on the ON# line, it is internally pulled up. Using pull up

resistor may bring to latch up problems on the UC864 family power regulator and improper power on/off of the module. The line ON# must be connected only in open collectorconfiguration.

NOTE:

In this document all the lines are inverted. Active low signals are labeled with a name thatends with a "#" or with a bar over the name.

NOTE:

UC864 family turns fully on also by supplying power to the Charge pad (provided there is a battery on the VBATT pads).

NOTE:

UC864-E version also turns fully on by supplying power to the USB_VBUS pin (providedthere is a battery on the VBATT pads). Care must be taken to avoid supplying power to theUSB_VBUS pin before the module turns on. To check if the UC864-E has powered on, thehardware line PWRMON must be monitored. When PWRMON goes high, the module has

powered on.


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NOTE:

To turn OFF UC864-E version, first of all, you MUST cut off the supplying power to theUSB_VBUS, or the module does not turn off.

TIP:

To check if the device has powered off, hardware line PWRMON must be monitored. WhenPWRMON goes low, the device has powered off.

NOTE:


WARNING:

The hardware unconditional Restart must not be used during normal operation of the device

since it does not detach the device from the network. It shall be kept as an emergency exit procedure to be done in the rare case that the device gets stacked waiting for some network orSIM responses.

To unconditionally restart UC864 Family, the pad RESET# must be tied low for at least 200milliseconds and then released.


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A simple circuit to do it is:

NOTE:

Do not use any pull up resistor on the RESET# line or any totem pole digital output. Using pull up resistor may bring to latch up problems on the UC864 family power regulator andimproper functioning of the module. The line RESET# must be connected only in opencollector configuration

T IP:

The unconditional hardware Restart must always be implemented on the boards and thesoftware must use it as an emergency exit procedure.

For example:

1- Let us assume you need to drive the RESET# pad with a totem pole output of a +1.8/5 Vmicrocontroller (uP_OUT2):


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Below chart describes the overall sequences for Turning ON and OFF.


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The power supply circuitry and board layout are a very important part in the full productdesign and they strongly reflect on the product overall performances. Read carefully therequirements and the guidelines that will follow for a proper design.

The UC864 Family power requirements are:

Power Supply Nominal Supply Voltage 3.8VMax Supply Voltage 4.2VSupply Voltage Range 3.4V 4.2V

UC864-E/G/WD/E-DUALMode Average(mA) Mode Description

IDLE mode with GPS OFF Standby mode; no call in progress; GPS OFF (in UC864-G)

AT+CFUN=1WCDMA 22.0

Normal mode; full functionality of the moduleGSM 15.0

AT+CFUN=4WCDMA 17.8 Disabled TX and RX; modules is not registered on the

networkGSM 17.8

AT+CFUN=0 orAT+CFUN=5

WCDMA 4.1 / 1.3*Power saving; CFUN=0 module registered on thenetwork and can receive voice call or an SMS; but it isnot possible to send AT commands; module wakes up withan unsolicited code (call or SMS) or rising RTS line.CFN=5 full functionality with power saving;Module registered on the network can receiveincoming call sand SMS

GSM 3.3 / 1.3*

WCDMA TX and RX mode with GPS OFF GPS OFF in UC864-GWCDMA Voice 690 WCDMA voice channelWCDMA data 680 WCDMA data channel

HSDPA 730 HSDPA data channel (HSDPA for UC864-E/G/E-Dualonly)GSM TX and RX mode with GPS OFF GPS OFF in UC864-G

GSM Voice 320 GSM voice channelGPRS Class12 790 GPRS data channelEDGE Class12 560 EDGE data channel

* Worst/best case depends on network configuration and is not under module control.


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NOTE:

UC864-E version cannot be put in saving mode if USB_VBUS is connected, first of all, youMUST cut off the supplying power to the USB_VBUS, or the module will not go in powersaving mode.

UC864-G onlyMode Average(mA) Mode Description

IDLE mode with GPS ON full power mode*

Standby mode; no call in progress; GPS ONAT+CFUN=1

WCDMA 117GSM 113

AT+CFUN=4WCDMA 109

GSM 109WCDMA TX and RX mode with GPS ON full

power mode*WCDMA Voice 785 WCDMA voice channel

WCDMA 775 WCDMA data channelHSDPA 825 HSDPA data channel

GSM TX and RX mode with GPS ON full powermode*

GSM Voice 410 GSM voice channelGPRS Class12 880 GPRS data channelEDGE Class12 650 EDGE data channel

* except external active GPS antenna

TIP:

The electrical design for the Power supply must be made ensuring that it will be capable of a peak current output of at least 2A.

In GSM/GPRS mode, RF transmission is not continuous and it is packed into bursts at a basefrequency of about 216 Hz, and the relative current peaks can be as high as about 2A.Therefore the power supply has to be designed in order to withstand these current peakswithout big voltage drops; this means that both the electrical design and the board layout must

be designed for this current flow. If the layout of the PCB is not well designed, a strong noisefloor is generated on the ground; this will reflect on all the audio paths producing an audibleannoying noise at 216 Hz; if the voltage drops during the peak, current absorption is toomuch. The device may even shut down as a consequence of the supply voltage drop.


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The battery charger is suited for 3.7V Li-Ion rechargeable battery (suggested capacity 500-1000mAH). The Charger needs only a CURRENT LIMITED power source input and chargesthe battery directly through VBATT connector pins.

Battery charger input pin CHARGE

Battery pins VBATT, GND

Battery charger input voltage min 5.0 V

Battery charger input voltage typ 5.5 V

Battery charger input voltage max 7.0 V

Battery charger input current max 400mA

Battery type Li-Ion rechargeable

WARNING :

If embodied battery charger is used, then a LOW ESR capacitor of at least 100

WARNING:

When power is supplied to the CHARGE pin, a battery must always be connected to theVBATT pin of the UC864 family.

The principal guidelines for the Power Supply Design embrace three different design steps: the electrical design

the thermal design

the PCB layout

The electrical design of the power supply depends strongly on the power source where this power is drained. We will distinguish them into three categories:


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+5V input (typically PC internal regulator output)

+12V input (typically automotive)

battery

7.3.1.1. + 5V Input Source Power Supply Design Guidelines

The desired output for the power supply is 3.8V, hence there is not a bigdifference between the input source and the desired output and a linear regulatorcan be used. A switching power supply will not be suited because of the lowdrop-out requirements.

When using a linear regulator, a proper heat sink must be provided in order to

dissipate the power generated. A Bypass low ESR capacitor of adequate capacity must be provided in order to

cut the current absorption peaks close to , a 100 Ftantalum capacitor is usually suited.

Make sure the low ESR capacitor on the power supply output (usually a tantalumone) is rated at least 10V.

A protection diode must be inserted close to the power input, in order to saveUC864 Family from power polarity inversion.

7.3.1.2. + 12V Input Source Power Supply Design Guidelines

The desired output for the power supply is 3.8V, hence due to the big difference between the input source and the desired output, a linear regulator is not suitedand must not be used. A switching power supply will be preferable because of its

better efficiency especially with the 2A peak current load represented by UC864Family


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When using a switching regulator, a 500kHz or more switching frequencyregulator is preferable because of its smaller inductor size and its faster transientresponse. This allows the regulator to respond quickly to the current peaksabsorption.

In any case, the frequency and Switching design selection is related to theapplication to be developed due to the fact the switching frequency could alsogenerate EMC interferences.

For car PB battery the input voltage can rise up to 15.8V and this must be kept inmind when choosing components: all components in the power supply mustwithstand this voltage.

A Bypass low ESR capacitor of adequate capacity must be provided in order tocut the current absorption peaks. A 100 F tantalum capacitor is usually suited forthis.

Make sure the low ESR capacitor on the power supply output (usually a tantalumone) is rated at least 10V.

For Car applications a spike protection diode must be inserted close to the powerinput, in order to clean the supply from spikes.

A protection diode must be inserted close to the power input, in order to saveUC864 Family from power polarity inversion. This can be the same diode as forspike protection.

An example of switching regulator with 12V input is in the below schematic (it is split in 2 parts):


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7.3.1.3. Battery Source Power Supply Design Guidelines

The desired nominal output for the power supply is 3.8V and the maximumallowed voltage is 4.2V, hence a single 3.7V Li-Ion cell battery type is suited forsupplying the power to the Telit UC864 Family module. The three cells Ni/Cd or

Ni/MH 3.6 V Nom. battery types or 4V PB types must not be used directly sincetheir maximum voltage can rise over the absolute maximum voltage for UC864Family and damage it.

NOTE:

Do not use any Ni-Cd, Ni-MH, and Pb battery types directly connected with UC864 FamilyTheir use can lead to overvoltage on UC864 Family and damage it. Use only Li-Ion batterytypes.

A Bypass low ESR capacitor of adequate capacity must be provided in order tocut the current absorption peaks, a 100 F tantalum capacitor is usually suited.

Make sure the low ESR capacitor (usually a tantalum one) is rated at least 10V.

A protection diode must be inserted close to the power input, in order to saveUC864 Family from power polarity inversion. Otherwise the battery connectormust be done in a way to avoid polarity inversions when connecting the battery.

The battery capacity must be at least 500mAh in order to withstand the current peaks of 2A; the suggested capacity is from 500mAh to 1000mAh.

7.3.1.4. Battery Charge Control Circuitry Design Guidelines

The charging process for Li-Ion Batteries can be divided into 4 phases:

qualification and trickle charging

fast charge 1 - constant current

final charge - constant voltage or pulsed charging

maintenance charge

The qualification process consists of a battery voltage measure, indicating roughly its chargestatus. If the battery is deeply discharged, meaning its voltage is lower than the tricklecharging threshold, then charging must start slowly, possibly with a current limited to the pre-charging process. The current must be kept very low with respect to the fast charge value.

During trickle charging the voltage across the battery terminals rises; when it reaches the fastcharge threshold level the charging process goes into a fast charge phase.

During the fast charge phase the process proceeds with a current limited for charging; thiscurrent limit depends on the required time for completing the charge and on battery packcapacity. During this phase the voltage across the battery terminals still raises but at a lowerrate. Once the battery voltage reaches its maximum voltage the process goes into its third


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state: Final charging. The voltage measure to change the process status into final charge isvery important. It must be ensured that the maximum battery voltage is never exceeded,otherwise the battery may be damaged and even explode.

Moreover, for constant final chargers, the voltage phase (final charge) must not start beforethe battery voltage has reached its maximum value, otherwise the battery capacity will beslightly reduced. The final charge can be of two different types: constant voltage or pulsed.UC864 Family uses constant voltage.

The constant voltage charge proceeds with a fixed voltage regulator (very accurately set to themaximum battery voltage) and the current will decrease while the battery is becomingcharged. When the charging current falls below a certain fraction of the fast charge currentvalue, the battery is considered fully charged, the final charge stops and eventually starts themaintenance.

The pulsed charge process has no voltage regulation, instead charge continues with pulses.Usually the pulse charge works in the following manner: the charge is stopped for some time,let us say few hundreds of ms, then the battery voltage will be measured and when it drops

below its maximum value, a fixed time length charging pulse is issued. As the batteryapproaches its full charge, the off time will become longer and the duty-cycle of the pulseswill decrease. The battery is considered fully charged when the pulse duty-cycle is less than athreshold value, typically 10%. When this happens, the pulse charge stops and eventually themaintenance starts.

The last phase is not properly a charging phase, since the battery at this point is fully chargedand the process may stop after the final charge. The maintenance charge provides an

additional charging process to compensate the charge leak typical of a Li-Ion battery. It isdone by issuing pulses with a fixed time length, again few hundreds of ms, and a duty-cyclearound 5% or less.

This last phase is not implemented in the UC864 Family internal charging algorithm so once-charged battery is left discharging down to a certain threshold. It is cycled from full charge toslight discharge even if the battery charger is inserted. This guarantees that the remainingcharge in the battery is a good percentage and that the battery is not damaged by keeping italways fully charged (Li-Ion rechargeable batteries usually deteriorate when kept fullycharged).

Last but not least, in some applications, it is highly desired that the charging process restartswhen the battery is discharged and its voltage drops below a certain threshold. This is typical

for the UC864 Family internal charger.As you can see, the charging process is not a trivial task to do; moreover all these operationsmust start only if battery temperature is inside charging range, usually 5 C - 45 C.

The UC864 Family measures the temperature of its internal component in order to satisfy thislast requirement. This not exactly the same as the battery temperature but in common use, thetwo temperatures must not differ too much and the charging temperature range must beguaranteed.


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NOTE:

For all the threshold voltages, inside UC864-E/G/WD/E-DUAL, all thresholds are fixed inorder to maximize Li-Ion battery performances and do not need to be changed.

NOTE:

In this application the battery charger input current must be limited to less than 400mA. Thiscan be done by using a current limited wall adapter as the powersource.

NOTE:

When starting the charger from Module powered off, the startup will be in CFUN4; toactivate the normal mode a command AT+CFUN=1 has to be provided.

There is also the possibility to activate the normal mode using the ON_OFF* signal.

In this case, when HW powering off the module with the same line (ON_OFF*) and havingthe charger still connected, the module will go back to CFUN4.

NOTE:

It is important to have a 100 F Capacitor to VBAT in order to avoid instability of the chargercircuit if the battery is accidentally disconnected during the charging activity.

The thermal design for the power supply heat sink must be done with the followingspecifications:

Average current consumption during HSDPA transmission @PWR level max inUC864-E/G/E-DUAL : 730mA

Average current consumption during class12 GPRS transmission @PWR levelmax: 790mA

Average GPS current during GPS ON (Power Saving disabled) in UC864-G :110mA

NOTE:

The average consumption during transmissions depends on the power level at which thedevice is requested to transmit via the network. The average current consumption hence variessignificantly.

NOTE:

The thermal design for the Power supply must be made keeping an average consumption atthe max transmitting level during calls of 790mA rms plus 90mA rms for GPS in trackingmode in UC864-G.

Considering the very low current during idle, especially if Power Saving function is enabled,


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it is possible to consider from the thermal point of view that the device absorbs currentsignificantly only during calls.

If we assume that the device stays in transmission for short periods of time (let us say fewminutes) and then remains for quite a long time in idle (let us say one hour), then the powersupply has always the time to cool down between the calls and the heat sink could be smallerthan the calculated for 790mA maximum RMS current. There could even be a simple chip

package (no heat sink).

Moreover in average network conditions the device is requested to transmit at a lower powerlevel than the maximum and hence the current consumption will be less than 790mA (beingusually around 150mA).

For these reasons the thermal design is rarely a concern and the simple ground plane where

the power supply chip is placed can be enough to ensure a good thermal condition and avoidoverheating.

For the heat generated by the UC864-E/G/WD/E-DUAL, you can consider it to be duringtransmission 1W max during CSD/VOICE calls and 2W max during class12 GPRS upload.This generated heat will be mostly conducted to the ground plane under the UC864-E/G/WD/E-DUAL; you must ensure that your application can dissipate heat

In the WCDMA/HSDPA mode(HSDPA not available in UC864-WD), since UC864 Familyemits RF signals continuously during transmission, you must pay special attention how todissipate the heat generated.

The current consumption will be up to about 730mA in HSDPA (680mA inWCDMA/WEDGE) continuously at the maximum TX output power (23dBm). Thus, youmust arrange the PCB area as large as possible under UC864 Family which you will mount.You must mount UC864-E/G/WD/E-DUAL on the large ground area of your application

board and make many ground vias to dissipate the heat.

The peak current consumption in the GSM mode is higher than that in WCDMA. However,considering the heat sink is more important in case of WCDMA.

As mentioned before, a GSM signal is bursty, thus, the temperature drift is more insensiblethan WCDMA. Consequently, if you prescribe the heat dissipation in the WCDMA mode,you don t need to think more about the GSM mode.

As seen in the electrical design guidelines, the power supply must have a low ESR capacitoron the output to cut the current peaks and a protection diode on the input to protect the supplyfrom spikes and polarity inversion. The placement of these components is crucial for thecorrect working of the circuitry. A misplaced component can be useless or can even decreasethe power supply performances.

The Bypass low ESR capacitor must be placed close to the Telit UC864 Family power input pads, or in the case the power supply is a switching type, it can be placed close to the inductor to cut the ripple if the PCB trace from the capacitor toUC864 Family is wide enough to ensure a drop-less connection even during the2A current peaks.


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The protection diode must be placed close to the input connector where the powersource is drained.

The PCB traces from the input connector to the power regulator. IC must be wideenough to ensure no voltage drops to occur when the 2A current peaks areabsorbed. Note that this is not made in order to save power loss but especially toavoid the voltage drops on the power line at the current peaks frequency of 216Hz that will reflect on all the components connected to that supply (alsointroducing the noise floor at the burst base frequency.) For this reason while avoltage drop of 300-400 mV may be acceptable from the power loss point ofview, the same voltage drop may not be acceptable from the noise point of view.If your application does not have audio interface but only uses the data feature ofthe Telit UC864-E/G/WD/E-DUAL, then this noise is not so disturbing and

power supply layout design can be more forgiving. The PCB traces to UC864 Family and the Bypass capacitor must be wide enough

to ensure no significant voltage drops to occur when the 2A current peaks areabsorbed. This is a must for the same above-mentioned reasons. Try to keep thistrace as short as possible.

The PCB traces connecting the Switching output to the inductor and theswitching diode must be kept as short as possible by placing the inductor and thediode very close to the power switching IC (only for switching power supply).This is done in order to reduce the radiated field (noise) at the switchingfrequency (usually 100-500 kHz).

The use of a good common ground plane is suggested. The placement of the power supply on the board must be done in a way to

guarantee that the high current return paths in the ground plane are notoverlapped to any noise sensitive circuitry as the microphone amplifier/buffer orearphone amplifier.

The power supply input cables must be kept separately from noise sensitive linessuch as microphone/earphone cables.


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The antenna connection and board layout design are the most important parts in the full product design and they strongly reflect on the product s overall performances. Read carefullyand follow the requirements and the guidelines for a proper design.

As suggested on the Product Description, the antenna for a Telit UC864 Family device mustfulfill the following requirements:

Furthermore if the device is developed for the US and/or Canada market, it must comply tothe FCC and/or IC approval requirements:

This device is to be used only for mobile and fixed application. The antenna(s) used for thistransmitter must be installed to provide a separation distance of at least 20 cm from all

persons and must not be co-located or operating in conjunction with any other antenna ortransmitter. End-Users must be provided with transmitter operation conditions for satisfying

RF exposure compliance. OEM integrators must ensure that the end user has no manualinstructions to remove or install the UC864-E/G/WD /E-DUAL module . Antennas used forthis OEM module must not exceed 3dBi gain for mobile and fixed operating configurations.

GSM / WCDMA Antenna RequirementsFrequency range

Depending by frequency band(s) provided by the network operator, the customermust use the most suitable antenna for that/those band(s)

Bandwidth

UC864-E UC864-G UC864-WD/E-DUAL

70 MHz in GSM850,80 MHz in GSM900,170 MHz in DCS &140 MHz PCS250 MHz inWCDMA2100 band

70 MHz in GSM850, 80MHz in GSM900, 170MHz in DCS & 140 MHzPCS70 MHZ in WCDMA850,140 MHz inWCDMA1900,& 250 MHz inWCDMA2100 band

80 MHz in GSM900, 170MHz in DCS80 MHz in WCDMA900,250 MHz inWCDMA2100

Gain Gain < 3dBiImpedance 50 Ohm

Input power> 33dBm(2 W) peak power in GSM> 24dBm Average power in WCDMA

VSWR absolutemax


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NOTE:

Ensure that the total LNA gain(within active antenna) before the GPS RF connector of theUC864-G is less than 15 dB. Total LNA gain includes antenna cable loss, BPF insertion lossand RF pattern loss. Excessive LNA gain (>15 dB) can introduce jamming spurs, degrade 3IP,and saturate the GPS receiver.

Method 1 : Passive GPS Antenna

Method 2 : Active GPS Antenna

If the device is developed for the US and/or Canada market, it must comply to the FCC and/orIC approval requirements:

This device is to be used only for mobile and fixed application.

The UC864-G due to its characteristics of sensitivity is capable to perform a Fixinside the buildings. (In any case the sensitivity could be affected by the buildingcharacteristics i.e. shielding).

External Antenna

GPS RXBPF2

RFR6275

Pre-LNA

QuadDown

Convert

GPS RXBPF1GPS RF

connector

UC864-G

GPS RXBPF

The total LNA gain within active antenna) beforethe GPS RF connector of the UC864-G is less than 15 dB

ExternalLNA

GPS RXBPF2

RFR6275

Pre-LNA

QuadDown

Convert

GPS RXBPF1GPS RF

connector

External Antenna UC864-G


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The Antenna must not be co-located or operating in conjunction with any otherantenna or transmitter.

Antenna must not be installed inside metal cases.

Antenna must be installed also according Antenna manufacturer instructions.


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Where not specifically stated, all the interface circuits work at 2.6V CMOS logic levels. Thefollowing table shows the logic level specifications used in the Telit UC864-E/G/WD/E-DUAL interface circuits:

NOTE:

Do not connect UC864-E/G/WD/E-DUAL s digital logic signal directly to OEMs digitallogic signal of with level higher than 3.0V.

For 2.6V CMOS signals:

Absolute Maximum Ratings -Not Functional

ParameterUC864-E/G/WD/E-DUAL

Min MaxInput level on anydigital pin when on -0.3V +3.0V

Input voltage onanalog pins when on -0.3V +3.0 V

Operating Range - Interface levels

Level UC864-E/G/WD/E-DUALMin Max

Input high level 2.0V 2.9 V

Input low level -0.3V 0.6VOutput high level 2.15V 2.6VOutput low level 0V 0.45V

For 1,8V signals:

Operating Range - Interface levels (1.8V CMOS)

LevelUC864-E/G/WD/E-DUAL

Min MaxInput high level 1.5V 2.1V



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Signal Function I/O PIN Number

RESET Phone reset I 54

RESET is used to reset the UC864 Family module. Whenever this signal is pulled low,UC864 Family is reset. When the device is reset it stops all operations. After the release of thereset UC864 Family is unconditionally shut down, without doing any detach operations fromthe network where it is registered. This behavior is not a proper shutdown because the deviceis requested to issue a detach request on turn off. For this reason, the Reset signal must not beused for normally shutting down the device, but only as an emergency exit in the rare case the

device remains stuck waiting for some network response.The RESET is internally controlled on start-up to achieve always a proper power-on resetsequence. There is no need to control this pin on start-up. It may only be used to reset adevice already on, that is, not responding to any command.

NOTE:

Do not use this signal to power off UC864 Family Use the ON/OFF signal to perform thisfunction or the AT#SHDN command(To turn off UC864-E, first of all, you MUST cut offsupplying power to the USB_VBUS, or the module does not turn off).

NOTE:


Reset Signal Operating levels:

Signal Min MaxRESET Input high 2.0V* 2.6V

RESET Input low 0V 0.2V

* This signal is internally pulled up so the pin can be left floating if not used.

If unused, this signal may be left unconnected. If used, it must always be connected with anopen collector transistor to permit the internal circuitry the power on reset and under voltagelockout functions.


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The serial port on the Telit UC864 Family is the interface between the module and OEMhardware.

2 serial ports are available on the module:

MODEM SERIAL PORT;

MODEM SERIAL PORT 2 (DEBUG).

Several configurations can be designed for the serial port on the OEM hardware. The mostcommon are:

RS232 PC com port;

microcontroller UART @ 2.6V 2.9V (Universal Asynchronous ReceiveTransmit) ;

microcontroller UART @ 5V or other voltages different from 2.6V .

Depending on the type of serial port on the OEM hardware, a level translator circuit may beneeded to make the system work. The only configuration that does not need a level translationis the 2.6V UART.

The serial port on UC864 Family is a +2.6V UART with all the 7 RS232 signals. It differsfrom the PC-RS232 in signal polarity (RS232 is reversed) and levels. The levels for UC864Family UART are the CMOS levels:

Absolute Maximum Ratings - Not Functional


Min MaxInput level on anydigital pin when on -0.3V +3.0V

Input voltage onanalog pins when on -0.3V +3.0 V


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Operating Range - Interface Levels


Min Max

Input high level 2.0V 2.9 V


The signals of the UC864 Family serial port are:

RS232Pin

NumberSignal

UC864-E/G/WD/E-DUAL Pad

Number

NameInternal

Pulls(On Chip)

Usage

1 DCD -dcd_uart 32 Data Carrier Detect Pull-UpOutput from the UC864 Family that indicates thecarrier presence

2 RXD -Tx_uart 26Transmit line *see

Note Pull-Up Output transmit line of UC864 Family UART

3 TXD -Rx_uart 25Receive line *see

Note Pull-Down Input receive of the UC864 Family UART

4 DTR -dtr_uart 29Data TerminalReady Pull-Up

Input to the UC864 Family that controls the DTEREADY condition

5 GND 5,6,7 Ground - ground

6DSR -

dsr_uart 27 Data Set Ready Pull-DownOutput from the UC864 Family that indicates themodule is ready

7 RTS -rts_uart 31 Request to Send Pull-DownInput to the UC864 Family that controls theHardware flow control

8 CTS -cts_uart 28 Clear to Send Pull-UpOutput from the UC864 Family that controls theHardware flow control

9 RI -ri_uart 30 Ring Indicator Pull-UpOutput from the UC864 Family that indicates theIncoming call condition

TIP:

For minimum implementation, only the TXD and RXD lines can be connected, the other linescan be left open provided a software flow control is implemented.

NOTE:

According to V.24, RX/TX signal names are referred to the application side, therefore on theUC864 Family side these signal are on the opposite direction: TXD on the application sidewill be connected to the receive line (here named TXD/ rx_uart ) of the UC864 Family serial

port and vice versa for RX.

NOTE:



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In order to interface the Telit UC864 Family with a PC com port or a RS232 (EIA/TIA-232)application a level translator is required. This level translator must:

invert the electrical signal in both directions;

Change the level from 0/2.6V to +15/-15V.

Actually, the RS232 UART 16450, 16550, 16650 & 16750 chipsets accept signals with lowerlevels on the RS232 side (EIA/TIA-562), allowing a lower voltage-multiplying ratio on thelevel translator. Note that the negative signal voltage must be less than 0V and hence somesort of level translation is always required.

The simplest way to translate the levels and invert the signal is by using a single chip leveltranslator. There are a multitude of them, differing in the number of drivers and receivers andin the levels (be sure to get a true RS232 level translator not a RS485 or other standards).

By convention the driver is the level translator from the 0-2.6V UART to the RS232 level.The receiver is the translator from the RS232 level to 0-2.6V UART.

In order to translate the whole set of control lines of the UART you will need:

5 drivers

3 receivers

NOTE:

The digital input lines working at 2.6V CMOS have an absolute maximum input voltage of3.0V; therefore the level translator IC shall not be powered by the +3.8V supply of themodule. Instead, it must be powered from a +2.6V / +2.9V (dedicated) power supply.

This is because in this way the level translator IC outputs on the module side (i.e. UC864Family inputs) will work at +3.8V interface levels, damaging the module inputs.


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An example of level translation circuitry of this kind is:

The example is done with a SIPEX SP3282EB RS232 Transceiver that could accept supplyvoltages lower than 3V DC.

NOTE:

In this case Vin has to be set with a value compatible with the logic levels of the module.(Max 2.9V DC). In this configuration the SP3282EB will adhere to EIA/TIA-562 voltagelevels instead of RS232 (-5 ~ +5V)

Second solution could be done using a MAXIM transceiver (MAX218) In this case the


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compliance with RS232 (+-5V) is possible.

Another level adapting method could be done using a standard RS232 Transceiver

(MAX3237EAI) adding some resistors to adapt the levels on the UC864 Input lines.

NOTE:In this case has to be taken in account the length of the lines on the application to avoid

problems in case of High-speed rates on RS232.

The RS232 serial port lines are usually connected to a DB9 connector with the followinglayout: signal names and directions are named and defined from the DTE point of view


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If the OEM application uses a microcontroller with a serial port (UART) that works at avoltage different from 2.6 2.9V, then a circuitry has to adapt the different levels of the twosignal sets. As for the RS232 translation, there are a multitude of single chip translators. Forexample a possible translator circuit for a 5V TRANSMITTER/RECEIVER can be:

TIP:

This logic IC for the level translator and 2.6V pull-ups (not the 5V one) can be powereddirectly from VAUX1 line of UC864 Family. Note that the TC7SZ07AE has open drainoutput; therefore the resistor R2 is mandatory.

A power source of the internal interface voltage corresponding to the 2.6V CMOS high levelis available at the VAUX1 pin on the connector.

A maximum of 9 resistors of 47 K pull-up can be connected to the VAUX1 pin, provided noother devices are connected to it and the pulled-up lines are UC864 Family input linesconnected to open collector outputs in order to avoid latch-up problems on UC864 Family

Careful approach is needed to avoid latch-up on UC864 Family and the use of this output lineto power electronic devices must be avoided, especially for devices that generate spikes andnoise such as switching level translators, micro controllers, failure in any of these conditioncan severely compromise the UC864 Family functionality.


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TIP:

The input lines working at 2.6VCMOS can be pulled-up with 47K resistors that can beconnected directly to the VAUX1 line. It is a must that they are connected as in this example.

The preferable configuration is having external supply for the buffer.


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UC864 Family includes an integrated universal serial bus (USB) transceiver, compatible withUSB 2.0 specifications and supporting the USB low-speed [1.5 Mb/s] and full-Speed (12Mb/s) modes. In HSDPA (High Speed Downlink Packet Access) mode (N.A. in UC864-WD),the downlink data speed rates up to 7.2Mbps (3.6Mbps in UC864-E-DUAL). Hence OEMsneed to interface UC864-E/G/E-DUAL to applications in full-speed (12 Mb/s) mode.

TIP:

UC864 Family does NOT support host device operation at the moment, that is, it works as aslave device. Consequently USB_ID must be opened (not connected).

Signal UC864 FamilyPad No. Usage

USB_VBUS 48Power supply for the internal USB transceiver. This pin is configuredas an analog input or an analog output depending upon the type of

peripheral device connected.

USB_D- 80 Minus (-) line of the differential, bi-directional USB signal to/from the peripheral device

USB D+ 79 Plus (+) line of the differential, bi-directional USB signal to/from the peripheral device

USB_ID(for future use) 35

Analog input used to sense whether a peripheral device isconnected and if connected, to determine the peripheral type, host orslave


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This is the on-chip USB transceiver specifications

Parameter Comments Min Typ Max UnitUSB_VBUS :Supply Voltage 4.5 5.0 5.25 VSupply Current 25 mAI nput L evels for L ow-/ful l-speed :Receiver Threshold (single-end) 0.8 2.0 VDifferential Input Sensitivity |D+ - D-|, V IN = 0.8V to 2.5V 0.2 V

Differential Common-mode Range Includes V DI 0.8 2.5 VOutput L evels for L ow-/ful l-speed : Low R L = 1.5 k to 3.6 V 0.3 VHigh R L = 15 k to GND 2.8 3.6 VOutput Signal Crossover Voltage 1.3 2.0 VTermin ations : Internal pull-up resistor V TRM to D+, V TRM to D- 1.425 1.5 1.575 k Internal pull-down resistor D+ to GND, D- to GND 14.3 15 24.8 k

High-Z state output impedance 0 V < V D < 3.6V; measured atD+ and D- pins to GND 300 k

Termination Voltage An internal supply voltage, V TRM 3.0 3.3 3.6 VDr iver char acteri stics Ful l speed Transition time :

Rise timeFall time

CL = 50 to 125 pFCL = 50 to 125 pF

44

2020

nsns

Rise/fall time matching 90 111 %Series output resistance D+, D- 28 33 44 Dr iver char acteri stics Low speed Transition time :

Rise timeFall time

CL = 50 to 600 pFCL = 50 to 600 pF

7575

300300

nsns

Rise/fall time matching 80 125 %USB_ID (for f uture use only)

ID pin pull-up resistance 108 140 182 k A device detection threshold t delay < 1 us, V hys = 50mV 0.15*V TRM VB device detection threshold t delay < 1 us, V hys = 50mV 0.8*V TRM V


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The Baseband chip was developed for the cellular phones, which needed two separatedamplifiers both in RX and in TX section.A couple of amplifiers had to be used with internal audio transducers while the other coupleof amplifiers had to be used with external audio transducers.To distinguish the schematic signals and the Software identifiers, two different definitionswere introduced, with the following meaning:

internal audio transducers HS/MT (from H and S et or M icro T elephone ) external audio transducers H F (from H ands F ree )

Actually the acronyms have not the original importance.In other words this distinction is not necessary, being the performances between the two

blocks like the same.

Only if the customer needs higher output power to the speaker, he has a constraint. Otherwisethe choice could be done in order to overcome the PCB design difficulties.

For these reasons we have not changed the HS and HF acronyms, keeping them in theSoftware and on the schematics.

The Base Band Chip of the UC864 Family Telit Module maintains the same architecture.

For more information refer to Telit document:

80000NT 10025a UC864 Au dio Setti ngs Applicati on Note .

Only one block can be active at a time , and the activation of the requested audio path is donevia hardware by line or via software by command .

Moreover the Sidetone functionality could be implemented by the amplifier fitted between thetransmit path and the receive path, enabled at request in both modes .


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UC864 E/G/WD/E-DUAL Audio Front End ( )

100nF

100nF

Baseband Audio Front End

Singl e ende d

Balan ced

Singl e ende d

Bias

100nF

100nF

Singl e ende d

Balan ced

HPH_L (EAR_AMP2)

HPH_R (EAR_AMP3)

Differential Driver 32 Handset

Mono Differential Headphone

32 Load

32

MIC1P

MIC1N

MIC2P

MIC2N

EAR1ONP (EAR_AMP1)

EAR1OP (EAR_AMP1)

uc864afe.skd

MIC 1

MIC 2

Ear_HF+

Ear_HF-

Mic_HF+

Mic_HF-

Ear MT+

Ear MT-

MIC MT+

MIC MT-

Singl e ende d

Bias

Balan ced

32

Balan ced


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TIP:

Being the microphone circuitry the more noise sensitive, its design and layout must berealized with particular care. Both microphone paths are balanced and the OEM circuitry must

be balanced designed to reduce the common mode noise typically generated on the ground plane. However the customer can use the unbalanced circuitry for particular application.

Line coupling AC (*)Line type Balanced / UnbalancedCoupling capacitor 100nFDifferential input impedance 20K Differential input voltage 908mV rms ( 1290mV rms) @

MicG=0dB

Table 1. Mic_MT and Mic_HF microphone paths

(*) WARNING : AC means that the signals from the microphone have to be connected toinput lines of the module through capacitors which value has to be 100nf. notrespecting this constraint, the input stages will be damaged.

WARNING: when particular OEM application needs a Single Ended Input configuration, itis forbidden connecting the unused input directly to Ground, but only through a 100nFcapacitor. Dont forget that thus the useful input signal will be halved.

We suggest driving the load differentially from both output drivers, thus the output swing willdouble and the need for the output coupling capacitor avoided. If a particular OEMapplication needs a Single Ended Output configuration the output power will be reduced fourtimes.The OEM circuitry shall be designed to reduce the common mode noise typically generatedon the ground plane and to get the maximum power output from the device (low resistancetracks).


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(*) WARNING:

Using single ended configuration, the unused output line must be left open.

Not respecting this constraint, the output stage will be damaged.

Line coupling differentialsingle-ended

DCAC

Output load impedance differential 32 ( 26) Differential output impedance 01 @1.02kHz Signal bandwidth 150 - 4000 Hz @ -3 dBDifferential output voltage (typ.) 1060 mV rms /32 Max Output Power @ 32 70mWMax load capacitance 500pF

Table 3. (

Line coupling differentialsingle-ended

DCAC

Output load impedance differentialsingle-ended

32 ( 26)16 (12)

S.E. output impedance 0,5 @ 1.02kHz signal bandwidth 150 - 4000 Hz @ -3 dBDifferential output voltage (typ.) 833 mV rms /32 Max Output Power @ 32

@ 16 44mW differential22mW single-ended

Max load capacitance 1000pF

Table 4.


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The general-purpose I/O pads can be configured to act in three different ways:

input

output

alternate function (internally controlled)

Input pads can only be read and report the digital value (high or low) present on the pad at theread time; output pads can only be written or queried and set the value of the pad output; analternate function pad is internally controlled by the UC864-E/G /WD/E-DUAL firmware and

acts depending on the function implemented.The following GPIOs are available on the UC864 Family

PIN Signal I/O Function TypeDrive

strengthDefault

StateON_OFF

StateResetState Note

70 TGPIO_01 I/O GPIO01Configurable GPIO CMOS 2.6V 2mA INPUT LOW HIGH


66 TGPIO_03 I/O GPIO03Configurable GPIO CMOS 2.6V 2mA INPUT LOW LOW

59 TGPIO_04 I/O GPIO04Configurable GPIO CMOS 2.6V 2mA INPUT LOW LOWAlternate Function(RF Transmission

Control)

78 TGPIO_05 I/O GPIO05Configurable GPIO CMOS 2.6V 2mA INPUT LOW LOWAlternate Function

(RFTXMON)

68 TGPIO_06 I/O GPIO06Configurable GPIO CMOS 2.6V 2mA INPUT LOW HIGHAlternate function

(ALARM)

73 TGPIO_07 I/O GPIO07Configurable GPIO CMOS 2.6V 2mA INPUT LOW LOWAlternate function

(BUZZER)











65 TGPIO_18 I/O GPIO18 CMOS 2.6V 2mA INPUT LOW LOW


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Configurable GPIO



72 TGPIO_21 I/O GPIO21Configurable GPIO CMOS 2.6V 2mA INPUT HIGH HIGH

64 TGPIO_22 I/O GPIO22Configurable GPIOCMOS 1.8V(not 2.6V) 2mA INPUT LOW HIGH

Not all GPIO pads support all these three modes:

GPIO4 supports all three modes and can be input, output, RF TransmissionControl (Alternate function)

GPIO5 supports all three modes and can be input, output, RFTX monitor output(Alternate function)

GPIO6 supports all three modes and can be input, output, alarm output (Alternatefunction)

GPIO7 supports all three modes and can be input, output, buzzer output(Alternate function)

Some alternate functions for UC864 Family may be added if needed.

Where not specifically stated, all the interface circuits work at 2.6V CMOS logic levels.

The following table shows the logic level specifications used in the UC864-E/G/WD/E-DUAL interface circuits:

Absolute Maximum Ratings -Not Functional


Min Max

Input level on any digital pin when on

-0.3V +3.0V

Input voltage on analog pins when on

-0.3V +3.0 V


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For 2.6V CMOS signals;

Operating Range - Interface levels


Min MaxInput high level 2.0V 2.9 V


For 1.8V signals:Operating Range - Interface levels (1.8V CMOS)


Min Max

Input high level 1.5V 2.1V


The GPIO pads, when used as inputs, can be connected to a digital output of another deviceand report its status, provided this device has interface levels compatible with the 2.6VCMOS levels of the GPIO.

If the digital output of the device is connected with the GPIO input, the pad has interfacelevels different from the 2.6V CMOS. It can be buffered with an open collector transistor witha 47K pull-up resistor to 2.6V.

NOTE:

In order to avoid a back powering effect it is recommended to avoid having any HIGH logiclevel signal applied to the digital pins of the module when is powered OFF or during anON/OFF transition

The GPIO pads, when used as outputs, can drive 2.6V CMOS digital devices or compatiblehardware. When set as outputs, the pads have a push-pull output and therefore the pull-upresistor may be omitted.


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The GPIO4 pin, when configured as RF Transmission Control Input, permits to disable theTransmitter when the GPIO is set to Low by the application. In the design it is necessary toadd a pull up resistor (47K to VAUX1).

The GPIO5 pin, when configured as RFTXMON Output, is controlled by the UC864 Familymodule and will rise when the transmitter is active and fall after the transmitter activity iscompleted.

For example, if a call is started, the line will be HIGH during all conversations and it will be

again LOW after hanged up.The line rises up 300ms before first TX burst and will become again LOW from 500ms to1sec after last TX burst.

The GPIO6 pad, when configured as Alarm Output, is controlled by the UC864-E/G /WD/E-DUAL module and will rise when the alarm starts and fall after the issue of a dedicated ATcommand.

This output can be used to power up the UC864 Family controlling microcontroller orapplication at the alarm time, giving you the possibility to program a timely system wake-upto achieve some periodic actions and completely turn off either the application or the UC864Family during sleep periods. This will dramatically reduce the sleep consumption to few A.

In battery-powered devices this feature will greatly improve the autonomy of the device.

NOTE:

During RESET the line is set to HIGH logic level.

As Alternate Function, the GPIO7 is controlled by the firmware that depends on the function

implemented internally.This setup places always the GPIO7 pin in OUTPUT direction and the corresponding functionmust be activated properly by AT#SRP command (refer to AT commands specification).

Also in this case, the for the pin state can be both 0 or 1.

send the command AT#GPIO=7, 1, 2:

wait for response OK

send the command AT#SRP=3

The GPIO7 pin will be set as pin with its dummy logic status set tovalue.


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The "Alternate function permits your application to easily implement Buzzer feature withsome small hardware extension of your application as shown in the next sample figure.

NOTE:

To correctly drive a buzzer, a driver must be provided. its characteristics depend on the buzzer. Refer to your buzzer vendor.


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A magnetic Buzzer is a sound-generating device with a coil located in the magnetic circuitconsisting of a permanent magnet, an iron core, a high permeable metal disk and a vibratingdiaphragm.

The disk and diaphragm are attracted to the core by the magnetic field. When an oscillatingsignal is moved through the coil, it produces a fluctuating magnetic field, which vibrates thediaphragm at a frequency of the drive signal. Thus the sound is produced as relative to thefrequency applied.

The frequency behavior represents the effectiveness of the reproduction of the applied signals.Because its performance is related to a square driving waveform (whose amplitude variesfrom 0V to Vpp), if you modify the waveform (e.g. from square to sinus) the frequencyresponse will change.


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After applying a signal with a different amplitude from suggested by the manufacturer, a performance change will follow, according to the rule

.

Because resonance frequency depends on acoustic design and lowering the amplitude of thedriving signal, the response bandwidth tends to become narrow, and vice versa.

Summarizing: Vpp f o Vpp f o

:

It is very important to respect the sense of the applied voltage: never apply to the "-" pin a

voltage more positive than "+" pin. If this happens, the diaphragm vibrates in the oppositesense with a high probability to be expelled from its physical position. This damages thedevice permanently.

The risk is that the could easily fall outside of new bandwidth; consequently the SPL could be much lower than the expected.

In the componen

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