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Teaching Portfolio MR. ROHIT MATHUR DEPT. OF E&CE. MANIPAL UNIV. JAIPUR. RAJ.

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Page 1: Teaching Portfolio - WordPress.com · Semiconductor Physics ... Boolean algebra.!! Introduction to Logic gates.!! ... Collaborative learning project/activity Topic: Counter Designing

Teaching Portfolio

MR. ROHIT MATHUR DEPT. OF E&CE.

MANIPAL UNIV. JAIPUR. RAJ.

Page 2: Teaching Portfolio - WordPress.com · Semiconductor Physics ... Boolean algebra.!! Introduction to Logic gates.!! ... Collaborative learning project/activity Topic: Counter Designing

Content

v My Teaching Philosophy. v Experimental Course – Details. v Activity Based Learning. v Technology Use. v Course Assessment. v Research Paper. v Conclusion.

Page 3: Teaching Portfolio - WordPress.com · Semiconductor Physics ... Boolean algebra.!! Introduction to Logic gates.!! ... Collaborative learning project/activity Topic: Counter Designing

My Teaching Philosophy

v  “Give a man a fish, and he eats for a day; teach him how to fish, and he eats for a lifetime.” – Anonymous.

v Learn.

v Current Aim: Enroll for a PhD. program.

Page 4: Teaching Portfolio - WordPress.com · Semiconductor Physics ... Boolean algebra.!! Introduction to Logic gates.!! ... Collaborative learning project/activity Topic: Counter Designing

Experimental Course - Details

  Details of the course taught during the program (title, level). What changes were made based on the theory and practices learned during the course. What strategies were used to connect with the students - data from student feedback   • Title of the Course: BASIC ELECTRONICS - EC1101.   • Level: First year.   • Credits: Four (4).   • Status of the Course (Core or Elective): Core.   • Semester Dates: January 5th, 2015 till May 4th, 2015.   • Weekly Schedule: Four lectures per week each of one hour duration.

Page 5: Teaching Portfolio - WordPress.com · Semiconductor Physics ... Boolean algebra.!! Introduction to Logic gates.!! ... Collaborative learning project/activity Topic: Counter Designing

SIFTED CONTENT Core Concepts – In-depth study   Portions important for the final

exam/achieving a good grade   Portions student can study on their own  

v  V-I Characteristics of PN junction diode  

v  Clippers & Clamper circuits.  v  BJT: Characteristic.  v  Transistor biasing.  v  Designing combinational circuits.  v  K-map.  v  Flip-Flop characteristic table.  v  Counter design.  v  AM transmitters & detectors: SSB,

DSB.  v  FM transmitters & detectors.  

v  Diode equation.  v  Fixed bias.  v  Clippers: Series.  v  Negative clampers.  v  Fixed bias.  v  Logic function representation.  v  JK and D flip-flops.  v  Up/down counters.  v  AM block diagram, modulation

equation.  v  FM block diagram, modulation

equations.  

v  Semiconductor Physics (studied in XII).  

v  Introduction to PN junction diode.  v  Introduction to Zener Diode.  v  Transistor as an amplifier.  v  Boolean algebra.  v  Introduction to Logic gates.  v  Introduction to Flip-flops.  v  Introduction to Counters & their

operation.  v  Introduction to communication.  v  Transmission media.  

Page 6: Teaching Portfolio - WordPress.com · Semiconductor Physics ... Boolean algebra.!! Introduction to Logic gates.!! ... Collaborative learning project/activity Topic: Counter Designing

Activity Based Learning S. No.

Activity Topic Reflection

1. Think-Pair-Share activity Application of operational amplifier as integrator, differentiator. Boolean algebra – function minimization.

Went well.

2. Think-Aloud Pair Problem Solving (TAPPS)

Boolean function minimization using K-map.

Satisfied. Noisy.

3. Stump your partner Flip-Flop. Enjoyed. 4. Student-Team-

Achievement-Division (STAD)

Counter Designing. Lost track in between.

Page 7: Teaching Portfolio - WordPress.com · Semiconductor Physics ... Boolean algebra.!! Introduction to Logic gates.!! ... Collaborative learning project/activity Topic: Counter Designing

Active Learning

Topic: Application of operational amplifier . Activity: Think – Pair – Share. Question: Q1) Analyze the Op-Amp and synthesize its output waveform.

Page 8: Teaching Portfolio - WordPress.com · Semiconductor Physics ... Boolean algebra.!! Introduction to Logic gates.!! ... Collaborative learning project/activity Topic: Counter Designing

Collaborative learning project/activity Topic: Counter Designing. Activity: STAD. Class sessions required: 3. Question: Q1) Design a synchronous MOD – 3 counter.

Team  Number  

Number  of  students  

Team  Score  (Median  Score=7.75)  

Team  Performed  less  than  median  score  (yes/no)  

1   4   7.5   Y  2   3   8.7   N  3   4   9.0   N  4   3   8.7   N  5   3   8.3   N  6   4   7.5   Y  7   4   8.5   N  8   4   7.3   Y  9   4   6.8   Y  10   4   7.3   Y  11   4   8.0   N  12   5   7.4   Y  

Page 9: Teaching Portfolio - WordPress.com · Semiconductor Physics ... Boolean algebra.!! Introduction to Logic gates.!! ... Collaborative learning project/activity Topic: Counter Designing

Collaborative learning project/activity

Page 10: Teaching Portfolio - WordPress.com · Semiconductor Physics ... Boolean algebra.!! Introduction to Logic gates.!! ... Collaborative learning project/activity Topic: Counter Designing

Technology incorporated v Power Point. v Flipped Class. v College AMS system. v Self-Assesment ppts (to be implemented).

Page 11: Teaching Portfolio - WordPress.com · Semiconductor Physics ... Boolean algebra.!! Introduction to Logic gates.!! ... Collaborative learning project/activity Topic: Counter Designing

Course Assessment v Assignment Design & Evaluation. v  Rubric v Change in method: Video submission / Assignment

Page 12: Teaching Portfolio - WordPress.com · Semiconductor Physics ... Boolean algebra.!! Introduction to Logic gates.!! ... Collaborative learning project/activity Topic: Counter Designing

Course Assessment 1.   Prove   the   following   expressions   using   Boolean  

Algebra  :       Rubric  

    (i)  A'B(D'  +  C'D)  +  B(A  +  A'CD)  =  B.   [3]   A'B(D'  +  C'D)  +  B(A  +  A'CD)  =  B(A'D'  +  A'C'D  +  A  +  A'CD)      [1]  =  B(A'D'  +  A  +  A'D(C  +  C')      [0.5]  =  B(A  +  A'(D'  +  D))        [0.5]  =  B(A  +  A')        [0.5]  =  B          [0.5]  

    (i)  (X  +  Y'  +  Z')(X'  +  Z')  =  Z'  +  X'Y'.   [3]        (X  +  Y'  +  Z')(X'  +  Z')        =  XX'  +  XZ'  +  X'Y'  +  Y'Z'  +  X'Z'  +  Z'Z'    [1]  =  Z'  +  Y'(X'  +  Z')        [1]  =  Z'  +  X'Y'          [1]  

2   Simplify   the   following   expression   using   the   K-­‐map  method:  Y  =  ∑  m  (7,9,10,11,12,13,14,15)  +  d(2,8,5)  

[4]   a)  Drawing  conclusion  on-­‐  what  number  of  variable  K-­‐map  is  to  be  drawn  &  no.  each  block.    [1]  

b)  Filling  all  min-­‐terms  correctly.    [0.5]  c)  Filling  all  don’t  care  condi\ons  correctly.  [0.5]  d)  Making  all  proper  groupings.    [1]  e)  Wri\ng   the   final   answer   considering   all   the   min-­‐term  

groupings  correctly.      [1]  

Page 13: Teaching Portfolio - WordPress.com · Semiconductor Physics ... Boolean algebra.!! Introduction to Logic gates.!! ... Collaborative learning project/activity Topic: Counter Designing

Research /Communication Paper

Grades  achieved  by  the  students  

Result  analysis  of  secQon-­‐M  (Class  where  acQve  learning  was  

adopted)  

Result  analysis  of  secQon-­‐N  (Class  where  acQve  learning  was  not  

adopted)  %   of   students  a c h i e v i n g  par\cular   grade  in  1st  term  exam  

%   of   students  a c h i e v i n g  par\cular   grade  in  2nd  term  exam  

%   of   students  a c h i e v i n g  par\cular   grade  in  1st  term  exam  

%   of   students  a c h i e v i n g  par\cular   grade  in  2nd  term  exam  

A+   15   34   12   10  A   17   17   12   10  B   09   17   29   25  C   26   15   12   21  D   04   04   06   10  E   11   02   08   04  F   19   11   23   21  

Result analysis of Basic Electronics Course

Page 14: Teaching Portfolio - WordPress.com · Semiconductor Physics ... Boolean algebra.!! Introduction to Logic gates.!! ... Collaborative learning project/activity Topic: Counter Designing

Research /Communication Paper

% 1st Term Sec - M

% 2nd Term Sec - M

0  

5  

10  

15  

20  

25  

30  

35  

A+   A   B   C   D   E   F  

Bar chart 1. Comparision of the result of the 1st and 2nd mid-terms of section M

% 1st Term Sec - M % 2nd Term Sec - M

Page 15: Teaching Portfolio - WordPress.com · Semiconductor Physics ... Boolean algebra.!! Introduction to Logic gates.!! ... Collaborative learning project/activity Topic: Counter Designing
Page 16: Teaching Portfolio - WordPress.com · Semiconductor Physics ... Boolean algebra.!! Introduction to Logic gates.!! ... Collaborative learning project/activity Topic: Counter Designing
Page 17: Teaching Portfolio - WordPress.com · Semiconductor Physics ... Boolean algebra.!! Introduction to Logic gates.!! ... Collaborative learning project/activity Topic: Counter Designing

Thank  you… QUESTIONS  PLEASE……