1

Abstract--This paper presents the design of the thyristor valves

for the Rowville SVC replacement project. The thyristor valves

are based on AREVA’s latest developed S500 series valve design

and make use of 8.5kV 5” electrically-triggered thyristor

technology. Details of the valve configuration, the cooling circuit,

as well as the protective strategy are presented. Detailed electrical

ratings such as the steady-state and temporary overload

capabilities, as well as the valve capabilities to cope with the

scenarios like a short circuit fault on the system AC bus and a

firing of the TSC valve at the maximum Safe-to-Firing protection

level are described. The thyristor valve design satisfies the

requirements of the scheme.

Index Terms— Distribution, Electricity, FACTS, Power, SVC,

Transmission, Thyristor, Valve

I. INTRODUCTION

tatic Var Compensation (SVC) technology has been

extensively used for improving the power quality of

electricity transmission and distribution networks [1], [2]. The

Rowville SVC project is to replace a set of existing TCR and

TSC thyristor valves that SP AusNet has been using for many

years. The replacement thyristor valves will be supplied by

AREVA using their S500 series SVC valve technology. The

replacement SVC will be installed at the Rowville substation

in the south suburb of Melbourne, Australia. The project

started in July 2007 and the commission date was scheduled

for early 2010.

The S500 series is AREVA’s latest range of liquid-cooled

thyristor valves for Static Var Compensation (SVC)

applications. The S500 series valves use 5” 8.5kV electrically-

trigged thyristors and have been developed by drawing on

AREVA’s extensive experience of applying thyristor-based

SVCs since the mid 1980s, for both utility (transmission) and

industrial applications [3], [4], [5]. The S500 series SVC valve

technology provides a very compact, versatile yet standardized

platform for both Thyristor Controlled Reactor (TCR) and

Thyristor Switched Capacitor (TSC) variants.

This work was supported by PES, AREVA T&D UK.

J. Z. Cao, M. Donoghue, and C. Horwill are with the Power Electronics

System (PES), AREVA T&D, UK ST17 4LX (e-mail: junzheng.cao@areva-

td.com, Mark.donoghue@areva-td.com, and chris.horwill@areva-td.com).

A. Singh is with SP AusNet, Southbank Victory 3006, Australia (e-mail:

anil.singh@sp-ausnet.com.au)

II. SCHEME PARAMETER

A. Site environment

The SVC valves for the project will be installed in a fully

enclosed building, served with an air ventilation system. The

altitude of the site is approximately 90m above sea level and

the bulk air temperature inside the valve room ranges from

+5°C to +50°C. External ambient temperature of the site

ranges from -5ºC to 40ºC. The site is categorised as a low

Seismic zone.

B. System parameters and SVC operation

The single line diagram of the proposed SVC is shown in

Fig. 1. The SVC is required to have a continuous capacitive

rating of 100Mvar and a continuous inductive rating of -

60Mvar at 220kV. The steady-state system frequency ranges

from 48.5Hz to 50.5Hz, with a nominal frequency of 50Hz.

Under extreme scenarios, the system frequency can drop to

45Hz minimum or rise to 51.5Hz maximum. However, the

duration for the extreme cases should be no more than 5

seconds. The short circuit impedance for the AC system is

estimated at 0.7% to 2.0% of a 100MVA base.

The proposed SVC comprises one TCR, one TSC and a set

of Harmonic Filters (FC). The TCR, TSC and FC are

connected to the 220kV (1pu) system via a 100MVA step-

down transformer. The rated (1pu) operation voltage at the

SVC bus is 10.5kV (1pu). Both the TCR and TSC are

connected in delta configuration. The nominal rating of the

TCR is 85.6Mvar and 70Mvar for the TSC. The Harmonic

filters are rated at 19.5Mvar and tuned to 5th and 7th

harmonics.

TABLE I and Fig. 2 show the operating characteristics of

the SVC. The maximum continuous operating voltage for the

AC system is 225kVrms (1.023pu) for full capacitive output

(E) and 242kVrms (1.1pu) for full inductive output (F). The

minimum continuous system voltage for normal operation is

198kVrms (0.9pu). The 1 second short duration overvoltage

(D) for TCR operation is as high as 286kVrms (1.3pu)

whereas the 0.2 second short duration undervoltage (C) for

TSC deblocking is 0.3pu.

III. TCR AND TSC VALVE DESIGN

A. Per thyristor level design

The basic electrical circuits for both the TCR and TSC

TCR and TSC thyristor valves for Rowville

SVC replacement project J. Z. Cao, Member IET, M. Donoghue, Member, IET,

C. Horwill, Member, IEEE, and A. Singh, Member, IEEE

S

2010 International Conference on Power System Technology

978-1-4244-5940-7/10/$26.00©2010 IEEE

2

valves are essentially identical. As shown in Fig. 3, each

thyristor level comprises a pair of anti-parallel connected

thyristors, a gate electronics unit, associated damping, DC

grading and fast grading circuits. The damping, DC grading,

and fast grading components are used for proper internal

distribution of the valve voltage from DC to impulse including

the transient at voltage recovery. The gate electronic unit

provides electrical gating of the thyristors under both normal

and abnormal operating conditions.

Fig. 4 shows the typical cooling arrangement for a TCR and

TSC thyristor level. Both anti-parallel thyristors of a thyristor

level are sandwiched respectively between two water-cooled

heatsinks. The cooling circuit is arranged to ensure even

cooling of the anti-parallel thyristor strings and to take full

potential of the thyristor thermal and electrical capabilities.

The coolant path for the TCR damping or TSC damping and

DC grading resistors is in series with the coolant outlet from

the thyristor heatsinks.

For a TCR valve under phase control, the damping resistors

will dissipate large amounts of heat which necessitates a direct

cooled resistor (the coolant passes through the body of the

resistor) design. The DC grading resistors for a TCR valve

however dissipate relatively little heat and therefore only

require indirect cooling as provided by extended sections of

the aluminium thyristor heatsinks.

TABLE I

SVC OUTPUT ON 220KV BUS WITH NOMINAL COMPONENTS

Case 220kV Bus

voltage (pu)

10.5kV Bus

voltage (pu)

Current (A) @

220kV bus

Mvar @

220kV bus

Operating

Mode

Time

Duration

E 1.023 1.14 266.9 104.0 Capacitive Continuous

A 1.00 1.12 261.0 99.5 Capacitive Continuous

H 0.90 1.01 234.9 80.6 Capacitive Continuous

D 1.30 1.20 -208.9 -103.5 Inductive Temporary

F 1.10 1.03 -157.4 -66.0 Inductive Continuous

B 1.00 0.93 -160.7 -61.2 Inductive Continuous

J 0.90 0.83 -144.6 -49.6 Inductive Continuous

C2 0.80 0.90 208.8 63.7 Minimum Limit of phase control 1s

C 0.30 0.28 -48.2 -5.5 Minimum operating voltage 0.2s

AB

D

F

C

C2HJ

E 5% slope

0

50

100

150

200

250

300

-300-200-1000100200300

SVC Current , A

Normal operating range

Min operating voltage

Min limit of

phase control

1pu

HV bus

voltage, kV

0.9pu

0.8pu

1.023pu

0.3pu

Fig. 1. Static Var Compensator Single Line Diagram Fig. 2. SVC Voltage / Current Characteristic for nominal Components

Unlike the TCR valve, the TSC DC grading resistor

requires a more efficient heatsink arrangement while the TSC

damping resistor power dissipation requirement is

considerably lower than that of the TCR. Both the TSC DC

grading and damping resistors are mounted on a common

aluminium heatsink as illustrated (as a stand-alone unit) in Fig.

4.

The communication between the Valve Base Electronics

(VBE) and each thyristor level is carried out using two optical

fibres, one ‘firing’ fibre which carries the start and stop pulses

and one ‘data-back’ fibre which feeds information on the status

of each thyristor level back to the VBE. If a thyristor ceases to

conduct between a start and a stop pulse (e.g. during

discontinuous current operation), detection of positive voltage

will cause additional gate pulses to be generated as required.

B. Valve mechanical

The 3-phase TCR valve is assembled in a single valve stack

of three modules high. Each module contains the thyristor

levels and associated circuits for a single phase of the AC

voltage. Each phase of the TCR valve comprises five series

connected thyristor levels including one redundancy. Since

each module can accommodate a maximum of eight thyristor

levels, the un-used thyristor-level positions of the module

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assemblies are replaced with copper blocks. Thyristors of a

valve module are protected against inrush current at turn-on

using two series connected di/dt limiting reactors. Schematic

drawings for the proposed TCR valve and module structures

are shown in Fig. 5 (a) and Fig. 5 (b) respectively.

TCR DC grading resistor

TSC damping & DC grading resistor

assembly

Thyristor heatsink

Thyristor

XLPE (PEX) coolant pipework

TCR damping resistor

Coolant feed & return

Fig. 3. Basic electrical circuit of a thyristor level Fig. 4. Typical cooling arrangement for a single thyristor level of TCR

and TSC valves

All the thyristors within a valve module are clamped

between high-efficiency liquid cooled heatsinks. Glass-

Reinforced Plastic (GRP) tension bands are used to secure the

assembly and to provide the high clamping load necessary for

good electrical and thermal contacts between thyristors and

heatsinks. The clamping system facilitates replacement of

individual thyristors without the need for opening any power

or coolant connections [6].

All the coolant paths within a module are effectively

connected in parallel to coolant distribution manifolds. The

TCR saturable reactors are cooled in series with the outmost

thyristor heatsinks of the thyristor clamping assemblies. The

coolant is distributed up the valve stack using additional large-

diameter PEX pipes, connected to manifolds blocks at the

sides of each valve stack.

The mechanical structure for the TSC valve is identical to

that for the TCR except that each individual TSC valve

module is fully populated with a total of eight thyristor levels

including one redundancy. No di/dt limiting reactors are

implemented for the TSC valve.

IV. TCR & TSC VALVE RATING

The thyristor valves for SVC applications are typically

designed for a lifetime of up to 30 years with minimum

inspection and cleaning requirements between intervals of a

few years. The thyristor valves need to withstand not only the

thermal and voltage stresses under various continuous and

temporary operations, but also the voltage and thermal stresses

as the results of the switching, lightning, and steep-front

impulse voltages. The thyristor valves are further required to

withstand the stresses resulting from a fault either due to

disturbances originating from the ac system or due to a major

insulation failure on the system bus. The probability for an

insulation failure on the SVC bus is minimized by allowing for

significant clearances between busbars of different potentials

and installing the valves in an in-door environment. This

section discusses the most important aspects of the TCR and

TSC valve designs, in connection with their reliable operation

for the application.

A. TCR valve thyristor levels

As with any other power device [7], recovery overshoot

occurs at thyristor turn-off. Recovery overshoot is a natural

phenomenon due to the interaction between the stored charge

of the thyristor and the TCR reactance of the SVC system. In

accordance with IEC standard [8], a sufficient number of

series connected thyristor levels has to be deployed in the TCR

design to limit this recovery overshoot voltage (ROV)

experienced by individual thyristor levels, the maximum of

which occurs during the type test condition.

(a) Typical TCR valve structure

(b) Typical TCR module structure

Fig. 5. Typical TCR valve and module structures

di/dt Reactor

Thyristor Clamped

Assemblies

Gate electronics

Damping

Resistors

Damping

Capacitors

Auxiliary

Supply CT

stick

4

Studies were performed by analysis of the recovery

overshoot voltage across a single thyristor level at different

firing angles, occurring at the type test condition and with the

most unfavourable component tolerance combination. As

shown in Fig. 6, for a minimum of four thyristor levels, the

maximum recovery overshoot voltage across the worst

thyristor level is 7.8kV, which is less than the minimum VBO

protection level of 8kV for individual thyristor levels. The

maximum recovery overshoot voltage occurs at a TCR firing

angle of approximate 98º electrical.

0

1000

2000

3000

4000

5000

6000

7000

8000

9000

90 110 130 150 170

Firing angle, deg

The w

ors

t le

vel R

OV

, V

Fig. 6. TCR thyristor level recovery overshoot voltage (ROV) vs. thyristor

firing angles at the type test condition (with redundancy shorted)

-20

-15

-10

-5

0

5

10

15

20

25

30

0 100 200 300 400 500 600 700

Time, ms

SV

C b

us v

olta

ge, k

V

-6

-4

-2

0

2

4

6

8

10

12

0 100 200 300 400 500 600 700

Time, ms

Valv

e c

urr

en

t, k

A

80

85

90

95

100

105

110

115

120

0 100 200 300 400 500 600 700

Time, ms

Th

yris

tor

junc

tion t

em

pera

ture

, 0C

A

B

C

Fig. 7. The worst-case TCR thyristor temperature for a true short circuit

fault on the HV bus

B. TCR valve thermal rating

Among all the possible fault scenarios, it is the line-line

short circuit fault occurring on the AC system voltage that is

typically the worst in terms of imposing high thermal stress in

the thyristors.

Studies were performed assuming a symmetrical close-in

fault on the AC system voltage at the peak of the maximum

continuous valve current. The thyristor junction temperature

prior to the fault was determined by the maximum continuous

operating condition at 1.03pu SVC bus voltage in conjunction

with the worst case cooling condition corresponding to the

maximum ambient temperature of 40°C. The associated worst-

case thyristor junction temperature prior to the fault was

determined to be approximately 91°C (Point A in Fig. 7).

During the fault period, although the TCR current decays

the thyristor junction temperature continues to rise for a period

of time. The rate of decay of the TCR current depends on the

L/R time constant of the fault circuit. The studies show that the

worst-case occurs if the fault is cleared when thyristor junction

temperature reaches its maximum peak, which is found to be

approximately 98°C (Point B in Fig. 7) for this project.

The worst-case thyristor junction temperature post fault

clearance is dependent upon the amplitude of the recovery

voltage. A number of studies have been performed and the

results show that the worst-case thyristor junction temperature

occurs when the SVC bus is recovering to 1.20 pu. The

corresponding peak thyristor junction temperature is 117°C

(Point C in Fig. 7), which is less than the 120°C protection

limit imposed for TCR phase control.

C. TSC valve thyristor levels

The minimum number of series connected thyristor levels

for a TSC valve is determined by considering three scenarios:

the valve needs not only to withstand the impulse voltages

applied at both the type test and service conditions but also to

withstand the recovery overshoot voltage across individual

thyristor levels at turn-off. It is a requirement that the worst-

case thyristor voltage stresses in the three scenarios shall not

exceed the non-repetitive off-state voltage rating of the

thyristor.

Although the impulse voltages applied during the type test

condition are 10% higher than in services [8], the voltage

stresses experienced by the valve thyristors at type tests may

not necessarily be the worst condition. This is because during

type test the TSC valve is in the blocked state and the voltage

distribution is only determined by the tolerances of the

damping and grading circuits. In operation however the

voltage stresses experienced by individual thyristor levels are

determined by a combination of component tolerances (of

damping and grading circuits) and the additional influence of

thyristor stored charge spread.

Although the TSC valve does not experience any recovery

overshoot voltage during continuous operation, the valve does

see a high recovery voltage at blocking (turn-off). The

amplitude of the recovery overshoot is dependent of the

5

damping circuit, thyristor stored charge, and the re-applied

voltage at thyristor turn-off. The thyristor stored charge in turn

is a function of the thyristor junction temperature and the rate

of thyristor current at turn-off.

Detailed study confirmed that for a TSC valve with a

minimum of 7 thyristor levels, the valve is capable of

withstanding the impulse voltage stresses at both the type test

and service conditions, as well as the recovery overshoot

voltage at thyristor turn-off.

Fig. 8 shows the worst-level thyristor recovery overshoot

voltage assuming that the TSC valve is de-blocked from the

maximum Safe-To-Firing protection voltage discussed in the

next section. The worst-level recovery overshoot voltage is

within the rated non-repetitive off-state voltage (of 8.5kV) of

the thyristor. The actual magnitude of the worst-level recovery

overshoot voltage obtained is 8.44kV.

-9

-8

-7

-6

-5

-4

-3

-2

-1

0

15 20 25 30 35 40 45 50

Time, µs

Wo

rst-

level R

OV

, kV

Fig. 8. TSC valve worst-level recovery overshoot voltage (ROV) at turn-off

from the maximum tolerance Safe-To-Fire interlock threshold

D. TSC valve thermal rating

Unlike for a TCR valve, the TSC is protected against

impulse voltages using parallel-connected valve surge

arresters. However in terms of thermal rating it is the

amplitude of the inrush current into the TSC valve that is the

determining factor. In order to limit the inrush current at de-

blocking the valve is provided with a ‘Safe-To-Fire’ interlock

protection system to prevent de-blocking from too high a valve

voltage.

The TSC valve surge arresters are rated for operation at the

maximum voltage appearing across the thyristor valve. The

‘Safe-To-Fire’ interlock protection level for a complete valve

is determined by the characteristics of the valve surge arresters

and the minimum SVC voltage at which the TSC is allowed to

deblock. The TSC valve is allowed to deblock only if the

voltage across the TSC valve is less than the valve Safe-To-

Fire interlock level.

For the proposed TSC configuration, the maximum voltage

appearing across the valve forms shortly after the TSC valve

changes from a de-blocked state to a blocked state. At this

time the valve voltage is a combination of an AC component in

relationship to the AC system voltage and a decaying DC

voltage that is trapped on the TSC capacitors. This 'trapped

voltage' could remain on the capacitors for several minutes

until the capacitors have naturally discharged.

System study shows that the highest steady-state SVC bus

voltage for capacitive output is 11.1kVrms or 15.7kVpk. Due

to the tuning reactors (shown in Fig. 1), the maximum voltage

trapped on the TSC capacitors is 18.1kVdc, more than the

peak of the corresponding SVC bus voltage. The minimum

voltage capability for the TSC valve surge arresters is

therefore required to be 15.7kV+18.1kV=33.8kVpk. For a

surge arrester with known voltage rating, the SIPL of the surge

arrester will depend on the surge arrester characteristics and

the number of surge arrester columns used. The SIPL for the

valve surge arrester for this project is rated at 48.5kV at a

coordination current of 2kA.

Considering the combined effects of the 0.3pu minimum

AC system for TSC deblocking given in Section II and the

valve surge arrester protection level derived above, the

maximum Safe-To-Fire interlock threshold for a complete

TSC valve is designed at 40.1kV.

0

5

10

15

20

25

30

35

40

19 20 21 22 23

Time, ms

Valv

e c

urr

ent, k

A80

85

90

95

100

105

110

115

120

Valve current

Thyristor junction

temperature

Current peak

=35kATj peak

=115ºC

Thy

risto

r ju

nctio

n t

em

pera

ture

, 0C

Fig. 9. TSC valve transient current and thyristor junction temperature when

de-blocking from the maximum Safe-To-Fire interlock threshold

Fig. 9 shows the maximum possible thyristor current and

junction temperature when the TSC valve is de-blocked from

the maximum ‘Safe-To-Fire’ interlock protection level. The

associated peak inrush current is 35kA and the corresponding

peak thyristor junction temperature is 115°C, which is less

than the rated thyristor junction temperature for continuous

operation. Prior to deblocking, the TSC valve is assumed to

have been blocked for one period of the nominal system

frequency, following its worst-case continuous operation at

type test condition.

V. CONCLUSION

The design of the electrically-triggered thyristor valves for

the Rowville SVC replacement project satisfies the

requirements of the scheme. The valve design uses the

combination of the thyristors high voltage and high current

capabilities to provide the best compromise between the

scheme’s low cost and high efficiency requirements. Use of an

efficient cooling system in combination of de-ionized pure

water allows the thyristor valves to operate at the maximum

ambient temperature in conjunction with the worst-case

operating conditions. Individual thyristor levels of both TCR

and TSC valves are safe guarded using intelligent gate

electronics units. The TSC valve is further protected against

external impulse voltage using valve surge arresters. By using

an independent power supply arrangement for the gate

electronics units, the valves are allowed to operate at zero

6

system voltage between valve terminals.

VI. ACKNOWLEDGMENT

Appreciation is expressed to AREVA T&D and SP AusNet

for permitting the publication of the contents quoted in this

paper.

VII. REFERENCE

[1] I. A. Erinmez, “Static var compensators,” CIGRE Working Group 38-01

Task Force No 2.

[2] S. K. Lowe, “Static var compensators and their applications in

australia,” IEE Power Engineering Journal, p247, 1989.

[3] H. L. Thanawala, W. P. Williams, and D. J. Young, “Static reactor

compensation for ac power transmission – ten years experience,” GEC

Jounal of Science and Technology, 45 (3), 1979.

[4] M. H. Baker, H. L. Thanawala, D. J. Young, and I. A. Erinmez, “Static

var compensators enhance a meshed transmission system,” CIGRE

paper, 14/37/38-03, 1992.

[5] R. C. Knight, D. J. Young, and C. Horwill, “Relocatble static var

compensator help control unbundled power flows,” Modern Power

Systems, p.49, Dec 1996.

[6] M. Granger, A. Dutil, A. Dery, C. Horwill, and C. Davidson, “Using

power electronics at Hydro-Québec to secure strategic lines during ice

storms,” CIGRE, B4-101, 2006.

[7] M. L. Woodhouse, J. P. Ballad, J. L. Haddock, and B. A. Rowe, “The

control and protection of thyristors in the english terminal cross channel

valves, particularly during forward recovery,” IEE Internat. Conf

TAVSET, pp158-163, 1981.

[8] Power electronics for electrical transmission and distribution systems

— Testing of thyristor valves for static VAR compensators, IEC

Standard 61954 Ed. 1.0:1999.